G8( [2logicpd,dm3730-som-lv-devkitti,omap3630ti,omap3 ++7LogicPD Zoom DM3730 SOM-LV Development Kitchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000 l/display@0cpus+cpu@0arm,cortex-a8ucpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+2Odefault]gpinmux_mm3_pins0o468:gpinmux_mcbsp2_pins o pinmux_uart2_pins(oDFHJhgpinmux_mcspi1_pins ogpinmux_hsusb2_pins0o      gpinmux_hsusb_otg_pins`ortvxz|~g pinmux_i2c1_pinsogpinmux_tsc2004_pinsoVgpinmux_twl4030_pinsoAgpinmux_gpio_key_pinsogpinmux_led_pinso.gpinmux_lan9221_pinsoTgpinmux_mmc1_pins@ogpinmux_lcd_enable_pinoZgpinmux_dss_dpi_pins1og scm_conf@270sysconsimple-busp0+ p0gpbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-gclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhg mcbsp5_fckti,composite-clock gmcbsp1_mux_fck@4ti,composite-mux-clockg mcbsp1_fckti,composite-clock gmcbsp2_mux_fck@4ti,composite-mux-clock gmcbsp2_fckti,composite-clock gmcbsp3_mux_fck@68ti,composite-mux-clock hgmcbsp3_fckti,composite-clockgmcbsp4_mux_fck@68ti,composite-mux-clock hgmcbsp4_fckti,composite-clockgclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+2Odefault]pinmux_hsusb1_reset_pinogpinmux_wl127x_gpio_pino  gpinmux_i2c2_pinsogpinmux_i2c3_pinsogpinmux_twl4030_vpins ogpinmux_led_pins_wkupo$gpinmux_backlight_pinsogaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYgosc_sys_ck@d40 ti,mux-clock @gsys_ck@1270ti,divider-clockp g sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock$/dpll3_m2x2_ckfixed-factor-clock$/gdpll4_x2_ckfixed-factor-clock$/corex2_fckfixed-factor-clock$/g!wkup_l4_ickfixed-factor-clock $/gPcorex2_d3_fckfixed-factor-clock!$/gcorex2_d5_fckfixed-factor-clock!$/gclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockgBvirt_12m_ck fixed-clockgvirt_13m_ck fixed-clock]@gvirt_19200000_ck fixed-clock$gvirt_26000000_ck fixed-clockgvirt_38_4m_ck fixed-clockIgdpll4_ck@d00ti,omap3-dpll-per-j-type-clock  D 0gdpll4_m2_ck@d48ti,divider-clock? H g"dpll4_m2x2_mul_ckfixed-factor-clock"$/g#dpll4_m2x2_ck@d00ti,hsdiv-gate-clock# 9g$omap_96m_alwon_fckfixed-factor-clock$$/g+dpll3_ck@d00ti,omap3-dpll-core-clock  @ 0gdpll3_m3_ck@1140ti,divider-clock@ g%dpll3_m3x2_mul_ckfixed-factor-clock%$/g&dpll3_m3x2_ck@d00ti,hsdiv-gate-clock&  9g'emu_core_alwon_ckfixed-factor-clock'$/gdsys_altclk fixed-clockg0mcbsp_clks fixed-clockgdpll3_m2_ck@d40ti,divider-clock @ gcore_ckfixed-factor-clock$/g(dpll1_fck@940ti,divider-clock( @ g)dpll1_ck@904ti,omap3-dpll-clock )  $ @ 4gdpll1_x2_ckfixed-factor-clock$/g*dpll1_x2m2_ck@944ti,divider-clock* D g>cm_96m_fckfixed-factor-clock+$/g,omap_96m_fck@d40 ti,mux-clock,  @gGdpll4_m3_ck@e40ti,divider-clock @ g-dpll4_m3x2_mul_ckfixed-factor-clock-$/g.dpll4_m3x2_ck@d00ti,hsdiv-gate-clock. 9g/omap_54m_fck@d40 ti,mux-clock/0 @g:cm_96m_d2_fckfixed-factor-clock,$/g1omap_48m_fck@d40 ti,mux-clock10 @g2omap_12m_fckfixed-factor-clock2$/gIdpll4_m4_ck@e40ti,divider-clock @ g3dpll4_m4x2_mul_ckti,fixed-factor-clock3O]jg4dpll4_m4x2_ck@d00ti,gate-clock4 9jgdpll4_m5_ck@f40ti,divider-clock?@ g5dpll4_m5x2_mul_ckti,fixed-factor-clock5O]jg6dpll4_m5x2_ck@d00ti,hsdiv-gate-clock6 9jgldpll4_m6_ck@1140ti,divider-clock?@ g7dpll4_m6x2_mul_ckfixed-factor-clock7$/g8dpll4_m6x2_ck@d00ti,hsdiv-gate-clock8 9g9emu_per_alwon_ckfixed-factor-clock9$/geclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock( pg;clkout2_src_mux_ck@d70ti,composite-mux-clock( ,: pg<clkout2_src_ckti,composite-clock;<g=sys_clkout2@d70ti,divider-clock=@ p}mpu_ckfixed-factor-clock>$/g?arm_fck@924ti,divider-clock? $emu_mpu_alwon_ckfixed-factor-clock?$/gfl3_ick@a40ti,divider-clock( @ g@l4_ick@a40ti,divider-clock@ @ gArm_ick@c40ti,divider-clockA @ gpt10_gate_fck@a00ti,composite-gate-clock   gCgpt10_mux_fck@a40ti,composite-mux-clockB  @gDgpt10_fckti,composite-clockCDgpt11_gate_fck@a00ti,composite-gate-clock   gEgpt11_mux_fck@a40ti,composite-mux-clockB  @gFgpt11_fckti,composite-clockEFcore_96m_fckfixed-factor-clockG$/gmmchs2_fck@a00ti,wait-gate-clock gmmchs1_fck@a00ti,wait-gate-clock gi2c3_fck@a00ti,wait-gate-clock gi2c2_fck@a00ti,wait-gate-clock gi2c1_fck@a00ti,wait-gate-clock gmcbsp5_gate_fck@a00ti,composite-gate-clock  gmcbsp1_gate_fck@a00ti,composite-gate-clock  g core_48m_fckfixed-factor-clock2$/gHmcspi4_fck@a00ti,wait-gate-clockH gmcspi3_fck@a00ti,wait-gate-clockH gmcspi2_fck@a00ti,wait-gate-clockH gmcspi1_fck@a00ti,wait-gate-clockH guart2_fck@a00ti,wait-gate-clockH guart1_fck@a00ti,wait-gate-clockH  gcore_12m_fckfixed-factor-clockI$/gJhdq_fck@a00ti,wait-gate-clockJ gcore_l3_ickfixed-factor-clock@$/gKsdrc_ick@a10ti,wait-gate-clockK ggpmc_fckfixed-factor-clockK$/core_l4_ickfixed-factor-clockA$/gLmmchs2_ick@a10ti,omap3-interface-clockL gmmchs1_ick@a10ti,omap3-interface-clockL ghdq_ick@a10ti,omap3-interface-clockL gmcspi4_ick@a10ti,omap3-interface-clockL gmcspi3_ick@a10ti,omap3-interface-clockL gmcspi2_ick@a10ti,omap3-interface-clockL gmcspi1_ick@a10ti,omap3-interface-clockL gi2c3_ick@a10ti,omap3-interface-clockL gi2c2_ick@a10ti,omap3-interface-clockL gi2c1_ick@a10ti,omap3-interface-clockL guart2_ick@a10ti,omap3-interface-clockL guart1_ick@a10ti,omap3-interface-clockL  ggpt11_ick@a10ti,omap3-interface-clockL  ggpt10_ick@a10ti,omap3-interface-clockL  gmcbsp5_ick@a10ti,omap3-interface-clockL  gmcbsp1_ick@a10ti,omap3-interface-clockL  gomapctrl_ick@a10ti,omap3-interface-clockL gdss_tv_fck@e00ti,gate-clock:gdss_96m_fck@e00ti,gate-clockGgdss2_alwon_fck@e00ti,gate-clock gdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock  gMgpt1_mux_fck@c40ti,composite-mux-clockB  @gNgpt1_fckti,composite-clockMNaes2_ick@a10ti,omap3-interface-clockL gwkup_32k_fckfixed-factor-clockB$/gOgpio1_dbck@c00ti,gate-clockO gsha12_ick@a10ti,omap3-interface-clockL gwdt2_fck@c00ti,wait-gate-clockO gwdt2_ick@c10ti,omap3-interface-clockP gwdt1_ick@c10ti,omap3-interface-clockP ggpio1_ick@c10ti,omap3-interface-clockP gomap_32ksync_ick@c10ti,omap3-interface-clockP ggpt12_ick@c10ti,omap3-interface-clockP ggpt1_ick@c10ti,omap3-interface-clockP gper_96m_fckfixed-factor-clock+$/g per_48m_fckfixed-factor-clock2$/gQuart3_fck@1000ti,wait-gate-clockQ ggpt2_gate_fck@1000ti,composite-gate-clock gRgpt2_mux_fck@1040ti,composite-mux-clockB @gSgpt2_fckti,composite-clockRSgpt3_gate_fck@1000ti,composite-gate-clock gTgpt3_mux_fck@1040ti,composite-mux-clockB @gUgpt3_fckti,composite-clockTUgpt4_gate_fck@1000ti,composite-gate-clock gVgpt4_mux_fck@1040ti,composite-mux-clockB @gWgpt4_fckti,composite-clockVWgpt5_gate_fck@1000ti,composite-gate-clock gXgpt5_mux_fck@1040ti,composite-mux-clockB @gYgpt5_fckti,composite-clockXYgpt6_gate_fck@1000ti,composite-gate-clock gZgpt6_mux_fck@1040ti,composite-mux-clockB @g[gpt6_fckti,composite-clockZ[gpt7_gate_fck@1000ti,composite-gate-clock g\gpt7_mux_fck@1040ti,composite-mux-clockB @g]gpt7_fckti,composite-clock\]gpt8_gate_fck@1000ti,composite-gate-clock  g^gpt8_mux_fck@1040ti,composite-mux-clockB @g_gpt8_fckti,composite-clock^_gpt9_gate_fck@1000ti,composite-gate-clock  g`gpt9_mux_fck@1040ti,composite-mux-clockB @gagpt9_fckti,composite-clock`aper_32k_alwon_fckfixed-factor-clockB$/gbgpio6_dbck@1000ti,gate-clockbggpio5_dbck@1000ti,gate-clockbggpio4_dbck@1000ti,gate-clockbggpio3_dbck@1000ti,gate-clockbggpio2_dbck@1000ti,gate-clockb gwdt3_fck@1000ti,wait-gate-clockb gper_l4_ickfixed-factor-clockA$/gcgpio6_ick@1010ti,omap3-interface-clockcggpio5_ick@1010ti,omap3-interface-clockcggpio4_ick@1010ti,omap3-interface-clockcggpio3_ick@1010ti,omap3-interface-clockcggpio2_ick@1010ti,omap3-interface-clockc gwdt3_ick@1010ti,omap3-interface-clockc guart3_ick@1010ti,omap3-interface-clockc guart4_ick@1010ti,omap3-interface-clockcggpt9_ick@1010ti,omap3-interface-clockc ggpt8_ick@1010ti,omap3-interface-clockc ggpt7_ick@1010ti,omap3-interface-clockcggpt6_ick@1010ti,omap3-interface-clockcggpt5_ick@1010ti,omap3-interface-clockcggpt4_ick@1010ti,omap3-interface-clockcggpt3_ick@1010ti,omap3-interface-clockcggpt2_ick@1010ti,omap3-interface-clockcgmcbsp2_ick@1010ti,omap3-interface-clockcgmcbsp3_ick@1010ti,omap3-interface-clockcgmcbsp4_ick@1010ti,omap3-interface-clockcgmcbsp2_gate_fck@1000ti,composite-gate-clockg mcbsp3_gate_fck@1000ti,composite-gate-clockgmcbsp4_gate_fck@1000ti,composite-gate-clockgemu_src_mux_ck@1140 ti,mux-clock def@ggemu_src_ckti,clkdm-gate-clockgghpclk_fck@1140ti,divider-clockh@ pclkx2_fck@1140ti,divider-clockh@ atclk_fck@1140ti,divider-clockh@ traceclk_src_fck@1140 ti,mux-clock def@gitraceclk_fck@1140ti,divider-clocki @ secure_32k_fck fixed-clockgjgpt12_fckfixed-factor-clockj$/wdt1_fckfixed-factor-clockj$/security_l4_ick2fixed-factor-clockA$/gkaes1_ick@a14ti,omap3-interface-clockk rng_ick@a14ti,omap3-interface-clockk sha11_ick@a14ti,omap3-interface-clockk des1_ick@a14ti,omap3-interface-clockk cam_mclk@f00ti,gate-clockljcam_ick@f10!ti,omap3-no-wait-interface-clockAgcsi2_96m_fck@f00ti,gate-clockgsecurity_l3_ickfixed-factor-clock@$/gmpka_ick@a14ti,omap3-interface-clockm icr_ick@a10ti,omap3-interface-clockL des2_ick@a10ti,omap3-interface-clockL mspro_ick@a10ti,omap3-interface-clockL mailboxes_ick@a10ti,omap3-interface-clockL ssi_l4_ickfixed-factor-clockA$/gtsr1_fck@c00ti,wait-gate-clock  gsr2_fck@c00ti,wait-gate-clock  gsr_l4_ickfixed-factor-clockA$/dpll2_fck@40ti,divider-clock(@ gndpll2_ck@4ti,omap3-dpll-clock n$@4godpll2_m2_ck@44ti,divider-clockoD gpiva2_ck@0ti,wait-gate-clockpgmodem_fck@a00ti,omap3-interface-clock  gsad2d_ick@a10ti,omap3-interface-clock@ gmad2d_ick@a18ti,omap3-interface-clock@ gmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock! gqssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock! @$grssi_ssr_fck_3430es2ti,composite-clockqrgsssi_sst_fck_3430es2fixed-factor-clocks$/ghsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockK gssi_ick_3430es2@a10ti,omap3-ssi-interface-clockt gusim_gate_fck@c00ti,composite-gate-clockG  gsys_d2_ckfixed-factor-clock $/gvomap_96m_d2_fckfixed-factor-clockG$/gwomap_96m_d4_fckfixed-factor-clockG$/gxomap_96m_d8_fckfixed-factor-clockG$/gyomap_96m_d10_fckfixed-factor-clockG$/ gzdpll5_m2_d4_ckfixed-factor-clocku$/g{dpll5_m2_d8_ckfixed-factor-clocku$/g|dpll5_m2_d16_ckfixed-factor-clocku$/g}dpll5_m2_d20_ckfixed-factor-clocku$/g~usim_mux_fck@c40ti,composite-mux-clock( vwxyz{|}~ @ gusim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockP  gdpll5_ck@d04ti,omap3-dpll-clock   $ L 4gdpll5_m2_ck@d50ti,divider-clock P gusgx_gate_fck@b00ti,composite-gate-clock( gcore_d3_ckfixed-factor-clock($/gcore_d4_ckfixed-factor-clock($/gcore_d6_ckfixed-factor-clock($/gomap_192m_alwon_fckfixed-factor-clock$$/gcore_d2_ckfixed-factor-clock($/gsgx_mux_fck@b40ti,composite-mux-clock , @gsgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock@ gcpefuse_fck@a08ti,gate-clock  gts_fck@a08ti,gate-clockB gusbtll_fck@a08ti,wait-gate-clocku gusbtll_ick@a18ti,omap3-interface-clockL gmmchs3_ick@a10ti,omap3-interface-clockL gmmchs3_fck@a00ti,wait-gate-clock gdss1_alwon_fck_3430es2@e00ti,dss-gate-clockjgdss_ick_3430es2@e10ti,omap3-dss-interface-clockAgusbhost_120m_fck@1400ti,gate-clockugusbhost_48m_fck@1400ti,dss-gate-clock2gusbhost_ick@1410ti,omap3-dss-interface-clockAguart4_fck@1000ti,wait-gate-clockQgclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainhdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainod2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH gdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmaggpio@48310000ti,omap3-gpioH1gpio1ggpio@49050000ti,omap3-gpioIgpio2ggpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4ggpio@49056000ti,omap3-gpioI`!gpio5ggpio@49058000ti,omap3-gpioI"gpio6serial@4806a000ti,omap3-uartH  HR12txrxuart1lserial@4806c000ti,omap3-uartH IJ34txrxuart2lOdefault]serial@49020000ti,omap3-uartI J56txrxuart3li2c@48070000 ti,omap3-i2cH8txrx+i2c1Odefault]'@twl@48H fck ti,twl4030Odefault]audioti,twl4030-audiocodec 4rtcti,twl4030-rtc bciti,twl4030-bci GU avacr0~watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1--gregulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3**gregulator-vaux4ti,twl4030-vaux4w@w@regulator-vdd1ti,twl4030-vdd1 ' gregulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0gregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5gregulator-vusb1v8ti,twl4030-vusb1v8gregulator-vusb3v1ti,twl4030-vusb3v1gregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@g regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpiotwl4030-usbti,twl4030-usb g pwmti,twl4030-pwmgpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madcgpower4ti,twl4030-power-idle-osc-offti,twl4030-power-idle'i2c@48072000 ti,omap3-i2cH 9txrx+i2c2Odefault]i2c@48060000 ti,omap3-i2cH=txrx+i2c3Odefault]tsc2004@48 ti,tsc2004H7Odefault]  BUh@mailbox@48094000ti,omap3-mailboxmailboxH @ dsp  'spi@48098000ti,omap2-mcspiH A+mcspi12@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3Odefault]spi@4809a000ti,omap2-mcspiH B+mcspi22 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi32 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi42FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1@=>txrxM SOdefault] Z clxmmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx ^6]Odefaultlx+wlcore@2 ti,wl1273 mmu@480bd400ti,omap2-iommuH mmu_ispgmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokaygmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5$timer@4903a000ti,omap3430-timerI*timer6$timer@4903c000ti,omap3430-timerI+timer7$timer@4903e000ti,omap3430-timerI,timer81$timer@49040000ti,omap3430-timerI-timer91timer@48086000ti,omap3430-timerH`.timer101timer@48088000ti,omap3430-timerH/timer111timer@48304000ti,omap3430-timerH0@_timer12>usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ Nehci-phyohci@48064400ti,ohci-omap3HDLYehci@48064800 ti,ehci-omapHHMqgpmc@6e000000ti,omap3430-gpmcgpmcnrxtxv+00,gnand@0,0ti,omap2-nand  micron,mt29f4g16abbda3wbch8 ,,"0,C(R6a@pRR(+ethernet@gpmcOdefault]  smsc,lan9221smsc,lan9115*$ 0 R*C$p<6a$!8*Rlusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs Odefault]  q  usb2-phy 2dss@48050000 ti,omap3-dssHok dss_corefck+    Odefault] dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfcktv_dac_clkportendpoint , <gssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ s ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-address G  ` q` sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+2Odefault]pinmux_hsusb2_2_pins0oPRT V X Z gisp@480bc000 ti,omap3-ispH H   ports+bandgap@48002524H%$ti,omap36xx-bandgap gtarget-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8sysc  fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8sysc  fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivathermal-zonescpu_thermal   N  memory@80000000umemorywl12xx_vmmcregulator-fixedvwl1271w@w@ B p # 6ghsusb2_phyusb-nop-xceiv Agoscillator fixed-clockggpio_keys gpio-keysOdefault]sysboot2 Mgpio3 ] S ^soundti,omap-twl4030 lomap3logic uleds gpio-ledsOdefault]led1 Mled1 ] ~cpu0led2 Mled2 ]  ~nonevideo_regregulator-fixed fixed-supply2Z2Zg display@0 panel-dpi M28okayOdefault] portendpoint ,gpanel-timingT@     *       backlightpwm-backlightOdefault] +LK@, 0 (2<FPZd B regulator-vddvarioregulator-fixed vddvariogregulator-vdd33aregulator-fixedvdd33ag compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedti,hs_extmute_gpiobci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsti,use_poweroffvio-supplytouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressureti,x-plate-ohmsti,esd-recovery-timeout-ms#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplywp-gpioscd-gpiosvmmc-supplybus-widthcap-power-off-cardnon-removableref-clock-frequency#iommu-cellsti,#tlb-entriesstatusreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthti,nand-ecc-optrb-gpiosgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,sysc-maskti,sysc-sidlepolling-delay-passivepolling-delaycoefficientsthermal-sensorsstartup-delay-usenable-active-highvin-supplyreset-gpioslabellinux,codewakeup-sourceti,modelti,mcbsplinux,default-triggerenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activepwmsbrightness-levelsdefault-brightness-level