1P8'( '`Bti,omap4-panda-esti,omap4-pandati,omap4460ti,omap4430ti,omap4 +7TI OMAP4 PandaBoard-ESchosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EX/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0B]/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Be/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bm/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bu/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 }/connector0 /connector1_/ocp/interconnect@4a000000/segment@0/target-module@64000/usbhshost@0/ehci@c00/hub@1/usbether@1cpus+cpu@0arm,cortex-a9cpucpuW0 `O cpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmudebugss 67interrupt-controller@48241000arm,cortex-a9-gic,H$H$ l2-cache-controller@48242000arm,pl310-cacheH$ =Klocal-timer@48240600arm,cortex-a9-twd-timerH$     interrupt-controller@48281000ti,omap4-wugen-mpu,H( socti,omap-inframpu ti,omap4-mpumpuWdsp ti,omap3-c64dspiva ti,ivahdivaocpti,omap4-l3-nocsimple-bus+\l3_main_1l3_main_2l3_main_3DD E  interconnect@4a300000ti,omap4-l4-wkupsimple-busJ0J0J0 caplaia0+$\J0J1J2segment@0 simple-bus+\`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc counter_32k@@ crevsyscm 0fck+ \@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`crev+ \` prm@0 ti,omap4-prm   + \ clocks+sys_clkin_ck@110{ ti,mux-clock abe_dpll_bypass_clk_mux_ck@108{ ti,mux-clock5abe_dpll_refclk_mux_ck@10c{ ti,mux-clock 4dbgclk_mux_ck{fixed-factor-clockl4_wkup_clk_mux_ck@108{ ti,mux-clocksyc_clk_div_ck@100{ti,divider-clockusim_ck@1858{ti,divider-clockXusim_fclk@1858{ti,gate-clockXtrace_clk_div_ck{ti,clkdm-gate-clock div_ts_ck@1888{ti,divider-clock  bandgap_ts_fclk@1888{ti,gate-clockclockdomainsemu_sys_clkdmti,clockdomainl4_wkup_cm@1800 ti,omap4-cm+ \clk@20 ti,clkctrl \{emu_sys_cm@1a00 ti,omap4-cm+ \clk@20 ti,clkctrl {target-module@a000ti,sysc-omap4ti,sysccrev+ \scrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310{ ti,composite-no-wait-gate-clockauxclk0_src_mux_ck@310{ti,composite-mux-clock auxclk0_src_ck{ti,composite-clockauxclk0_ck@310{ti,divider-clock,auxclk1_src_gate_ck@314{ ti,composite-no-wait-gate-clockauxclk1_src_mux_ck@314{ti,composite-mux-clock auxclk1_src_ck{ti,composite-clockauxclk1_ck@314{ti,divider-clock-auxclk2_src_gate_ck@318{ ti,composite-no-wait-gate-clock auxclk2_src_mux_ck@318{ti,composite-mux-clock !auxclk2_src_ck{ti,composite-clock !"auxclk2_ck@318{ti,divider-clock".auxclk3_src_gate_ck@31c{ ti,composite-no-wait-gate-clock#auxclk3_src_mux_ck@31c{ti,composite-mux-clock $auxclk3_src_ck{ti,composite-clock#$%auxclk3_ck@31c{ti,divider-clock%/auxclk4_src_gate_ck@320{ ti,composite-no-wait-gate-clock &auxclk4_src_mux_ck@320{ti,composite-mux-clock  'auxclk4_src_ck{ti,composite-clock&'(auxclk4_ck@320{ti,divider-clock( 0auxclk5_src_gate_ck@324{ ti,composite-no-wait-gate-clock$)auxclk5_src_mux_ck@324{ti,composite-mux-clock $*auxclk5_src_ck{ti,composite-clock)*+auxclk5_ck@324{ti,divider-clock+$1auxclkreq0_ck@210{ ti,mux-clock,-./01auxclkreq1_ck@214{ ti,mux-clock,-./01auxclkreq2_ck@218{ ti,mux-clock,-./01auxclkreq3_ck@21c{ ti,mux-clock,-./01auxclkreq4_ck@220{ ti,mux-clock,-./01 auxclkreq5_ck@224{ ti,mux-clock,-./01$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkup crevsyscm+ \scm@c000ti,omap4-scm-wkupsegment@10000 simple-bus+x\@@PPtarget-module@0ti,sysc-omap2ti,syscgpio1crevsyscsyssm fckdbclk+ \gpio@0ti,omap4-gpio  (,target-module@4000ti,sysc-omap2ti,sysc wd_timer2@@@crevsyscsyss"m fck+ \@wdt@0ti,omap4-wdtti,omap3-wdt  Ptarget-module@8000ti,sysc-omap2-timerti,sysctimer1crevsyscsyss' m  fck+ \timer@0ti,omap3430-timer  fck  %4target-module@c000ti,sysc-omap2ti,sysckbdcrevsyscsyss' m Xfck+ \keypad@0ti,omap4-keypad  xcmputarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkup crevsyscm+ \pinmux@40 ti,omap4-padconfpinctrl-single@8+C,Rppinmux_leds_wkpinspinmux_twl6030_wkup_pinsrsegment@20000 simple-bus+\``  00@@PPpptarget-module@0ti,sysc disabled+ \target-module@2000ti,sysc disabled+ \ target-module@4000ti,sysc disabled+ \@target-module@6000ti,sysc disabled+0\`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-busJJJ caplaia0+T\JJJJ J (J(0J0segment@0 simple-bus+\ 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_core   crevsyscm+ \ scm@0ti,omap4-scm-coresimple-bus+ \scm_conf@0syscon+control-phy@300ti,control-phy-usb2cpowerbcontrol-phy@33cti,control-phy-otghs<cotghs_controlatarget-module@4000ti,sysc-omap4ti,sysc@crev+ \@cm1@0ti,omap4-cm1simple-bus + \ clocks+extalt_clkin_ck{ fixed-clockDpad_clks_src_ck{ fixed-clock2pad_clks_ck@108{ti,gate-clock2pad_slimbus_core_clks_ck{ fixed-clocksecure_32k_clk_src_ck{ fixed-clockslimbus_src_clk{ fixed-clock3slimbus_clk@108{ti,gate-clock3 sys_32k_ck{ fixed-clockvirt_12000000_ck{ fixed-clockvirt_13000000_ck{ fixed-clock]@ virt_16800000_ck{ fixed-clockY virt_19200000_ck{ fixed-clock$ virt_26000000_ck{ fixed-clock virt_27000000_ck{ fixed-clock virt_38400000_ck{ fixed-clockItie_low_clock_ck{ fixed-clockutmi_phy_clkout_ck{ fixed-clockxclk60mhsp1_ck{ fixed-clock\xclk60mhsp2_ck{ fixed-clock]xclk60motg_ck{ fixed-clockdpll_abe_ck@1e0{ti,omap4-dpll-m4xen-clock456dpll_abe_x2_ck@1f0{ti,omap4-dpll-x2-clock67dpll_abe_m2x2_ck@1f0{ti,divider-clock78abe_24m_fclk{fixed-factor-clock8abe_clk@108{ti,divider-clock8dpll_abe_m3x2_ck@1f4{ti,divider-clock79core_hsd_byp_clk_mux_ck@12c{ ti,mux-clock9,:dpll_core_ck@120{ti,omap4-dpll-core-clock: $,(;dpll_core_x2_ck{ti,omap4-dpll-x2-clock;<dpll_core_m6x2_ck@140{ti,divider-clock<@dpll_core_m2_ck@130{ti,divider-clock;0=ddrphy_ck{fixed-factor-clock=dpll_core_m5x2_ck@13c{ti,divider-clock<<>div_core_ck@100{ti,divider-clock>Idiv_iva_hs_clk@1dc{ti,divider-clock>Bdiv_mpu_hs_clk@19c{ti,divider-clock>Hdpll_core_m4x2_ck@138{ti,divider-clock<8?dll_clk_div_ck{fixed-factor-clock?dpll_abe_m2_ck@1f0{ti,divider-clock6Ldpll_core_m3x2_gate_ck@134{ ti,composite-no-wait-gate-clock<4@dpll_core_m3x2_div_ck@134{ti,composite-divider-clock<4Adpll_core_m3x2_ck{ti,composite-clock@Adpll_core_m7x2_ck@144{ti,divider-clock<Diva_hsd_byp_clk_mux_ck@1ac{ ti,mux-clockBCdpll_iva_ck@1a0{ti,omap4-dpll-clockCD7Ddpll_iva_x2_ck{ti,omap4-dpll-x2-clockDEdpll_iva_m4x2_ck@1b8{ti,divider-clockEF~Fdpll_iva_m5x2_ck@1bc{ti,divider-clockEG] Gdpll_mpu_ck@160{ti,omap4-dpll-clockH`dlhdpll_mpu_m2_ck@170{ti,divider-clockpper_hs_clk_div_ck{fixed-factor-clock9Musb_hs_clk_div_ck{fixed-factor-clock9Sl3_div_ck@100{ti,divider-clockIJl4_div_ck@100{ti,divider-clockJlp_clk_div_ck{fixed-factor-clock8mpu_periphclk{fixed-factor-clockocp_abe_iclk@528{ti,divider-clock K(per_abe_24m_fclk{fixed-factor-clockLdummy_ck{ fixed-clockclockdomainsmpuss_cm@300 ti,omap4-cm+ \clk@20 ti,clkctrl {tesla_cm@400 ti,omap4-cm+ \clk@20 ti,clkctrl {_abe_cm@500 ti,omap4-cm+ \clk@20 ti,clkctrl l{Ktarget-module@8000ti,sysc-omap4ti,sysccrev+ \ cm2@0ti,omap4-cm2simple-bus + \ clocks+per_hsd_byp_clk_mux_ck@14c{ ti,mux-clockMLNdpll_per_ck@140{ti,omap4-dpll-clockN@DLHOdpll_per_m2_ck@150{ti,divider-clockOPWdpll_per_x2_ck@150{ti,omap4-dpll-x2-clockOPPdpll_per_m2x2_ck@150{ti,divider-clockPPVdpll_per_m3x2_gate_ck@154{ ti,composite-no-wait-gate-clockPTQdpll_per_m3x2_div_ck@154{ti,composite-divider-clockPTRdpll_per_m3x2_ck{ti,composite-clockQRdpll_per_m4x2_ck@158{ti,divider-clockPXdpll_per_m5x2_ck@15c{ti,divider-clockP\dpll_per_m6x2_ck@160{ti,divider-clockP`Udpll_per_m7x2_ck@164{ti,divider-clockPddpll_usb_ck@180{ti,omap4-dpll-j-type-clockSTdpll_usb_clkdcoldo_ck@1b4{ti,fixed-factor-clockT)dpll_usb_m2_ck@190{ti,divider-clockTXducati_clk_mux_ck@100{ ti,mux-clockIUfunc_12m_fclk{fixed-factor-clockVfunc_24m_clk{fixed-factor-clockWfunc_24mc_fclk{fixed-factor-clockVfunc_48m_fclk@108{ti,divider-clockVfunc_48mc_fclk{fixed-factor-clockVfunc_64m_fclk@108{ti,divider-clockfunc_96m_fclk@108{ti,divider-clockVinit_60m_fclk@104{ti,divider-clockX[per_abe_nc_fclk@108{ti,divider-clockLsha2md5_fck@15c8{ti,gate-clockJusb_phy_cm_clk32k@640{ti,gate-clock@cclockdomainsl3_init_clkdmti,clockdomainTl4_ao_cm@600 ti,omap4-cm+ \clk@20 ti,clkctrl {dl3_1_cm@700 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_2_cm@800 ti,omap4-cm+ \clk@20 ti,clkctrl {ducati_cm@900 ti,omap4-cm + \ clk@20 ti,clkctrl {l3_dma_cm@a00 ti,omap4-cm + \ clk@20 ti,clkctrl {Yl3_emif_cm@b00 ti,omap4-cm + \ clk@20 ti,clkctrl {d2d_cm@c00 ti,omap4-cm + \ clk@20 ti,clkctrl {l4_cfg_cm@d00 ti,omap4-cm + \ clk@20 ti,clkctrl {el3_instr_cm@e00 ti,omap4-cm+ \clk@20 ti,clkctrl ${ivahd_cm@f00 ti,omap4-cm+ \clk@20 ti,clkctrl {iss_cm@1000 ti,omap4-cm+ \clk@20 ti,clkctrl {ll3_dss_cm@1100 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_gfx_cm@1200 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_init_cm@1300 ti,omap4-cm+ \clk@20 ti,clkctrl {Zl4_per_cm@1400 ti,omap4-cm+ \clk@20 ti,clkctrl D{mtarget-module@56000ti,sysc-omap2ti,sysc dma_system``,`(crevsyscsyss# 7 m Yfck+ \`dma-controller@0ti,omap4430-sdma0  EP ]ytarget-module@58000ti,sysc-omap2ti,syschsicrevsyscsyss#7m Zfck+ \@hsi@0 ti,omap4-hsi@Jcsysgdd Zhsi_fck  Gjgdd_mpu+ \@hsi-port@2000ti,omap4-hsi-port (ctxrx  Chsi-port@3000ti,omap4-hsi-port08ctxrx  Dtarget-module@5e000ti,sysc disabled+ \ target-module@62000ti,sysc-omap2ti,sysc usb_tll_hs   crevsyscsyss m ZHfck+ \ usbhstll@0 ti,usbhs-tll  Ntarget-module@64000ti,sysc-omap4ti,sysc usb_host_hs@@@crevsyscsyss7m Z8fck+ \@usbhshost@0ti,usbhs-host+ \ [\]3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 zehci-phyohci@800ti,ohci-omap3  Lehci@c00 ti,ehci-omap   M^+hub@1 usb424,9514+usbether@1 usb424,ec00target-module@66000ti,sysc-omap2ti,syscmmu_dsp```crevsyscsyss m _fck+ \` disabledsegment@80000 simple-bus+\      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ \target-module@2b000ti,sysc-omap2ti,sysc usb_otg_hscrevsyscsyss 7m Z@fck+ \usb_otg_hs@0ti,omap4-musb \]jmcdma`` usb2-phy a2target-module@2d000ti,sysc-omap2ti,syscocp2scp_usb_phycrevsyscsyss m Zfck+ \ocp2scp@0ti,omap-ocp2scp+ \usb2phy@80 ti,omap-usb2Xbcwkupclk`target-module@36000ti,sysc disabled+ \`target-module@4d000ti,sysc disabled+ \target-module@59000ti,sysc-omap4-srti,syscsmartreflex_mpu8csyscm dfck+ \smartreflex@0ti,omap4-smartreflex-mpu  target-module@5b000ti,sysc-omap4-srti,syscsmartreflex_iva8csyscm dfck+ \smartreflex@0ti,omap4-smartreflex-iva  ftarget-module@5d000ti,sysc-omap4-srti,syscsmartreflex_core8csyscm dfck+ \smartreflex@0ti,omap4-smartreflex-core  target-module@60000ti,sysc disabled+ \target-module@74000ti,sysc-omap4ti,syscmailbox@@ crevsysc m efck+ \@mailbox@0ti,omap4-mailbox  mbox_ipu , 7mbox_dsp , 7target-module@76000ti,sysc-omap2ti,sysc spinlock```crevsyscsyss m efck+ \`spinlock@0ti,omap4-hwspinlockBsegment@100000 simple-bus+`\  00target-module@0ti,sysc-omap4ti,syscctrl_module_pad_core crevsyscm+ \pinmux@40 ti,omap4-padconfpinctrl-single@+C,RpPdefault^fghijnpinmux_twl6040_pins`tpinmux_mcpdm_pins(pinmux_mcbsp1_pins pinmux_dss_dpi_pins"$&(*,.0246tvxz|~fpinmux_tfp410_pinsDgpinmux_dss_hdmi_pinsZ\^hpinmux_tpd12s015_pins"HX ipinmux_hsusbb1_pins`           jpinmux_i2c1_pinsppinmux_i2c2_pinsxpinmux_i2c3_pinsopinmux_i2c4_pinspinmux_wl12xx_gpio &,02pinmux_wl12xx_pins@8:  |pinmux_button_pinspinmux_twl6030_pins^Aqgpio_led_pmxomap4_padconf_global@5a0sysconsimple-busp+ \pkpbias_regulator@60ti,pbias-omap4ti,pbias-omap`hkpbias_mmc_omap4opbias_mmc_omap4~w@-ztarget-module@2000ti,sysc disabled+ \ target-module@8000ti,sysc disabled+ \target-module@a000ti,sysc-omap4ti,syscfdif crevsysc 7 m lfck+ \segment@180000 simple-bus+segment@200000 simple-bus+h\!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc disabled+ \@target-module@6000ti,sysc disabled+ \`target-module@a000ti,sysc disabled+ \target-module@c000ti,sysc disabled+ \target-module@10000ti,sysc disabled+ \target-module@12000ti,sysc disabled+ \ target-module@14000ti,sysc disabled+ \@target-module@16000ti,sysc disabled+ \`target-module@18000ti,sysc disabled+ \target-module@1c000ti,sysc disabled+ \target-module@1e000ti,sysc disabled+ \target-module@20000ti,sysc disabled+ \target-module@26000ti,sysc disabled+ \`target-module@28000ti,sysc disabled+ \target-module@2a000ti,sysc disabled+ \segment@280000 simple-bus+segment@300000 simple-bus+\042@@2@ `2`p2p2232 2@11@1 1 target-module@0ti,sysc disabled+\@  @@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-bus0HHHHHHcaplaia0ia1ia2ia3+\H H segment@0 simple-bus+\  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscuart3PTXcrevsyscsyssm m0fck+ \serial@0ti,omap4-uart  JlJntarget-module@32000ti,sysc-omap2-timerti,sysctimer2   crevsyscsyss' m mfck+ \ timer@0ti,omap3430-timer mfck  &target-module@34000ti,sysc-omap4-timerti,sysctimer3@@ crevsyscm m fck+ \@timer@0ti,omap4430-timer m fck  'target-module@36000ti,sysc-omap4-timerti,sysctimer4`` crevsyscm m(fck+ \`timer@0ti,omap4430-timer m(fck  (target-module@3e000ti,sysc-omap4-timerti,sysctimer9 crevsyscm m0fck+ \timer@0ti,omap4430-timer m0fck  -target-module@40000ti,sysc disabled+ \target-module@55000ti,sysc-omap2ti,syscgpio2PPQcrevsyscsyssmm@m@ fckdbclk+ \Pgpio@0ti,omap4-gpio  (,~target-module@57000ti,sysc-omap2ti,syscgpio3ppqcrevsyscsyssmmHmH fckdbclk+ \pgpio@0ti,omap4-gpio  (,target-module@59000ti,sysc-omap2ti,syscgpio4crevsyscsyssmmPmP fckdbclk+ \gpio@0ti,omap4-gpio  (,utarget-module@5b000ti,sysc-omap2ti,syscgpio5crevsyscsyssmmXmX fckdbclk+ \gpio@0ti,omap4-gpio  !(,target-module@5d000ti,sysc-omap2ti,syscgpio6crevsyscsyssmm`m` fckdbclk+ \gpio@0ti,omap4-gpio  "(,target-module@60000ti,sysc-omap2ti,sysci2c3crevsyscsyssm mfck+ \i2c@0 ti,omap4-i2c  =+Pdefault^oeeprom@50 ti,eepromPtarget-module@6a000ti,sysc-omap2ti,syscuart1PTXcrevsyscsyssm m fck+ \serial@0ti,omap4-uart  Hltarget-module@6c000ti,sysc-omap2ti,syscuart2PTXcrevsyscsyssm m(fck+ \serial@0ti,omap4-uart  IlIntarget-module@6e000ti,sysc-omap2ti,syscuart4PTXcrevsyscsyssm m8fck+ \serial@0ti,omap4-uart  FlFntarget-module@70000ti,sysc-omap2ti,sysci2c1crevsyscsyssm mfck+ \i2c@0 ti,omap4-i2c  8+Pdefault^ptwl@48H   ti,twl6030,Pdefault^qrrtcti,twl4030-rtc regulator-vaux1ti,twl6030-vaux1~B@-regulator-vaux2ti,twl6030-vaux2~O*regulator-vaux3ti,twl6030-vaux3~B@-regulator-vmmcti,twl6030-vmmc~O-{regulator-vppti,twl6030-vpp~w@&%regulator-vusimti,twl6030-vusim~O,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxioregulator-vusbti,twl6030-vusbsregulator-v1v8ti,twl6030-v1v8vregulator-v2v1ti,twl6030-v2v1wusb-comparatorti,twl6030-usb  spwmti,twl6030-pwmpwmledti,twl6030-pwmledgpadcti,twl6030-gpadc  twl@4b ti,twl6040{KPdefault^t  w u-v8wDtarget-module@72000ti,sysc-omap2ti,sysci2c2   crevsyscsyssm mfck+ \ i2c@0 ti,omap4-i2c  9+Pdefault^xtarget-module@76000ti,sysc-omap4ti,sysc slimbus2`` crevsyscm mfck+ \`target-module@78000ti,sysc-omap2ti,syscelmcrevsyscsyss m m8fck+ \elm@0ti,am3352-elm    disabledtarget-module@86000ti,sysc-omap2-timerti,sysctimer10```crevsyscsyss' m mfck+ \`timer@0ti,omap3430-timer mfck  .target-module@88000ti,sysc-omap4-timerti,sysctimer11 crevsyscm mfck+ \timer@0ti,omap4430-timer mfck  /target-module@90000ti,sysc disabled+ \ target-module@96000ti,sysc-omap2ti,syscmcbsp4 `csysc m mfck+ \ `mcbsp@0ti,omap4-mcbspcmpu  jcommonWfyy ktxrx disabledtarget-module@98000ti,sysc-omap4ti,syscmcspi1   crevsyscm mfck+ \ spi@0ti,omap4-mcspi  A+u@fy#y$y%y&y'y(y)y* ktx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,syscmcspi2   crevsyscm mfck+ \ spi@0ti,omap4-mcspi  B+u fy+y,y-y.ktx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,syscmmc1   crevsysc7m Zfck+ \ mmc@0ti,omap4-hsmmc  Sfy=y>ktxrxz{target-module@9e000ti,sysc disabled+ \ target-module@a2000ti,sysc disabled+ \ target-module@a4000ti,sysc disabled+\ @ Ptarget-module@a8000ti,sysc disabled+ \ @target-module@ad000ti,sysc-omap4ti,syscmmc3   crevsysc7m mfck+ \ mmc@0ti,omap4-hsmmc  ^fyMyNktxrx disabledtarget-module@b0000ti,sysc disabled+ \ target-module@b2000ti,sysc-omap2ti,syschdq1w   crevsyscsyss mhfck+ \ 1w@0 ti,omap3-1w  :target-module@b4000ti,sysc-omap4ti,syscmmc2 @ @ crevsysc7m Zfck+ \ @mmc@0ti,omap4-hsmmc  Vfy/y0ktxrx disabledtarget-module@b8000ti,sysc-omap4ti,syscmcspi3   crevsyscm mfck+ \ spi@0ti,omap4-mcspi  [+ufyyktx0rx0target-module@ba000ti,sysc-omap4ti,syscmcspi4   crevsyscm mfck+ \ spi@0ti,omap4-mcspi  0+ufyFyGktx0rx0target-module@d1000ti,sysc-omap4ti,syscmmc4   crevsysc7m mfck+ \ mmc@0ti,omap4-hsmmc  `fy9y:ktxrx disabledtarget-module@d5000ti,sysc-omap4ti,syscmmc5 P P crevsysc7m m@fck+ \ Pmmc@0ti,omap4-hsmmc  ;fy;y<ktxrxPdefault^|};n+wlcore@2 ti,wl1271 ~ Isegment@200000 simple-bus+\55target-module@150000ti,sysc-omap2ti,sysci2c4crevsyscsyssm mfck+ \i2c@0 ti,omap4-i2c  >+Pdefault^ocmcram@40304000 mmio-sram@0@gpmc@50000000ti,omap4430-gpmcP+  fykrxtx gpmcJfck,(mmu@4a066000ti,omap4-iommuJ`  mmu_dsp0target-module@52000000ti,sysc-omap4ti,syscissRR crevsysc7m lfck+ \Rmmu@55082000ti,omap4-iommuU   dmmu_ipu0=target-module@40130000ti,sysc-omap2ti,sysc wd_timer3@@@crevsyscsyss"m Khfck+\@IIwdt@0ti,omap4-wdtti,omap3-wdt  Pmcpdm@40132000ti,omap4-mcpdm@ I cmpudma  pmcpdmfyAyBkup_linkdn_linkokayPdefault^pdmclkdmic@4012e000ti,omap4-dmic@Icmpudma  rdmicfyCkup_link disabledmcbsp@40122000ti,omap4-mcbsp@ I cmpudma  jcommonWmcbsp1fy!y"ktxrxokayPdefault^mcbsp@40124000ti,omap4-mcbsp@@I@cmpudma  jcommonWmcbsp2fyyktxrx disabledmcbsp@40126000ti,omap4-mcbsp@`I`cmpudma  jcommonWmcbsp3fyyktxrx disabledtarget-module@40128000ti,sysc-mcaspti,syscmcasp@@ crevsyscm K fck+\@IItarget-module@4012c000ti,sysc-omap4ti,sysc slimbus1@@ crevsyscm K@fck+\@IItarget-module@401f1000ti,sysc-omap4ti,syscaess@@ crevsysc7 m Kfck+\@IIdmm@4e000000 ti,omap4-dmmN  qdmmemif@4c000000 ti,emif-4dL  nemif1S\semif@4d000000 ti,emif-4dM  oemif2S\stimer@40138000ti,omap4430-timer@I  )timer5timer@4013a000ti,omap4430-timer@I  *timer6timer@4013c000ti,omap4430-timer@I  +timer7timer@4013e000ti,omap4430-timer@I  ,timer8aes@4b501000 ti,omap4-aesaes1KP  Ufyoynktxrxaes@4b701000 ti,omap4-aesaes2Kp  @fyryqktxrxdes@480a5000 ti,omap4-desdesH P  Rfyuytktxrxsham@4b100000ti,omap4-shamshamK  3fywkrxregulator-abb-mpu ti,abb-v2oabb_mpu+2okayJ0{J0`J"h'cbase-addressint-addressefuse-addressxO1regulator-abb-iva ti,abb-v2oabb_iva+2okayJ0{J0`J"h'cbase-addressint-addressefuse-addressx~e  target-module@56000000ti,sysc-omap4ti,syscgpuVV crevsysc7m fck+ \Vdss@58000000 ti,omap4-dssXok dss_core fck+\dispc@58001000ti,omap4-dispcX   dss_dispc fckencoder@58002000ti,omap4-rfbiX  disabled dss_rfbiJfckickencoder@58003000ti,omap4-vencX0 disabled dss_venc fckencoder@58004000 ti,omap4-dsiX@XB@XC cprotophypll  5 disabled dss_dsi1  fcksys_clkencoder@58005000 ti,omap4-dsiXPXR@XS cprotophypll  Tok dss_dsi2  fcksys_clkencoder@58006000ti,omap4-hdmi X`XbXcXdcwppllphycore  eok dss_hdmi  fcksys_clkfyL kaudio_txportendpointportendpoint,bandgap@4a002260J"`J#,J#xti,omap4460-bandgap  ~ 7=thermal-zonescpu_thermalSiw\۫tripscpu_alertpassivecpu_critH criticalcooling-mapsmap0 lpddr2#Elpida,ECB240ABACNjedec,lpddr2-s4 !-:GVlpddr2-timings@0jedec,lpddr2-timingsclׄuR{FP:'LLL:|P_~@B@pplpddr2-timings@1jedec,lpddr2-timingscl uR{FP:''LL:|P_~@B@ppmemory@80000000memory@leds gpio-ledsPdefault^heartbeatpandaboard::status1 7u heartbeatmmcpandaboard::status2 7mmc0gpio_keys gpio-keysPdefault^buttonS2 button S2 7u  soundti,abe-twl6040 PandaBoardES (I 5 > IHeadset StereophoneHSOLHeadset StereophoneHSORExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRAFMLLine InAFMRLine Inhsusb1_power_regregulator-fixed ohsusb1_vbus~2Z2Z ( ZpD khsusb1_phyusb-nop-xceiv }~ / main_clk$^wl12xx_vmmcPdefault^regulator-fixedovwl1271~w@w@ (~  ZpD}encoder0 ti,tfp410 ports+port@0endpointport@1endpointconnector0dvi-connectordvi  portendpointencoder1 ti,tpd12s015$7~~ ~ports+port@0endpointport@1endpointconnector1hdmi-connectorhdmiaportendpoint compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2i2c3serial0serial1serial2serial3display0display1ethernetdevice_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterruptsinterrupt-controller#interrupt-cellscache-unifiedcache-levelsramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividersti,sysc-maskti,syss-maskti,no-reset-on-initti,gpio-always-ongpio-controller#gpio-cellsti,timer-alwon#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clocksassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-moderemote-wakeup-connectedphysusb-phyphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthnon-removablecap-power-off-cardref-clock-frequencygpmc,num-csgpmc,num-waitpinsti,no-idle-on-init#iommu-cellsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertcs1-useddevice-handleti,timer-dspti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdd-supplyvdda-supplyremote-endpointdata-linesgpios#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicedensityio-widthtRPab-min-tcktRCD-min-tcktWR-min-tcktRASmin-min-tcktRRD-min-tcktWTR-min-tcktXP-min-tcktRTP-min-tcktCKE-min-tcktCKESR-min-tcktFAW-min-tckmin-freqmax-freqtRPabtRCDtWRtRAS-mintRRDtWTRtXPtRTPtCKESRtDQSCK-maxtFAWtZQCStZQCLtZQinittRAS-max-nstDQSCK-max-deratedlabellinux,default-triggerlinux,codewakeup-sourceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingstartup-delay-usregulator-boot-onreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus