i8(,rockchip,rk3288-evb-act8846rockchip,rk3288&aliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12!@/6 Bcpu@501cpuarm,cortex-a12!@/Bcpu@502cpuarm,cortex-a12!@/Bcpu@503cpuarm,cortex-a12!@/Bcpu-opp-tableoperating-points-v2JBopp-126000000U\ opp-216000000U \ opp-312000000U\ opp-408000000UQ\ opp-600000000U#F\ opp-696000000U)|\~opp-816000000U0,\B@opp-1008000000U<\opp-1200000000UG\opp-1416000000UTfr\Oopp-1512000000UZJ\ opp-1608000000U_"\pamba simple-busjdma-controller@ff250000arm,pl330arm,primecell%@q|/ apb_pclkBdma-controller@ff600000arm,pl330arm,primecell`@q|/ apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@q|/ apb_pclkBUreserved-memoryjdma-unusable@fe000000oscillator fixed-clockn6xin24mB timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H / a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр /Drvbiuciuciu-driveciu-sample  @resetokay)3EVhsdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshcр /Eswbiuciuciu-driveciu-sample ! @reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр /Ftxbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр /Guybiuciuciu-driveciu-sample #@resetokay)3hsdefaultsaradc@ff100000rockchip,saradc $/I[saradcapb_pclkW saradc-apbokayBwspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi/ARspiclkapb_pclk  txrx ,sdefault disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi/BSspiclkapb_pclk txrx -sdefault  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi/CTspiclkapb_pclktxrx .sdefault!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c/Msdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c/Osdefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c/Psdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c/Qsdefault(okayBlserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7/MUbaudclkapb_pclksdefault)okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8/NVbaudclkapb_pclksdefault*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9/OWbaudclkapb_pclksdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :/PXbaudclkapb_pclksdefault,okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;/QYbaudclkapb_pclksdefault-okaythermal-zonesreserve_thermal .cpu_thermald .tripscpu_alert0*p6passiveB/cpu_alert1*$6passiveB0cpu_crit*_6 criticalcooling-mapsmap0A/ Fmap1A0 Fgpu_thermald .tripsgpu_alert0*p6passiveB1gpu_crit*_6 criticalcooling-mapsmap0A1 Ftsadc@ff280000rockchip,rk3288-tsadc( %/HZtsadcapb_pclk tsadc-apbsinitdefaultsleep2U3_2isokayB.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq48/fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok5rgmiiinput 6 ,'B@AQ7sdefault8h0qusb@ff500000 generic-ehciP /usbhostz9usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T /otghostz: usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X /otgotg@@ z; usb2-phy disabledusb@ff5c0000 generic-ehci\ /usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c/Lsdefault<okaysyr827@40silergy,syr827@vdd_cpu Pp1C=B syr828@41silergy,syr828Avdd_gpu PpC=Bphym8563@51haoyu,hym8563Q&>sdefault?xin32kact8846@5aactive-semi,act8846ZokayN=Y=d=o=z@=AregulatorsREG1VCC_DDROOREG2VCC_IO2Z2ZB@REG3VDD_LOG ``REG4VCC_20BAREG5 VCCIO_SDw@2ZBREG6 VDD10_LCDB@B@REG7 VCCA_CODEC2Z2ZREG8VCCA_TP2Z2ZREG9 VCCIO_PMU2Z2ZREG10VDD_10B@B@REG11VCC_18w@w@BREG12 VCC18_LCDw@w@i2c@ff660000rockchip,rk3288-i2cf =i2c/NsdefaultB disabledpwm@ff680000rockchip,rk3288-pwmhsdefaultC/^pwmokayBzpwm@ff680010rockchip,rk3288-pwmhsdefaultD/^pwm disabledpwm@ff680020rockchip,rk3288-pwmh sdefaultE/^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0sdefaultF/^pwm disabledbus_intmem@ff700000 mmio-srampjpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsBpower-controller!rockchip,rk3288-power-controllerAhQ BXpd_vio@9 /chgfdehilkj$GHIJKLMNOpd_hevc@11 /opPQpd_video@12 /Rpd_gpu@13 /STreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4HAjk$#gׄeрxhрxhBsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwB4edp-phyrockchip,rk3288-dp-phy/h24m#okayBhio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320# /]phyclkB;usb-phy@334#4/^phyclkB9usb-phy@348#H/_phyclkB:watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif. hclkmclk/TUtx 6sdefaultV4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s. 5UUtxrxi2s_hclki2s_clk/RsdefaultW?Z disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 /}aclkhclksclkapb_pclk crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu/ aclkifacet disablediommu@ff914000rockchip,iommu @P isp_mmu/ aclkifacet disabledrga@ff920000rockchip,rk3288-rga /jaclkhclksclkX ilm coreaxiahbvop@ff930000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vopX def axiahbdclkYokayportB endpoint@0ZBmendpoint@1[Biendpoint@2\Bcendpoint@3]Bfiommu@ff930300rockchip,iommu  vopb_mmu/ aclkifaceX tokayBYvop@ff940000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vopX  axiahbdclk^okayportB endpoint@0_Bnendpoint@1`Bjendpoint@2aBdendpoint@3bBgiommu@ff940300rockchip,iommu  vopl_mmu/ aclkifaceX tokayB^mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ /~d refpclkX 4 disabledportsportendpoint@0cB\endpoint@1dBalvds@ff96c000rockchip,rk3288-lvds@/g pclk_lvdsslcdceX 4 disabledportsport@0endpoint@0fB]endpoint@1gBbdp@ff970000rockchip,rk3288-dp@ b/icdppclkzhdpodp4okayportsport@0endpoint@0iB[endpoint@1jB`port@1endpoint@0kB~hdmi@ff980000rockchip,rk3288-dw-hdmi.4 g/hmniahbisfrcecX okaylportsportendpoint@0mBZendpoint@1nB_iommu@ff9a0800rockchip,iommu vpu_mmu/ aclkifacet disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu/ aclkifacet disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu/oX okaypgpu-opp-tableoperating-points-v2Boopp@100000000U\~opp@200000000U \~opp@300000000U\B@opp@400000000Uׄ\opp@500000000Ue\Oopp@600000000U#F\qos@ffaa0000syscon BSqos@ffaa0080syscon BTqos@ffad0000syscon BHqos@ffad0100syscon BIqos@ffad0180syscon BJqos@ffad0400syscon BKqos@ffad0480syscon BLqos@ffad0500syscon BGqos@ffad0800syscon BMqos@ffad0880syscon BNqos@ffad0900syscon BOqos@ffae0000syscon BRqos@ffaf0000syscon BPqos@ffaf0080syscon BQinterrupt-controller@ffc01000 arm,gic-400@ @ `   Befuse@ffb40000rockchip,rk3288-efuse /q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4jgpio0@ff750000rockchip,gpio-banku Q/@ B>gpio1@ff780000rockchip,gpio-bankx R/A gpio2@ff790000rockchip,gpio-banky S/B gpio3@ff7a0000rockchip,gpio-bankz T/C gpio4@ff7b0000rockchip,gpio-bank{ U/D B6gpio5@ff7c0000rockchip,gpio-bank| V/E gpio6@ff7d0000rockchip,gpio-bank} W/F gpio7@ff7e0000rockchip,gpio-bank~ X/G Bxgpio8@ff7f0000rockchip,gpio-bank Y/H hdmihdmi-cec-c0%qhdmi-cec-c7%qhdmi-ddc %qqpcfg-pull-up3Brpcfg-pull-down@Bspcfg-pull-noneOBqpcfg-pull-none-12maO\ Bvsleepglobal-pwroff%qddrio-pwroff%qddr0-retention%rddr1-retention%redpedp-hpd% si2c0i2c0-xfer %qqB<i2c1i2c1-xfer %qqB%i2c2i2c2-xfer % q qBBi2c3i2c3-xfer %qqB&i2c4i2c4-xfer %qqB'i2c5i2c5-xfer %qqB(i2s0i2s0-bus`%qqqqqqBWlcdclcdc-ctl@%qqqqBesdmmcsdmmc-clk%tB sdmmc-cmd%uBsdmmc-cd%rBsdmmc-bus1%rsdmmc-bus4@%uuuuBsdmmc-pwr% qBsdio0sdio0-bus1%rsdio0-bus4@%rrrrsdio0-cmd%rsdio0-clk%qsdio0-cd%rsdio0-wp%rsdio0-pwr%rsdio0-bkpwr%rsdio0-int%rsdio1sdio1-bus1%rsdio1-bus4@%rrrrsdio1-cd%rsdio1-wp%rsdio1-bkpwr%rsdio1-int%rsdio1-cmd%rsdio1-clk%qsdio1-pwr% remmcemmc-clk%qBemmc-cmd%rBemmc-pwr% rBemmc-bus1%remmc-bus4@%rrrremmc-bus8%rrrrrrrrBspi0spi0-clk% rBspi0-cs0% rBspi0-tx%rBspi0-rx%rBspi0-cs1%rspi1spi1-clk% rBspi1-cs0% rB spi1-rx%rBspi1-tx%rBspi2spi2-cs1%rspi2-clk%rB!spi2-cs0%rB$spi2-rx%rB#spi2-tx% rB"uart0uart0-xfer %rqB)uart0-cts%ruart0-rts%quart1uart1-xfer %r qB*uart1-cts% ruart1-rts% quart2uart2-xfer %rqB+uart3uart3-xfer %rqB,uart3-cts% ruart3-rts% quart4uart4-xfer %rqB-uart4-cts% ruart4-rts% qtsadcotp-gpio% qB2otp-out% qB3pwm0pwm0-pin%qBCpwm1pwm1-pin%qBDpwm2pwm2-pin%qBEpwm3pwm3-pin%qBFgmacrgmii-pins%qqqqvvvvqqq vvqqB8rmii-pins%qqqqqqqqqqspdifspdif-tx% qBVpcfg-pull-none-drv-8ma\Btpcfg-pull-up-drv-8ma3\Bubacklightbl-en%qBybuttonspwrbtn%rBlcdlcd-cs%qB|lcd-en%qBpmicpmic-int%rB?usbhost-vbus-drv%qBeth_phyeth-phy-pwr%qBwifiwifi-pwr% qBmemory@0memoryadc-keys adc-keyskwwbuttonsw@button-up Volume Upsbutton-down Volume DownrmenuMenu escEscB@homeHomef backlightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ xsdefaultyzB@B{external-gmac-clock fixed-clocksY@ ext_gmacB7panellg,lp079qx1-sp0vsimple-panel { x|}portsportendpoint~Bkgpio-keys gpio-keys!sdefaultpower >tGPIO Key Power,=Kdvcc-host-regulatorregulator-fixed] >sdefault vcc_host1vcc-phy-regulatorregulator-fixed] >sdefaultvcc_phy2Z2Z1B5vsys-regulatorregulator-fixedvcc_sysLK@LK@1B=sdmmc-regulatorregulator-fixed x sdefaultvcc_sd2Z2ZpC@Bvcc-lcdregulator-fixed] xsdefaultvcc_lcdC@B}vcc-wlregulator-fixed] x sdefaultvcc_wlC #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltbrightness-levelsdefault-brightness-levelenable-gpiospwmsbacklightpower-supplyautorepeatlinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us