o8( .firefly,firefly-rk3288-reloadrockchip,rk3288&7Firefly-RK3288-reloadaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12'@5Hcpu@502cpuarm,cortex-a12'@5Hcpu@503cpuarm,cortex-a12'@5Hcpu-opp-tableoperating-points-v2PHopp-126000000[b opp-216000000[ b opp-312000000[b opp-408000000[Qb opp-600000000[#Fb opp-696000000[)|b~opp-816000000[0,bB@opp-1008000000[<bopp-1200000000[Gbopp-1416000000[TfrbOopp-1512000000[ZJb opp-1608000000[_"bpamba simple-buspdma-controller@ff250000arm,pl330arm,primecell%@w5 apb_pclkH dma-controller@ff600000arm,pl330arm,primecell`@w5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@w5 apb_pclkHfreserved-memorypdma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc р 5Drvbiuciuciu-driveciu-sample  @#resetokay/9K\nydefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc р 5Eswbiuciuciu-driveciu-sample ! @#resetokay/Knydefaultdwmmc@ff0e0000rockchip,rk3288-dw-mshc р 5Ftxbiuciuciu-driveciu-sample "@#reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc р 5Guybiuciuciu-driveciu-sample #@#resetokay/9nydefaultsaradc@ff100000rockchip,saradc $ 5I[saradcapb_pclkW #saradc-apbokayHspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk2 7txrx ,ydefault!"#$ disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk2 7txrx -ydefault%&'( disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclk2  7txrx .ydefault)*+, disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mydefault- disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Oydefault. disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pydefault/ disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qydefault0okayH|serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7AK5MUbaudclkapb_pclkydefault 123okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8AK5NVbaudclkapb_pclkydefault4okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9AK5OWbaudclkapb_pclkydefault5okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :AK5PXbaudclkapb_pclkydefault6okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;AK5QYbaudclkapb_pclkydefault7 disabledthermal-zonesreserve_thermalXn|8cpu_thermalXdn|8tripscpu_alert0ppassiveH9cpu_alert1$passiveH:cpu_crit_ criticalcooling-mapsmap09 map1: gpu_thermalXdn|8tripsgpu_alert0ppassiveH;gpu_crit_ criticalcooling-mapsmap0; tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk #tsadc-apbyinitdefaultsleep<=<sokayH8ethernet@ff290000rockchip,rk3288-gmac)*macirqeth_wake_irq:>85fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB #stmmacethokGW?ninputydefault@ABC{Drgmii 'B@ E0usb@ff500000 generic-ehciP 5usbhostFusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghostG usb2-phyokayydefaultHusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ I usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LydefaultJokaysyr827@40silergy,syr827#@@vdd_cpuO Pgp,@KH syr828@41silergy,syr828#A@vdd_gpuO PgpKact8846@5aactive-semi,act8846ZydefaultLMKKKK%K1K=NregulatorsREG1@vcc_ddrOOgOREG2@vcc_ioO2Zg2ZHREG3@vdd_logOgREG4@vcc_20OgHNREG5 @vccio_sdO2Zg2ZHREG6 @vdd10_lcdOB@gB@REG7@vcca_18Ow@gw@REG8@vcca_33O2Zg2ZHRREG9 @vcca_lanO2Zg2ZHDREG10@vdd_10OB@gB@REG11@vcc_18Ow@gw@HREG12 @vcc18_lcdOw@gw@hym8563@51haoyu,hym8563Qxin32k&OydefaultPHi2c@ff660000rockchip,rk3288-i2cf =i2c5NydefaultQokayes8328@10everest,es8328IRURaRmR5Ri2s_hclki2s_clkpwm@ff680000rockchip,rk3288-pwmhzydefaultS5^pwm disabledpwm@ff680010rockchip,rk3288-pwmhzydefaultT5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh zydefaultU5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0zydefaultV5^pwm disabledbus_intmem@ff700000 mmio-srampppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controllerGhW Hipd_vio@9 5chgfdehilkj$WXYZ[\]^_pd_hevc@11 5op`apd_video@12 5bpd_gpu@13 5cdreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv:>HGjk$#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH>edp-phyrockchip,rk3288-dp-phy5h24m disabledHyio-domains"rockchip,rk3288-io-voltage-domainokay !e,:DHVfrusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclkHIusb-phy@33445^phyclkHFusb-phy@348H5_phyclkHGwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk5T2f7tx 6ydefaultg:>okayHi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 52ff7txrxi2s_hclki2s_clk5Rydefaulthokaycypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk #crypto-rstokayiommu@ff900800rockchip,iommu@ *iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P *isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclki ilm #coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopi def #axiahbdclkjokayportH endpoint@0kH~endpoint@1lHzendpoint@2mHtendpoint@3nHwiommu@ff930300rockchip,iommu  *vopb_mmu5 aclkifacei okayHjvop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopi  #axiahbdclkookayportH endpoint@0pHendpoint@1qH{endpoint@2rHuendpoint@3sHxiommu@ff940300rockchip,iommu  *vopl_mmu5 aclkifacei okayHomipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclki :> disabledportsportendpoint@0tHmendpoint@1uHrlvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdsylcdcvi :> disabledportsport@0endpoint@0wHnendpoint@1xHsdp@ff970000rockchip,rk3288-dp@ b5icdppclkydpo#dp:> disabledportsport@0endpoint@0zHlendpoint@1{Hqhdmi@ff980000rockchip,rk3288-dw-hdmiK:> g5hmniahbisfrceci okay|ydefault}portsportendpoint@0~Hkendpoint@1Hpiommu@ff9a0800rockchip,iommu *vpu_mmu5 aclkiface disablediommu@ff9c0440rockchip,iommu @@@ o *hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ *jobmmugpu5i  disabledgpu-opp-tableoperating-points-v2Hopp@100000000[b~opp@200000000[ b~opp@300000000[bB@opp@400000000[ׄbopp@500000000[ebOopp@600000000[#Fbqos@ffaa0000syscon Hcqos@ffaa0080syscon Hdqos@ffad0000syscon HXqos@ffad0100syscon HYqos@ffad0180syscon HZqos@ffad0400syscon H[qos@ffad0480syscon H\qos@ffad0500syscon HWqos@ffad0800syscon H]qos@ffad0880syscon H^qos@ffad0900syscon H_qos@ffae0000syscon Hbqos@ffaf0000syscon H`qos@ffaf0080syscon Hainterrupt-controller@ffc01000 arm,gic-400+@@ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl:>pgpio0@ff750000rockchip,gpio-banku Q5@Qa+@Hgpio1@ff780000rockchip,gpio-bankx R5AQa+@gpio2@ff790000rockchip,gpio-banky S5BQa+@gpio3@ff7a0000rockchip,gpio-bankz T5CQa+@gpio4@ff7b0000rockchip,gpio-bank{ U5DQa+@HEgpio5@ff7c0000rockchip,gpio-bank| V5EQa+@gpio6@ff7d0000rockchip,gpio-bank} W5FQa+@gpio7@ff7e0000rockchip,gpio-bank~ X5GQa+@HOgpio8@ff7f0000rockchip,gpio-bank Y5HQa+@Hhdmihdmi-cec-c0mH}hdmi-cec-c7mhdmi-ddc mpcfg-pull-up{Hpcfg-pull-downHpcfg-pull-noneHpcfg-pull-none-12ma Hsleepglobal-pwroffmddrio-pwroffmddr0-retentionmddr1-retentionmedpedp-hpdm i2c0i2c0-xfer mHJi2c1i2c1-xfer mH-i2c2i2c2-xfer m  HQi2c3i2c3-xfer mH.i2c4i2c4-xfer mH/i2c5i2c5-xfer mH0i2s0i2s0-bus`mHhlcdclcdc-ctl@mHvsdmmcsdmmc-clkmH sdmmc-cmdmHsdmmc-cdmHsdmmc-bus1msdmmc-bus4@mHsdmmc-pwrm Hsdio0sdio0-bus1msdio0-bus4@mHsdio0-cmdmHsdio0-clkmHsdio0-cdmsdio0-wpmsdio0-pwrmsdio0-bkpwrmsdio0-intmHsdio1sdio1-bus1msdio1-bus4@msdio1-cdmsdio1-wpmsdio1-bkpwrmsdio1-intmsdio1-cmdmsdio1-clkmsdio1-pwrm emmcemmc-clkmHemmc-cmdmHemmc-pwrm Hemmc-bus1memmc-bus4@memmc-bus8mHspi0spi0-clkm H!spi0-cs0m H$spi0-txmH"spi0-rxmH#spi0-cs1mspi1spi1-clkm H%spi1-cs0m H(spi1-rxmH'spi1-txmH&spi2spi2-cs1mspi2-clkmH)spi2-cs0mH,spi2-rxmH+spi2-txm H*uart0uart0-xfer mH1uart0-ctsmH2uart0-rtsmH3uart1uart1-xfer m H4uart1-ctsm uart1-rtsm uart2uart2-xfer mH5uart3uart3-xfer mH6uart3-ctsm uart3-rtsm uart4uart4-xfer mH7uart4-ctsm uart4-rtsm tsadcotp-gpiom H<otp-outm H=pwm0pwm0-pinmHSpwm1pwm1-pinmHTpwm2pwm2-pinmHUpwm3pwm3-pinmHVgmacrgmii-pinsm H@rmii-pinsmphy-intm HCphy-pmebmHBphy-rstmHAspdifspdif-txm Hgpcfg-output-highHpcfg-output-lowHpcfg-pull-up-drv-12ma{ Hact8846pwr-holdmHMpmic-vselmHLirir-intmdvpdvp-pwrm Hcif-pwrm Hhym8563rtc-intmHPkeyspwr-keymHledspower-ledmHwork-ledmHsdiowifi-enablemHusb_hosthost-vbus-drvmHusbhub-rstmHHusb_otgotg-vbus-drvm Hmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacH?flash-regulatorregulator-fixed @vcc_flashOw@gw@Hadc-keys adc-keysbuttonsw@button-recovery Recovery h gpio-keys gpio-keyspower , : GPIO Power tydefaultir-receivergpio-ir-receiver :Oleds gpio-ledspower : firefly:blue:powerydefault @work : firefly:blue:user Prc-feedbackydefaultsdio-pwrseqmmc-pwrseq-simple5 ext_clockydefault fEHsoundsimple-audio-card rSPDIFsimple-audio-card,dai-link@1cpu codec spdif-outlinux,spdif-ditHusb-host-regulatorregulator-fixed  ydefault @vcc_host_5vOLK@gLK@Kvsys-regulatorregulator-fixed@vcc_5vOLK@gLK@HKsdmmc-regulatorregulator-fixed O ydefault@vcc_sdO2Zg2Z Husb-otg-regulatorregulator-fixed   ydefault @vcc_otg_5vOLK@gLK@Kdovdd-1v8-regulatorregulator-fixed   ydefault @dovdd_1v8Ow@gw@Hevcc28-dvp-regulatorregulator-fixed   ydefault @vcc28_dvpO*g*af_28-regulatorregulator-fixed  O ydefault @dvdd_1v2OOgOwifi-regulatorregulator-fixed@vbat_wlO2Zg2ZH #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50mmc-ddr-1_8vmmc-hs200-1_8v#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyDVDD-supplyAVDD-supplyPVDD-supplyHPVDD-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltwakeup-sourcegpiospanic-indicatorlinux,default-triggerreset-gpiossimple-audio-card,namesound-daienable-active-highstartup-delay-us