78\( $#radxa,rock2-squarerockchip,rk3288&7Radxa Rock 2 Squarealiases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12'@5Hcpu@502cpuarm,cortex-a12'@5Hcpu@503cpuarm,cortex-a12'@5Hcpu-opp-tableoperating-points-v2PHopp-126000000[b opp-216000000[ b opp-312000000[b opp-408000000[Qb opp-600000000[#Fb opp-696000000[)|b~opp-816000000[0,bB@opp-1008000000[<bopp-1200000000[Gbopp-1416000000[TfrbOopp-1512000000[ZJb opp-1608000000[_"bpamba simple-buspdma-controller@ff250000arm,pl330arm,primecell%@w5 apb_pclkHdma-controller@ff600000arm,pl330arm,primecell`@w5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@w5 apb_pclkH]reserved-memorypdma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc р 5Drvbiuciuciu-driveciu-sample  @#resetokay/9K\nydefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc р 5Eswbiuciuciu-driveciu-sample ! @#resetokay/Knydefaultdwmmc@ff0e0000rockchip,rk3288-dw-mshc р 5Ftxbiuciuciu-driveciu-sample "@#reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc р 5Guybiuciuciu-driveciu-sample #@#resetokay/9nydefault saradc@ff100000rockchip,saradc $5I[saradcapb_pclkW #saradc-apbokayHspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,ydefault !"# disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -ydefault$%&' disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .ydefault()*+ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mydefault, disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Oydefault- disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pydefault. disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qydefault/okayHsserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkydefault0 disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkydefault1 disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkydefault2okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkydefault3 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkydefault4 disabledthermal-zonesreserve_thermal*85cpu_thermald*85tripscpu_alert0HpTpassiveH6cpu_alert1H$TpassiveH7cpu_critH_T criticalcooling-mapsmap0_6 dmap1_7 dgpu_thermald*85tripsgpu_alert0HpTpassiveH8gpu_critH_T criticalcooling-mapsmap0_8 dtsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk #tsadc-apbyinitdefaultsleep9s:}9sokayH5ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq;85fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB #stmmacethok<*input7rgmii@=ydefault>? K@[ q'u00usb@ff500000 generic-ehciP 5usbhostAusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghostB usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ C usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LydefaultDokayact8846@5aactive-semi,act8846ZEFE&E1E<EregulatorsREG1GVCC_DDRVOnOREG2GVCC_IOV2Zn2ZHREG3GVDD_LOGVB@nB@REG4GVCC_20VnHFREG5 GVCCIO_SDV2Zn2ZHREG6 GVDD10_LCDVB@nB@REG7 GVCCA_CODECV2Zn2ZREG8GVCCA_TPV2Zn2ZREG9 GVCCIO_PMUV2Zn2ZH=REG10GVDD_10VB@nB@REG11GVCC_18Vw@nw@HREG12 GVCC18_LCDVw@nw@syr827@40silergy,syr827@,Gvdd_cpuV Pnp@EH syr828@41silergy,syr828A,V PnpGvdd_gpu@EHwhym8563@51haoyu,hym8563Qxin32k&GydefaultHHi2c@ff660000rockchip,rk3288-i2cf =i2c5NydefaultIokayes8388@10everest,es8388everest,es83285qHpwm@ff680000rockchip,rk3288-pwmh*ydefaultJ5^pwm disabledpwm@ff680010rockchip,rk3288-pwmh*ydefaultK5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh *ydefaultL5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0*ydefaultM5^pwm disabledbus_intmem@ff700000 mmio-srampppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controller5h H`pd_vio@9 5chgfdehilkj$INOPQRSTUVpd_hevc@11 5opIWXpd_video@12 5IYpd_gpu@13 5IZ[reboot-modesyscon-reboot-modePWRBcRBqRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv;Hjk$#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH;edp-phyrockchip,rk3288-dp-phy5h24m disabledHpio-domains"rockchip,rk3288-io-voltage-domainokay==)usbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclkHCusb-phy@33445^phyclk5\HAusb-phy@348H5_phyclkHBwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifA hclkmclk5T]tx 6ydefault^;okayHi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sA 5]]txrxi2s_hclki2s_clk5Rydefault_RmokayHcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk #crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk` ilm #coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop` def #axiahbdclkaokayportH endpoint@0bHtendpoint@1cHqendpoint@2dHkendpoint@3eHniommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface` okayHavop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop`  #axiahbdclkfokayportH endpoint@0gHuendpoint@1hHrendpoint@2iHlendpoint@3jHoiommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface` okayHfmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk` ; disabledportsportendpoint@0kHdendpoint@1lHilvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdsylcdcm` ; disabledportsport@0endpoint@0nHeendpoint@1oHjdp@ff970000rockchip,rk3288-dp@ b5icdppclkpdpo#dp; disabledportsport@0endpoint@0qHcendpoint@1rHhhdmi@ff980000rockchip,rk3288-dw-hdmiA; g5hmniahbisfrcec` okaysportsportendpoint@0tHbendpoint@1uHgiommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5v` okaywgpu-opp-tableoperating-points-v2Hvopp@100000000[b~opp@200000000[ b~opp@300000000[bB@opp@400000000[ׄbopp@500000000[ebOopp@600000000[#Fbqos@ffaa0000syscon HZqos@ffaa0080syscon H[qos@ffad0000syscon HOqos@ffad0100syscon HPqos@ffad0180syscon HQqos@ffad0400syscon HRqos@ffad0480syscon HSqos@ffad0500syscon HNqos@ffad0800syscon HTqos@ffad0880syscon HUqos@ffad0900syscon HVqos@ffae0000syscon HYqos@ffaf0000syscon HWqos@ffaf0080syscon HXinterrupt-controller@ffc01000 arm,gic-400@ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl;pgpio0@ff750000rockchip,gpio-banku Q5@"HGgpio1@ff780000rockchip,gpio-bankx R5A"gpio2@ff790000rockchip,gpio-banky S5B"gpio3@ff7a0000rockchip,gpio-bankz T5C"H~gpio4@ff7b0000rockchip,gpio-bank{ U5D"H@gpio5@ff7c0000rockchip,gpio-bank| V5E"gpio6@ff7d0000rockchip,gpio-bank} W5F"gpio7@ff7e0000rockchip,gpio-bank~ X5G"Hgpio8@ff7f0000rockchip,gpio-bank Y5H"Hhdmihdmi-cec-c0.xhdmi-cec-c7.xhdmi-ddc .xxpcfg-pull-up<Hypcfg-pull-downIHzpcfg-pull-noneXHxpcfg-pull-none-12maXe H{sleepglobal-pwroff.xddrio-pwroff.xddr0-retention.yddr1-retention.yedpedp-hpd. zi2c0i2c0-xfer .xxHDi2c1i2c1-xfer .xxH,i2c2i2c2-xfer . x xHIi2c3i2c3-xfer .xxH-i2c4i2c4-xfer .xxH.i2c5i2c5-xfer .xxH/i2s0i2s0-bus`.xxxxxxH_lcdclcdc-ctl@.xxxxHmsdmmcsdmmc-clk.xH sdmmc-cmd.yHsdmmc-cd.yHsdmmc-bus1.ysdmmc-bus4@.yyyyHsdmmc-pwr. xHsdio0sdio0-bus1.ysdio0-bus4@.yyyyHsdio0-cmd.yHsdio0-clk.xHsdio0-cd.ysdio0-wp.ysdio0-pwr.ysdio0-bkpwr.ysdio0-int.yHsdio1sdio1-bus1.ysdio1-bus4@.yyyysdio1-cd.ysdio1-wp.ysdio1-bkpwr.ysdio1-int.ysdio1-cmd.ysdio1-clk.xsdio1-pwr. yemmcemmc-clk.xHemmc-cmd.yHemmc-pwr. yemmc-bus1.yemmc-bus4@.yyyyemmc-bus8.yyyyyyyyHemmc-reset. xH}spi0spi0-clk. yH spi0-cs0. yH#spi0-tx.yH!spi0-rx.yH"spi0-cs1.yspi1spi1-clk. yH$spi1-cs0. yH'spi1-rx.yH&spi1-tx.yH%spi2spi2-cs1.yspi2-clk.yH(spi2-cs0.yH+spi2-rx.yH*spi2-tx. yH)uart0uart0-xfer .yxH0uart0-cts.yuart0-rts.xuart1uart1-xfer .y xH1uart1-cts. yuart1-rts. xuart2uart2-xfer .yxH2uart3uart3-xfer .yxH3uart3-cts. yuart3-rts. xuart4uart4-xfer .yxH4uart4-cts. yuart4-rts. xtsadcotp-gpio. xH9otp-out. xH:pwm0pwm0-pin.xHJpwm1pwm1-pin.xHKpwm2pwm2-pin.xHLpwm3pwm3-pin.xHMgmacrgmii-pins.xxxx{{{{xxx {{xxH>rmii-pins.xxxxxxxxxxphy-rst.|H?spdifspdif-tx. xH^pcfg-output-hightH|irir-int.yHkeyspwr-key.yHpmicpmic-int.yHHheadphonehp-det.xHphone-ctl.yHusbhost-vbus-drv.xHsatasata-pwr-en. xHsdiowifi-enable.xHmemory@0memoryemmc-pwrseqmmc-pwrseq-emmc}ydefault ~ Hexternal-gmac-clock fixed-clocksY@ ext_gmacH<flash-regulatorregulator-fixedGvcc_sysVw@nw@Hvsys-regulatorregulator-fixedGvcc_sysVLK@nLK@HEchosenserial2:115200n8adc-keys adc-keysbuttonsw@button-recovery Recoveryhgpio-keys gpio-keyspower G GPIO Powertydefault gpio-leds gpio-ledsheartbeat rock2:green:state1 heartbeatmmc G rock2:blue:state2 mmc0ir-receivergpio-ir-receiver ydefaultsoundsimple-audio-card /SPDIFsimple-audio-card,dai-link@1cpu Fcodec Fsata-prw-regulatorregulator-fixed P VG ydefault Gsata_pwrspdif-outlinux,spdif-ditAHsound-i2srockchip,rk3288-hdmi-analogydefault c x   I2S AnalogLOUT2AnalogROUT2sdio-pwrseqmmc-pwrseq-simple5 ext_clockydefault @Hvcc-host-regulatorregulator-fixed P VGydefault Gvcc_hostH\sdmmc-regulatorregulator-fixed V ydefaultGvcc_sdV2Zn2ZH #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqmmc-pwrseqnon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usrx_delaytx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizesystem-power-controllerinl1-supplyinl2-supplyinl3-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onfcs,suspend-voltage-selectorregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplyAVDD-supplyDVDD-supplyHPVDD-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830lcdc-supplysdcard-supplywifi-supplyvbus-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highreset-gpiosstartup-delay-usstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltwakeup-sourcelinux,default-triggersimple-audio-card,namesound-daienable-active-highrockchip,audio-codecrockchip,hp-det-gpiosrockchip,hp-en-gpiosrockchip,i2s-controllerrockchip,modelrockchip,routing