28y(.x,Freescale i.MX6 Quad SABRE Automotive Board!fsl,imx6q-sabreautofsl,imx6qchosenaliases),/soc/aips-bus@02100000/ethernet@02188000(6/soc/aips-bus@02000000/flexcan@02090000(;/soc/aips-bus@02000000/flexcan@02094000%@/soc/aips-bus@02000000/gpio@0209c000%F/soc/aips-bus@02000000/gpio@020a0000%L/soc/aips-bus@02000000/gpio@020a4000%R/soc/aips-bus@02000000/gpio@020a8000%X/soc/aips-bus@02000000/gpio@020ac000%^/soc/aips-bus@02000000/gpio@020b0000%d/soc/aips-bus@02000000/gpio@020b4000$j/soc/aips-bus@02100000/i2c@021a0000$o/soc/aips-bus@02100000/i2c@021a4000$t/soc/aips-bus@02100000/i2c@021a8000&y/soc/aips-bus@02100000/usdhc@02190000&~/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02018000memorymemoryinterrupt-controller@00a01000!arm,cortex-a9-gicclocksckil!fsl,imx-ckilfixed-clock"/ckih1!fsl,imx-ckih1fixed-clock"/osc!fsl,imx-oscfixed-clock"/n6soc !simple-bus?Pdma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 0W    bgpmi0gpmi1gpmi2gpmi3r}jgpmi-nand@00112000!fsl,imx6q-gpmi-nand @ gpmi-nandbch Wbbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-txokaydefaulttimer@00a00600!arm,cortex-a9-twd-timer  W l2-cache@00a02000!arm,pl310-cache  W\  <<pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@pciHP Wxbmsi-{zyxpciepcie_buspcie_phy disabledpmu!arm,cortex-a9-pmu W^aips-bus@02000000!fsl,aips-bussimple-busPspba-bus@02000000!fsl,spba-bussimple-busPspdif@02004000!fsl,imx35-spdif@@ W4 rxtxHkv5corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7okaydefaultFFecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ Wppipgper rxtx disabled; Sdefault m25p80@0 !st,m25p32\1-ecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W qqipgper rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W!rripgper rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ W"ssipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper rxtx disabledesai@02024000@@ W3ssi@02028000*!fsl,imx6q-ssifsl,imx51-ssifsl,imx21-ssi@ W. %&rxtxn}&% disabledssi@0202c000*!fsl,imx6q-ssifsl,imx51-ssifsl,imx21-ssi@ W/ )*rxtxn}*) disabledssi@02030000*!fsl,imx6q-ssifsl,imx51-ssifsl,imx21-ssi@ W0 -.rxtxn}.- disabledasrc@02034000@@ W2spba@0203c000@ecspi@02018000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W#ttipgper disabledvpu@02040000W aipstz@0207c000@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm@ WS>ipgperpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ WT>ipgperpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ WU>ipgperdefault okayGGpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ WV>ipgperflexcan@02090000!fsl,imx6q-flexcan @ Wnlmipgper disabledflexcan@02094000!fsl,imx6q-flexcan @@ Wonoipgper disabledgpt@02098000!fsl,imx6q-gptfsl,imx31-gpt @ W7wxipgpergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @WBCgpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @WDEgpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@WFGgpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @WHIgpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @WJKEEgpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @WLM$$gpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@WNOkpp@020b8000 @ WRwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ WPwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ WQ disabledccm@020c4000!fsl,imx6q-ccm @@WWX"anatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $W16  regulator-1p1@110!fsl,anatop-regulatorvdd1p1 5 1FY 5lregulator-3p0@120!fsl,anatop-regulatorvdd3p0*0  1FY( l3@regulator-2p5@130!fsl,anatop-regulatorvdd2p5)0 01FYl)0regulator-vddcore@140!fsl,anatop-regulatorvddarm   @1pFY l ==regulator-vddpu@140!fsl,anatop-regulatorvddpu   @ 1pFY l >>regulator-vddsoc@140!fsl,anatop-regulatorvddsoc   @1pFY l ??tempmon!fsl,imx6q-tempmon W1  usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  W, usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  W- snvs@020cc000!fsl,sec-v4.0-monsimple-bus P @snvs-rtc-lp@34!fsl,sec-v4.0-mon-rtc-lp4XWepit@020d0000 @ W8epit@020d4000 @@ W9src@020d8000!fsl,imx6q-srcfsl,imx51-src @W[`--gpc@020dc000!fsl,imx6q-gpc @WYZiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8iomuxc@020e0000!fsl,imx6q-iomuxc@default ipu2ipu2grp-1\p`tdxh|lptx|imx6qdl-sabreautohoggrpHPdP pY  ecspi1grpHecspi1cs  enetgrp@Xl\p`tdxh|tDpHxL|PTlX0<   gpioledsgrpDDgpminandgrp i2c2grp0@@%%pwm1grp   spdifgrp uart4grp0 8,,usdhc3grppYYpYpYpYpYpYpYpYpY!!usdhc3grp100mhzppppppppp""usdhc3grp200mhzppppppppp##weimcs0grp ''weimnorgrpTh`PdL`H\DX@T<P8L4H0D,@(<$8 40,(&&ldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldbokay@!"'()*8di0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0okayspwgport@0endpoint'00port@1endpoint'44port@2endpoint'77port@3endpoint'::display-timings7hsd100pxn1/@CKS_(lx< lvds-channel@1 disabledport@0endpoint'11port@1endpoint'55port@2endpoint'88port@3endpoint';;hdmi@0120000 Ws{| iahbisfr disabled!fsl,imx6q-hdmiport@0endpoint'..port@1endpoint'22port@2endpoint'66port@3endpoint'99dcic@020e4000@@ W|dcic@020e8000@ W}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ Wipgahbrimx/sdma/sdma-imx6q.binaips-bus@02100000!fsl,aips-bussimple-busPcaam@02100000Wijaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ W+ disabledusb@02184200!fsl,imx6q-usbfsl,imx27-usbB W( disabledusb@02184400!fsl,imx6q-usbfsl,imx27-usbD W) disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF W* disabledusbmisc@02184800!fsl,imx6q-usbmiscHethernet@02188000!fsl,imx6q-fec@wuu ipgahbptpokaydefault rgmiimlb@0218c000@$W5u~usdhc@02190000!fsl,imx6q-usdhc@ W ipgahbper disabledusdhc@02194000!fsl,imx6q-usdhc@@ W ipgahbper disabledusdhc@02198000!fsl,imx6q-usdhc@ W ipgahbperokay"defaultstate_100mhzstate_200mhz!"# $  usdhc@0219c000!fsl,imx6q-usdhc@ W ipgahbper disabledi2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ W$} disabledi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ W%~okay/default%pfuze100@08 !fsl,pfuze100regulatorssw1ab8#5jsw1c8#5jsw2 52Z#sw3a"#sw3b"#sw4 52ZswbstLK@N0vsnvsB@-#vrefddr#vgen1 5vgen2 5vgen3w@2Zvgen4w@2Zvgen5w@2Zvgen6w@2Zi2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ W& disabledromcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ Wdefault&'P disablednor@0,0 !cfi-flash JUb ocotp@021bc000!fsl,imx6q-ocotpsyscon@  tzasc@021d0000@ Wltzasc@021d4000@@ Wmaudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@ disabledmipi@021dc000@mipi@021e0000@ disabledport@0endpoint'(//port@1endpoint')33port@2endpoint'*port@3endpoint'+vdoa@021e4000@@ Wserial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper rxtx disabledserial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper rxtx disabledserial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper  rxtxokaydefault,serial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ Wipgper !"rxtx disabledipu@02400000!fsl,imx6q-ipu@@W busdi0di1h-port@2@@endpoint@0endpoint@1'.endpoint@2'/((endpoint@3'0endpoint@4'1port@3AAendpoint@0endpoint@1'2endpoint@2'3))endpoint@3'4endpoint@4'5sram@00900000 !mmio-sramsata@02200000!fsl,imx6q-ahci @ W'isatasata_refahbokayipu@02800000!fsl,imx6q-ipu@W busdi0di1h-port@2BBendpoint@0endpoint@1'6endpoint@2**endpoint@3'7endpoint@4'8port@3CCendpoint@1'9endpoint@2++endpoint@3':endpoint@4';cpuscpu@0!arm,cortex-a9cpuo<(Otx2  0 (Otx2   l(h)armpll2_pfd2_396msteppll1_swpll1_sys=>?cpu@1!arm,cortex-a9cpuo<cpu@2!arm,cortex-a9cpuo<cpu@3!arm,cortex-a9cpuo<display-subsystem!fsl,imx-display-subsystem@ABCleds !gpio-ledsdefaultDuserdebug VEsound-spdif,!fsl,imx-audio-spdiffsl,imx-sabreauto-spdif imx-spdifFbacklight!pwm-backlight GLK@  @okay #address-cells#size-cellsmodelcompatibleethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1spi4device_typereg#interrupt-cellsinterrupt-controllerlinux,phandle#clock-cellsclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclocksreg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0cache-unifiedcache-levelarm,tag-latencyarm,data-latencynum-lanesinterrupt-map-maskinterrupt-mapfsl,spi-num-chipselectscs-gpiosspi-max-frequencyfsl,fifo-depthfsl,ssi-dma-events#pwm-cellsgpio-controller#gpio-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthfsl,tempmonfsl,tempmon-datafsl,anatop#reset-cellsfsl,pinsgprfsl,data-mappingfsl,data-widthremote-endpointnative-modehactivevactivehback-porchhfront-porchvback-porchvfront-porchhsync-lenvsync-lenfsl,sdma-ram-script-namefsl,usbphyfsl,usbmisc#index-cellsinterrupts-extendedphy-modebus-widthpinctrl-1pinctrl-2cd-gpioswp-gpiosregulator-boot-onregulator-ramp-delaybank-widthfsl,weim-cs-timingresetsnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportslabelspdif-controllerspdif-inpwmsbrightness-levelsdefault-brightness-level