h8Ӥ(lCvariscite,var-dvk-om44variscite,var-som-om44ti,omap4460ti,omap4&7Variscite VAR-DVK-OM44chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@48350000Q/ocp/serial@4806a000Y/ocp/serial@4806c000a/ocp/serial@48020000i/ocp/serial@4806e000 q/display z/connector@0memorymemory@cpuscpu@0arm,cortex-a9cpucpuW0 `O  cpu@1arm,cortex-a9cpuinterrupt-controller@48241000arm,cortex-a9-gic,H$H$ l2-cache-controller@48242000arm,pl310-cacheH$ =K local-timer@48240600arm,cortex-a9-twd-timerH$  W socti,omap-inframpu ti,omap4-mpubmpudsp ti,omap3-c64bdspiva ti,ivahdbivaocpti,omap4-l3-nocsimple-buslbl3_main_1l3_main_2l3_main_3DD EW  cm1@4a004000 ti,omap4-cm1J@ clocksextalt_clkin_cks fixed-clockD IIpad_clks_src_cks fixed-clock pad_clks_cksti,gate-clock $$pad_slimbus_core_clks_cks fixed-clock UUsecure_32k_clk_src_cks fixed-clockslimbus_src_clks fixed-clock slimbus_clksti,gate-clock  %%sys_32k_cks fixed-clock **virt_12000000_cks fixed-clock ++virt_13000000_cks fixed-clock]@ ,,virt_16800000_cks fixed-clockY --virt_19200000_cks fixed-clock$ ..virt_26000000_cks fixed-clock //virt_27000000_cks fixed-clock 00virt_38400000_cks fixed-clockI 11tie_low_clock_cks fixed-clock 66utmi_phy_clkout_cks fixed-clock [[xclk60mhsp1_cks fixed-clock WWxclk60mhsp2_cks fixed-clock YYxclk60motg_cks fixed-clock \\dpll_abe_cksti,omap4-dpll-m4xen-clock  dpll_abe_x2_cksti,omap4-dpll-x2-clock   dpll_abe_m2x2_cksti,divider-clock   abe_24m_fclksfixed-factor-clock   abe_clksti,divider-clock   aess_fclksti,divider-clock ( dpll_abe_m3x2_cksti,divider-clock  core_hsd_byp_clk_mux_cks ti,mux-clock , dpll_core_cksti,omap4-dpll-core-clock  $,( dpll_core_x2_cksti,omap4-dpll-x2-clock dpll_core_m6x2_cksti,divider-clock@ 55dpll_core_m2_cksti,divider-clock0 ddrphy_cksfixed-factor-clockdpll_core_m5x2_cksti,divider-clock< div_core_cksti,divider-clock div_iva_hs_clksti,divider-clock div_mpu_hs_clksti,divider-clock dpll_core_m4x2_cksti,divider-clock8 dll_clk_div_cksfixed-factor-clockdpll_abe_m2_cksti,divider-clock  dpll_core_m3x2_gate_cks ti,composite-no-wait-gate-clock4 dpll_core_m3x2_div_cksti,composite-divider-clock4 dpll_core_m3x2_cksti,composite-clock ``dpll_core_m7x2_cksti,divider-clockD LLiva_hsd_byp_clk_mux_cks ti,mux-clock  dpll_iva_cksti,omap4-dpll-clock  dpll_iva_x2_cksti,omap4-dpll-x2-clock dpll_iva_m4x2_cksti,divider-clockdpll_iva_m5x2_cksti,divider-clockdpll_mpu_cksti,omap4-dpll-clock `dlh dpll_mpu_m2_cksti,divider-clockpper_hs_clk_div_cksfixed-factor-clock ==usb_hs_clk_div_cksfixed-factor-clock CCl3_div_cksti,divider-clock l4_div_cksti,divider-clock ^^lp_clk_div_cksfixed-factor-clock  22mpu_periphclksfixed-factor-clock ocp_abe_iclksti,divider-clock(per_abe_24m_fclksfixed-factor-clock SSdmic_sync_mux_cks ti,mux-clock !"8 ##func_dmic_abe_gfclks ti,mux-clock #$%8mcasp_sync_mux_cks ti,mux-clock !"@ &&func_mcasp_abe_gfclks ti,mux-clock &$%@mcbsp1_sync_mux_cks ti,mux-clock !"H ''func_mcbsp1_gfclks ti,mux-clock '$%Hmcbsp2_sync_mux_cks ti,mux-clock !"P ((func_mcbsp2_gfclks ti,mux-clock ($%Pmcbsp3_sync_mux_cks ti,mux-clock !"X ))func_mcbsp3_gfclks ti,mux-clock )$%Xslimbus1_fclk_1sti,gate-clock" `slimbus1_fclk_0sti,gate-clock `slimbus1_fclk_2sti,gate-clock$ `slimbus1_slimbus_clksti,gate-clock% `timer5_sync_muxs ti,mux-clock!*htimer6_sync_muxs ti,mux-clock!*ptimer7_sync_muxs ti,mux-clock!*xtimer8_sync_muxs ti,mux-clock!*dummy_cks fixed-clockclockdomainsprm@4a306000 ti,omap4-prmJ0`0clockssys_clkin_cks ti,mux-clock+,-./01  abe_dpll_bypass_clk_mux_cks ti,mux-clock * abe_dpll_refclk_mux_cks ti,mux-clock *  dbgclk_mux_cksfixed-factor-clock l4_wkup_clk_mux_cks ti,mux-clock 2 ::syc_clk_div_cksti,divider-clock  !!gpio1_dbclksti,gate-clock*8dmt1_clk_muxs ti,mux-clock *@usim_cksti,divider-clock3X 44usim_fclksti,gate-clock4Xpmd_stm_clock_mux_cks ti,mux-clock 56  77pmd_trace_clk_mux_cks ti,mux-clock 56  88stm_clk_div_cksti,divider-clock7@ trace_clk_div_div_cksti,divider-clock8  99trace_clk_div_cksti,clkdm-gate-clock9 <<div_ts_cksti,divider-clock:   ;;bandgap_ts_fclksti,gate-clock;clockdomainsemu_sys_clkdmti,clockdomain<cm2@4a008000 ti,omap4-cm2J0clocksper_hsd_byp_clk_mux_cks ti,mux-clock =L >>dpll_per_cksti,omap4-dpll-clock >@DLH ??dpll_per_m2_cksti,divider-clock?P GGdpll_per_x2_cksti,omap4-dpll-x2-clock?P @@dpll_per_m2x2_cksti,divider-clock@P FFdpll_per_m3x2_gate_cks ti,composite-no-wait-gate-clock@T AAdpll_per_m3x2_div_cksti,composite-divider-clock@T BBdpll_per_m3x2_cksti,composite-clockAB aadpll_per_m4x2_cksti,divider-clock@X 33dpll_per_m5x2_cksti,divider-clock@\ JJdpll_per_m6x2_cksti,divider-clock@` EEdpll_per_m7x2_cksti,divider-clock@d MMdpll_usb_cksti,omap4-dpll-j-type-clock C DDdpll_usb_clkdcoldo_cksti,fixed-factor-clockD,dpll_usb_m2_cksti,divider-clockD HHducati_clk_mux_cks ti,mux-clockEfunc_12m_fclksfixed-factor-clockFfunc_24m_clksfixed-factor-clockG ""func_24mc_fclksfixed-factor-clockF TTfunc_48m_fclksti,divider-clockF RRfunc_48mc_fclksfixed-factor-clockF KKfunc_64m_fclksti,divider-clock3 QQfunc_96m_fclksti,divider-clockF NNinit_60m_fclksti,divider-clockH VVper_abe_nc_fclksti,divider-clock OOaes1_fcksti,gate-clockaes2_fcksti,gate-clockdss_sys_clksti,gate-clock!   dss_tv_clksti,gate-clockI   dss_dss_clksti,gate-clockJ : dss_48mhz_clksti,gate-clockK   dss_fcksti,gate-clock  fdif_fcksti,divider-clock3(gpio2_dbclksti,gate-clock*`gpio3_dbclksti,gate-clock*hgpio4_dbclksti,gate-clock*pgpio5_dbclksti,gate-clock*xgpio6_dbclksti,gate-clock*sgx_clk_muxs ti,mux-clockLM hsi_fcksti,divider-clockF8iss_ctrlclksti,gate-clockN mcbsp4_sync_mux_cks ti,mux-clockNO PPper_mcbsp4_gfclks ti,mux-clockP$hsmmc1_fclks ti,mux-clockQN(hsmmc2_fclks ti,mux-clockQN0ocp2scp_usb_phy_phy_48msti,gate-clockRsha2md5_fcksti,gate-clockslimbus2_fclk_1sti,gate-clockS 8slimbus2_fclk_0sti,gate-clockT8slimbus2_slimbus_clksti,gate-clockU 8smartreflex_core_fcksti,gate-clock:8smartreflex_iva_fcksti,gate-clock:0smartreflex_mpu_fcksti,gate-clock:(cm2_dm10_muxs ti,mux-clock *(cm2_dm11_muxs ti,mux-clock *0cm2_dm2_muxs ti,mux-clock *8cm2_dm3_muxs ti,mux-clock *@cm2_dm4_muxs ti,mux-clock *Hcm2_dm9_muxs ti,mux-clock *Pusb_host_fs_fcksti,gate-clockK __utmi_p1_gfclks ti,mux-clockVWX XXusb_host_hs_utmi_p1_clksti,gate-clockXXutmi_p2_gfclks ti,mux-clockVYX ZZusb_host_hs_utmi_p2_clksti,gate-clockZ Xusb_host_hs_utmi_p3_clksti,gate-clockV Xusb_host_hs_hsic480m_p1_clksti,gate-clockH Xusb_host_hs_hsic60m_p1_clksti,gate-clockV Xusb_host_hs_hsic60m_p2_clksti,gate-clockV Xusb_host_hs_hsic480m_p2_clksti,gate-clockHXusb_host_hs_func48mclksti,gate-clockKXusb_host_hs_fcksti,gate-clockVXotg_60m_gfclks ti,mux-clock[\` ]]usb_otg_hs_xclksti,gate-clock]`usb_otg_hs_icksti,gate-clock`usb_phy_cm_clk32ksti,gate-clock*@ usb_tll_hs_usb_ch2_clksti,gate-clockV husb_tll_hs_usb_ch0_clksti,gate-clockVhusb_tll_hs_usb_ch1_clksti,gate-clockV husb_tll_hs_icksti,gate-clock^hclockdomainsl3_init_clkdmti,clockdomainD_scrm@4a30a000ti,omap4-scrmJ0 clocksauxclk0_src_gate_cks ti,composite-no-wait-gate-clock` bbauxclk0_src_mux_cksti,composite-mux-clock `a ccauxclk0_src_cksti,composite-clockbc ddauxclk0_cksti,divider-clockd ttauxclk1_src_gate_cks ti,composite-no-wait-gate-clock` eeauxclk1_src_mux_cksti,composite-mux-clock `a ffauxclk1_src_cksti,composite-clockef ggauxclk1_cksti,divider-clockg uuauxclk2_src_gate_cks ti,composite-no-wait-gate-clock` hhauxclk2_src_mux_cksti,composite-mux-clock `a iiauxclk2_src_cksti,composite-clockhi jjauxclk2_cksti,divider-clockj vvauxclk3_src_gate_cks ti,composite-no-wait-gate-clock` kkauxclk3_src_mux_cksti,composite-mux-clock `a llauxclk3_src_cksti,composite-clockkl mmauxclk3_cksti,divider-clockm wwauxclk4_src_gate_cks ti,composite-no-wait-gate-clock`  nnauxclk4_src_mux_cksti,composite-mux-clock `a  ooauxclk4_src_cksti,composite-clockno ppauxclk4_cksti,divider-clockp  xxauxclk5_src_gate_cks ti,composite-no-wait-gate-clock`$ qqauxclk5_src_mux_cksti,composite-mux-clock `a$ rrauxclk5_src_cksti,composite-clockqr ssauxclk5_cksti,divider-clocks$ yyauxclkreq0_cks ti,mux-clocktuvwxyauxclkreq1_cks ti,mux-clocktuvwxyauxclkreq2_cks ti,mux-clocktuvwxyauxclkreq3_cks ti,mux-clocktuvwxyauxclkreq4_cks ti,mux-clocktuvwxy auxclkreq5_cks ti,mux-clocktuvwxy$clockdomainscounter@4a304000ti,omap-counter32kJ0@  bcounter_32kpinmux@4a100040 ti,omap4-padconfpinctrl-singleJ@,Mkdefaultzpinmux_twl6040_pins\` pinmux_mcpdm_pins( pinmux_tsc2004_pinsPR pinmux_uart3_pins  pinmux_hsusbb1_pins`            zzpinmux_hsusbb1_phy_rst_pinsL pinmux_i2c1_pins pinmux_i2c3_pins pinmux_mmc1_pins0 pinmux_twl6030_pins^A pinmux_uart2_pins  pinmux_wl12xx_ctrl_pins"$& pinmux_mmc4_pins0 pinmux_uart1_pins  ~~pinmux_mcspi1_pins  pinmux_mcsasp_pinspinmux_dss_dpi_pins"$&(*,.0246tvxz|~ pinmux_dss_hdmi_pinsZ\^ pinmux_i2c4_pins pinmux_mmc5_pins8   pinmux_gpio_led_pins>@ pinmux_gpio_key_pinsb pinmux_ks8851_irq_pins< pinmux_hdmi_hpd_pinsX  pinmux_backlight_pins pinmux@4a31e040 ti,omap4-padconfpinctrl-singleJ1@8,Mkdefault{|pinmux_hsusbb1_phy_clk_pins pinmux_hsusbb1_hub_rst_pins {{pinmux_lan7500_rst_pins ||pinmux_twl6030_wkup_pins tisyscon@4a1005a0sysconJp }}pbias_regulatorti,pbias-omap`}pbias_mmc_omap4pbias_mmc_omap4w@- dma-controller@4a056000ti,omap4430-sdmaJ`0W    gpio@4a310000ti,omap4-gpioJ1 Wbgpio1!3C,gpio@48055000ti,omap4-gpioHP Wbgpio23C, gpio@48057000ti,omap4-gpioHp Wbgpio33C, gpio@48059000ti,omap4-gpioH W bgpio43C, gpio@4805b000ti,omap4-gpioH W!bgpio53C,gpio@4805d000ti,omap4-gpioH W"bgpio63C, gpmc@50000000ti,omap4430-gpmcP WO[bgpmcmfck disabledserial@4806a000ti,omap4-uartH WHbuart1lokaydefault~serial@4806c000ti,omap4-uartHIbuart2lokaydefaultserial@48020000ti,omap4-uartHJbuart3ldefaultokayserial@4806e000ti,omap4-uartHFbuart4l disabledspinlock@4a0f6000ti,omap4-hwspinlockJ` bspinlocki2c@48070000 ti,omap4-i2cH W8bi2c1defaultokaytwl@48H W& ti,twl6030,defaultrtcti,twl4030-rtcW regulator-vaux1ti,twl6030-vaux1B@-regulator-vaux2ti,twl6030-vaux2O*regulator-vaux3ti,twl6030-vaux3B@-regulator-vmmcti,twl6030-vmmcO- regulator-vppti,twl6030-vppw@&%regulator-vusimti,twl6030-vusim--regulator-vdacti,twl6030-vdac regulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxio regulator-vusbti,twl6030-vusb regulator-v1v8ti,twl6030-v1v8 regulator-v2v1ti,twl6030-v2v1 regulator-clk32kgti,twl6030-clk32kgusb-comparatorti,twl6030-usbW pwmti,twl6030-pwmpwmledti,twl6030-pwmledtwl@4b ti,twl6040Kdefault Ww&  i2c@48072000 ti,omap4-i2cH  W9bi2c2 disabledi2c@48060000 ti,omap4-i2cH W=bi2c3defaultokaytsc2004@48 ti,tsc2004Hdefault&W disabledtmp105@49 ti,tmp105Ieeprom@50microchip,24c32Pi2c@48350000 ti,omap4-i2cH5 W>bi2c4okaydefaultspi@48098000ti,omap4-mcspiH  WAbmcspi1@#$%&'()* !tx0rx0tx1rx1tx2rx2tx3rx3okaydefaulteth@0ks8851default+n6&W spi@4809a000ti,omap4-mcspiH  WBbmcspi2 +,-.!tx0rx0tx1rx1 disabledspi@480b8000ti,omap4-mcspiH  W[bmcspi3!tx0rx0 disabledspi@480ba000ti,omap4-mcspiH  W0bmcspi4FG!tx0rx0 disabledmmc@4809c000ti,omap4-hsmmcH  WSbmmc1=J=>!txrxadefaultnzokaymmc@480b4000ti,omap4-hsmmcH @ WVbmmc2J/0!txrx disabledmmc@480ad000ti,omap4-hsmmcH  W^bmmc3JMN!txrx disabledmmc@480d1000ti,omap4-hsmmcH  W`bmmc4J9:!txrxokaydefaultnzmmc@480d5000ti,omap4-hsmmcH P W;bmmc5J;<!txrxokaydefaultnz mmu@4a066000ti,omap4-iommuJ` Wbmmu_dspmmu@55082000ti,omap4-iommuU  Wdbmmu_ipuwdt@4a314000ti,omap4-wdtti,omap3-wdtJ1@ WP bwd_timer2mcpdm@40132000ti,omap4-mcpdm@ I mpudma WpbmcpdmAB!up_linkdn_linkokaydefault dmic@4012e000ti,omap4-dmic@Impudma WrbdmicC!up_link disabledmcbsp@40122000ti,omap4-mcbsp@ I mpudma Wcommonbmcbsp1!"!txrx disabledmcbsp@40124000ti,omap4-mcbsp@@I@mpudma Wcommonbmcbsp2!txrx disabledmcbsp@40126000ti,omap4-mcbsp@`I`mpudma Wcommonbmcbsp3!txrx disabledmcbsp@48096000ti,omap4-mcbspH `mpu Wcommonbmcbsp4 !txrx disabledkeypad@4a31c000ti,omap4-keypadJ1 Wxmpubkbd disableddmm@4e000000 ti,omap4-dmmN Wqbdmmemif@4c000000 ti,emif-4dL Wnbemif1m%emif@4d000000 ti,emif-4dM Wobemif2m%ocp2scp@4a0ad000ti,omap-ocp2scpJ lbocp2scp_usb_phyusb2phy@4a0ad080 ti,omap-usb2J ЀX8wkupclkD timer@4a318000ti,omap3430-timerJ1 W%btimer1Otimer@48032000ti,omap3430-timerH  W&btimer2timer@48034000ti,omap4430-timerH@ W'btimer3timer@48036000ti,omap4430-timerH` W(btimer4timer@40138000ti,omap4430-timer@I W)btimer5^timer@4013a000ti,omap4430-timer@I W*btimer6^timer@4013c000ti,omap4430-timer@I W+btimer7^timer@4013e000ti,omap4430-timer@I W,btimer8k^timer@4803e000ti,omap4430-timerH W-btimer9ktimer@48086000ti,omap3430-timerH` W.btimer10ktimer@48088000ti,omap4430-timerH W/btimer11kusbhstll@4a062000 ti,usbhs-tllJ  WN busb_tll_hsusbhshost@4a064000ti,usbhs-hostJ@ busb_host_hsl VWY3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 xehci-phyohci@4a064800ti,ohci-omap3JH& WLehci@4a064c00 ti,ehci-omapJL& WMcontrol-phy@4a002300ti,control-phy-usb2J#power control-phy@4a00233cti,control-phy-otghsJ#<otghs_control usb_otg_hs@4a0ab000ti,omap4-musbJ W\]mcdma busb_otg_hs usb2-phy 8~2aes@4b501000 ti,omap4-aesbaesKP WUon!txrxdes@480a5000 ti,omap4-desbdesH P WRut!txrxregulator-abb-mpu ti,abb-v2abb_mpu 2okayJ0{J0`J"h'base-addressint-addressefuse-addressxO1regulator-abb-iva ti,abb-v2abb_ivaˀ 2okayJ0{J0`J"h'base-addressint-addressefuse-addressx~e  dss@58000000 ti,omap4-dssXokay bdss_corefckldefaultdispc@58001000ti,omap4-dispcX W bdss_dispcfckencoder@58002000ti,omap4-rfbiX  disabled bdss_rfbifckickencoder@58003000ti,omap4-vencX0 disabled bdss_vencfckencoder@58004000 ti,omap4-dsiX@XB@XC protophypll W5 disabled bdss_dsi1 fcksys_clkencoder@58005000 ti,omap4-dsiXPXR@XS protophypll WTokay bdss_dsi2 fcksys_clkencoder@58006000ti,omap4-hdmi X`XbXcXdwppllphycore Weokay bdss_hdmi fcksys_clkL !audio_txdefaultportendpoint( portendpoint(8 bandgapJ"`J#,J#xti,omap4460-bandgap W~ C pmuarm,cortex-a9-pmuW67bdebugssthermal-zonescpu_thermalYo}tripscpu_alertpassive cpu_critH criticalcooling-mapsmap0 sound@0ti,abe-twl6040 VAR-SOM-OM44ILHeadset StereophoneHSOLHeadset StereophoneHSORAFMLLine InAFMRLine Inhsusb1_phyusb-nop-xceivdefault w main_clk$ fixedregulator-vbatregulator-fixedVBAT2Z2Z  wl12xx_vmmcdefaultregulator-fixedvwl1271w@w@  p leds gpio-ledsdefaultled0-var:green:led0   3heartbeatled1-var:green:led1  gpio-keys gpio-keysdefaultuser-key@184-user ITconnector@0hdmi-connectordefault-hdmia dportendpoint( displayinnolux,at070tn83panel-dpi-lcdpanel-timingUn(z (0 portendpoint( backlightgpio-backlightdefault  #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3display0display1device_typeregnext-level-cacheclocksclock-namesclock-latencyoperating-pointscooling-min-levelcooling-max-level#cooling-cellslinux,phandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptsti,hwmodsranges#clock-cellsclock-frequencyti,bit-shiftti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitclock-multclock-divti,index-power-of-twoti,dividersti,clock-divti,clock-multti,set-rate-parentpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#dma-cells#dma-channels#dma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpmc,num-csgpmc,num-waitpinsti,no-idle-on-initstatusinterrupts-extended#hwlock-cellsregulator-always-onusb-supply#pwm-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,spi-num-csdmasdma-namesspi-max-frequencyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablecap-power-off-cardcd-gpiosti,iommu-bus-err-backreg-namesinterrupt-namesti,buffer-sizephy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertctrl-module#phy-cellsti,timer-alwonti,timer-dspti,timer-pwmport1-modephysusb-phyphy-namesmultipointnum-epsram-bitsinterface-typepowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdd-supplyvdda-supplyremote-endpointdata-lines#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingreset-gpiosvcc-supplyregulator-boot-onstartup-delay-uslabellinux,default-triggerlinux,codegpio-key,wakeuphpd-gpioshback-porchhactivehfront-porchhsync-lenvback-porchvactivevfront-porchvsync-len