Ð þíßÄ8Öd( `Ö,"ti,omap4-sdpti,omap4430ti,omap4&7TI OMAP4 SDP boardchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@48350000Q/ocp/serial@4806a000Y/ocp/serial@4806c000a/ocp/serial@48020000i/ocp/serial@4806e000+q/ocp/dss@58000000/encoder@58004000/display+z/ocp/dss@58000000/encoder@58005000/display ƒ/connector@0memoryŒmemory˜€@cpuscpu@0arm,cortex-a9Œcpuœ˜­´cpuÀ“à Γà£è 'ÀO€ 5èa€ûßñ¬¬cpu@1arm,cortex-a9Œcpuœ˜interrupt-controller@48241000arm,cortex-a9-gic 5˜H$H$l2-cache-controller@48242000arm,pl310-cache˜H$ FTlocal-timer@48240600arm,cortex-a9-twd-timer­˜H$  ` socti,omap-inframpu ti,omap4-mpukmpudsp ti,omap3-c64kdspiva ti,ivahdkivaocpti,omap4-l3-nocsimple-busukl3_main_1l3_main_2l3_main_3˜DD€ E`  cm1@4a004000 ti,omap4-cm1˜J@ clocksextalt_clkin_ck| fixed-clock‰„DÀGGpad_clks_src_ck| fixed-clock‰·pad_clks_ck|ti,gate-clock­™˜$$pad_slimbus_core_clks_ck| fixed-clock‰·SSsecure_32k_clk_src_ck| fixed-clock‰€slimbus_src_clk| fixed-clock‰·slimbus_clk|ti,gate-clock­™ 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$,(dpll_core_x2_ck|ti,omap4-dpll-x2-clock­dpll_core_m6x2_ck|ti,divider-clock­¦±˜@ÃÚ55dpll_core_m2_ck|ti,divider-clock­¦±˜0ÃÚddrphy_ck|fixed-factor-clock­ñüdpll_core_m5x2_ck|ti,divider-clock­¦±˜<ÃÚdiv_core_ck|ti,divider-clock­˜¦div_iva_hs_clk|ti,divider-clock­¦˜Üdiv_mpu_hs_clk|ti,divider-clock­¦˜œdpll_core_m4x2_ck|ti,divider-clock­¦±˜8ÃÚdll_clk_div_ck|fixed-factor-clock­ñüdpll_abe_m2_ck|ti,divider-clock­ ¦˜ðÃdpll_core_m3x2_gate_ck| ti,composite-no-wait-gate-clock­™˜4dpll_core_m3x2_div_ck|ti,composite-divider-clock­¦˜4Ãdpll_core_m3x2_ck|ti,composite-clock­__dpll_core_m7x2_ck|ti,divider-clock­¦±˜DÃÚJJiva_hsd_byp_clk_mux_ck| ti,mux-clock­ ™˜¬dpll_iva_ck|ti,omap4-dpll-clock­ ˜ ¤¬¨dpll_iva_x2_ck|ti,omap4-dpll-x2-clock­dpll_iva_m4x2_ck|ti,divider-clock­¦±˜¸ÃÚdpll_iva_m5x2_ck|ti,divider-clock­¦±˜¼ÃÚdpll_mpu_ck|ti,omap4-dpll-clock­ ˜`dlhdpll_mpu_m2_ck|ti,divider-clock­¦±˜pÃÚper_hs_clk_div_ck|fixed-factor-clock­ñü;;usb_hs_clk_div_ck|fixed-factor-clock­ñüAAl3_div_ck|ti,divider-clock­™¦˜l4_div_ck|ti,divider-clock­™¦˜]]lp_clk_div_ck|fixed-factor-clock­ ñü22mpu_periphclk|fixed-factor-clock­ñüocp_abe_iclk|ti,divider-clock­™˜(per_abe_24m_fclk|fixed-factor-clock­ñüQQdmic_sync_mux_ck| ti,mux-clock ­ !"™˜8##func_dmic_abe_gfclk| ti,mux-clock ­#$%™˜8mcasp_sync_mux_ck| ti,mux-clock ­ !"™˜@&&func_mcasp_abe_gfclk| ti,mux-clock ­&$%™˜@mcbsp1_sync_mux_ck| ti,mux-clock ­ !"™˜H''func_mcbsp1_gfclk| ti,mux-clock ­'$%™˜Hmcbsp2_sync_mux_ck| ti,mux-clock ­ !"™˜P((func_mcbsp2_gfclk| ti,mux-clock ­($%™˜Pmcbsp3_sync_mux_ck| ti,mux-clock ­ !"™˜X))func_mcbsp3_gfclk| ti,mux-clock ­)$%™˜Xslimbus1_fclk_1|ti,gate-clock­"™ ˜`slimbus1_fclk_0|ti,gate-clock­ ™˜`slimbus1_fclk_2|ti,gate-clock­$™ ˜`slimbus1_slimbus_clk|ti,gate-clock­%™ ˜`timer5_sync_mux| ti,mux-clock­!*™˜htimer6_sync_mux| ti,mux-clock­!*™˜ptimer7_sync_mux| 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ti,mux-clock­C˜func_12m_fclk|fixed-factor-clock­Dñüfunc_24m_clk|fixed-factor-clock­Eñü""func_24mc_fclk|fixed-factor-clock­DñüRRfunc_48m_fclk|ti,divider-clock­D˜PPfunc_48mc_fclk|fixed-factor-clock­DñüIIfunc_64m_fclk|ti,divider-clock­3˜OOfunc_96m_fclk|ti,divider-clock­D˜LLinit_60m_fclk|ti,divider-clock­F˜UUper_abe_nc_fclk|ti,divider-clock­˜¦MMaes1_fck|ti,gate-clock­™˜ aes2_fck|ti,gate-clock­™˜¨dss_sys_clk|ti,gate-clock­!™ ˜ ¡¡dss_tv_clk|ti,gate-clock­G™ ˜   dss_dss_clk|ti,gate-clock­H™˜ Cžždss_48mhz_clk|ti,gate-clock­I™ ˜ §§dss_fck|ti,gate-clock­™˜ ŸŸfdif_fck|ti,divider-clock­3™¦˜(gpio2_dbclk|ti,gate-clock­*™˜`gpio3_dbclk|ti,gate-clock­*™˜hgpio4_dbclk|ti,gate-clock­*™˜pgpio5_dbclk|ti,gate-clock­*™˜xgpio6_dbclk|ti,gate-clock­*™˜€sgx_clk_mux| ti,mux-clock­JK™˜ hsi_fck|ti,divider-clock­D™¦˜8iss_ctrlclk|ti,gate-clock­L™˜ mcbsp4_sync_mux_ck| ti,mux-clock­LM™˜àNNper_mcbsp4_gfclk| ti,mux-clock­N$™˜àhsmmc1_fclk| ti,mux-clock­OL™˜(hsmmc2_fclk| ti,mux-clock­OL™˜0ocp2scp_usb_phy_phy_48m|ti,gate-clock­P™˜àsha2md5_fck|ti,gate-clock­™˜Èslimbus2_fclk_1|ti,gate-clock­Q™ ˜8slimbus2_fclk_0|ti,gate-clock­R™˜8slimbus2_slimbus_clk|ti,gate-clock­S™ ˜8smartreflex_core_fck|ti,gate-clock­T™˜8smartreflex_iva_fck|ti,gate-clock­T™˜0smartreflex_mpu_fck|ti,gate-clock­T™˜(cm2_dm10_mux| ti,mux-clock­ *™˜(cm2_dm11_mux| ti,mux-clock­ *™˜0cm2_dm2_mux| ti,mux-clock­ *™˜8cm2_dm3_mux| ti,mux-clock­ *™˜@cm2_dm4_mux| ti,mux-clock­ *™˜Hcm2_dm9_mux| ti,mux-clock­ *™˜Pusb_host_fs_fck|ti,gate-clock­I™˜Ð^^utmi_p1_gfclk| ti,mux-clock­UV™˜XWWusb_host_hs_utmi_p1_clk|ti,gate-clock­W™˜Xutmi_p2_gfclk| ti,mux-clock­UX™˜XYYusb_host_hs_utmi_p2_clk|ti,gate-clock­Y™ ˜Xusb_host_hs_utmi_p3_clk|ti,gate-clock­U™ ˜Xusb_host_hs_hsic480m_p1_clk|ti,gate-clock­F™ ˜Xusb_host_hs_hsic60m_p1_clk|ti,gate-clock­U™ ˜Xusb_host_hs_hsic60m_p2_clk|ti,gate-clock­U™ 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