88(i(Amlogic S905X5M BM202 Development Boardamlogic,bm202amlogic,s7d"1cpus"1cpu@0=cpuarm,cortex-a55IMpscicpu@100=cpuarm,cortex-a55IMpscicpu@200=cpuarm,cortex-a55IMpscicpu@300=cpuarm,cortex-a55IMpscisecure-monitoramlogic,meson-gxbb-smpower-controlleramlogic,s7d-pwrc[timerarm,armv8-timer0o   psci arm,psci-1.0Tsmcxtal-clk fixed-clockzn6xtalsoc simple-bus"1interrupt-controller@fff01000 arm,gic-400" I  o bus@fe000000 simple-busIH"1Hserial@7a000'amlogic,s7d-uartamlogic,meson-s4-uartI o xtalpclkbaudokaypinctrl@4000'amlogic,pinctrl-s7damlogic,pinctrl-s7"1@@gpio@c0 I  gpiomux gpio@100 I0  gpiomuxgpio@140 I@ , gpiomux gpio@180 I @ gpiomuxgpio@1c0 I H gpiomuxgpio@200 I $ gpiomuxgpio@240 I@  gpiomuxgpio@280 I  gpiomuxgpio@2c0I gpiogpio@300 I  gpiomuxinterrupt-controller@4080.amlogic,s7d-gpio-intcamlogic,meson-gpio-intcI@ 0+ ao-secure@102208amlogic,s7d-ao-secureamlogic,meson-gx-ao-securesysconI @FaliasesZ/soc/bus@fe000000/serial@7a000memory@0=memoryIreserved-memory"1secmon@5000000shared-dma-poolI@b modelcompatibleinterrupt-parent#address-cells#size-cellsdevice_typeregenable-method#power-domain-cellsinterruptsclock-frequencyclock-output-names#clock-cellsphandleranges#interrupt-cellsinterrupt-controllerclocksclock-namesstatusreg-namesgpio-controller#gpio-cellsgpio-rangesamlogic,channel-interruptsamlogic,has-chip-idserial0no-map