8 ( i ',TQ-Systems i.MX8DXP TQMa8XDP on MBa8Xx;2tq,imx8dxp-tqma8xdp-mba8xxtq,imx8dxp-tqma8xdpfsl,imx8dxpaliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000Q/bus@5d000000/gpio@5d080000W/bus@5d000000/gpio@5d090000]/bus@5d000000/gpio@5d0a0000c/bus@5d000000/gpio@5d0b0000i/bus@5d000000/gpio@5d0c0000o/bus@5d000000/gpio@5d0d0000u/bus@5d000000/gpio@5d0e0000{/bus@5d000000/gpio@5d0f0000/bus@5a000000/i2c@5a800000/bus@5a000000/i2c@5a810000/bus@5a000000/i2c@5a820000/bus@5a000000/i2c@5a830000/bus@5b000000/mmc@5b010000/bus@5b000000/mmc@5b020000/bus@5b000000/mmc@5b030000/bus@5d000000/mailbox@5d1b0000/bus@5d000000/mailbox@5d1c0000/bus@5d000000/mailbox@5d1d0000/bus@5d000000/mailbox@5d1e0000/bus@5d000000/mailbox@5d1f0000/bus@5a000000/serial@5a060000/bus@5a000000/serial@5a070000/bus@5a000000/serial@5a080000/bus@5a000000/serial@5a090000/bus@5a000000/spi@5a000000/bus@5a000000/spi@5a010000/bus@5a000000/spi@5a020000/bus@5a000000/spi@5a030000 /vpu@2c000000/vpu-core@2d080000 /vpu@2c000000/vpu-core@2d090000"/bus@5a000000/i2c@5a810000/rtc@51/system-controller/rtccpus cpu@0 cpu2arm,cortex-a35psci(5@GTa@s cpu@1 cpu2arm,cortex-a35psci(5@GTa@s  l2-cache02cache*7@Iopp-table2operating-points-v2opp-9000000005B@Iopp-1200000000GIinterrupt-controller@51a00000 2arm,gic-v3 QQ + @ reserved-memory Kdecoder-boot@84000000R$encoder-boot@86000000 R'decoder-rpc@92000000R%dsp@92400000@R Ydisabledencoder-rpc@94400000@pR(linux,cma2shared-dma-pool`0 i0vpmu2arm,cortex-a35-pmu @psci 2arm,psci-1.0!smcsystem-controller 2fsl,imx-scu tx0rx0gip3$power-controller2fsl,imx8qxp-scu-pdfsl,scu-pdclock-controller2fsl,imx8qxp-clkfsl,scu-clkpinctrl2fsl,imx8qxp-iomuxcflexspi0grpMMMMMMMMMMMMMMMlpi2c1grpv!w!jlpi2c1gpiogrpv!w!kusdhc1grp A ! ! ! !!!!!!Ausdhc1-100mhzgrp @      @usdhc1-200mhzgrp @      @adc0grp0d`c`f`e`wadmapwmgrp `!fbllvdsgrp y!can0grpo!p!zcan1grpr!q!{ethphy0grp@@ethphy3grp@@fec1grp5A4A&@%@'@(@)@*@-@,@.@/@0@1@fec2grp9@7@?@@@8@:@;@B@A@>@=@<@gpiobuttonsgrpg h lpi2c2grpz!{!rlpi2c2gpiogrpz!{!slpuart1grpN M alpuart3grpm n dlsgpio3grp !pca9538grp  opciebgrp$AAAregpcie1v5grp W!regpcie3v3grp X!sai1grp<LAiAjAkAlA7spi1grp<SARAUAT!V!Xspi2grp0\A[AZAY![spi3grp<EAGAFAH!I!^usbotg1grp!!usdhc2gpiogrp!!usdhc2grpTA! !!!"!#!!usdhc2-100mhzgrpT@ ! " #  usdhc2-200mhzgrpT@ ! " #  ocotp2fsl,imx8qxp-scu-ocotp mac@2c4mac@2c6keys"2fsl,imx8qxp-sc-keyfsl,imx-sc-keyt Ydisabledreset-controller2fsl,imx-scu-resetrtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt<thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermaltimer2arm,armv8-timer0@   clock-dummy 2fixed-clock  clk_dummyclock-xtal32k 2fixed-clock  xtal_32KHzclock-xtal24m 2fixed-clockn6  xtal_24MHzthermal-zonescpu0-thermal3IWctripstrip0gsspassivetrip1gs criticalcooling-mapsmap0~ pmic-thermal3IWtripstrip0gspassive trip1gHs criticalcooling-mapsmap0~  clock-img-ipg 2fixed-clock   img_ipg_clkclock-img-pxl 2fixed-clock#F  img_pxl_clk"bus@58000000 2simple-bus KXXisi@58100000XH@)*+,-.0 per0per1per2per3per4per50yz{|}~ Ydisabled2fsl,imx8qxp-isiports port@2endpointirqsteer@58220000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerX"+ @@ipg gpio@582220002fsl,imx8qm-gpiofsl,imx35-gpioX" +@clock-controller@582230182fsl,imx8qxp-lpcgX"0  csi0_lpcg_core_clkyclock-controller@5822301c2fsl,imx8qxp-lpcgX"0  csi0_lpcg_esc_clkyi2c@58226000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cX"`@peripg n6 Ydisabledcsi@582270002fsl,imx8qxp-mipi-csi2X"pX" coreescuiu*Jy$ Ydisabledports port@0port@1endpointirqsteer@58240000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerX$+ @Aipg  Ydisabledgpio@582420002fsl,imx8qm-gpiofsl,imx35-gpioX$ +@ Ydisabledclock-controller@582430182fsl,imx8qxp-lpcgX$0  csi1_lpcg_core_clky Ydisabledclock-controller@5824301c2fsl,imx8qxp-lpcgX$0  csi1_lpcg_esc_clky Ydisabledi2c@58246000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cX$`@peripg n6 Ydisabledcsi@582470002fsl,imx8qxp-mipi-csi2X$pX$ coreescuiu*Jy$ Ydisabledirqsteer@58260000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerX&+ @BipgF  Ydisabledclock-controller@582630042fsl,imx8qxp-lpcgX&0 F pi0_lpcg_ipg_clkyclock-controller@582630182fsl,imx8qxp-lpcgX&0 F pi0_lpcg_pxl_clkyclock-controller@5826301c2fsl,imx8qxp-lpcgX&0 F pi0_lpcg_misc_clkyi2c@58266000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cX&`@Iperipg In6I Ydisabledjpegdec@58400000X@ @5   2nxp,imx8qxp-jpgdecYokayjpegenc@58450000XE @1!!!! 2nxp,imx8qxp-jpgencYokayclock-controller@585000002fsl,imx8qxp-lpcgXP" pdma0_lpcg_clky clock-controller@585100002fsl,imx8qxp-lpcgXQ" pdma1_lpcg_clkz clock-controller@585200002fsl,imx8qxp-lpcgXR" pdma2_lpcg_clk{ clock-controller@585300002fsl,imx8qxp-lpcgXS" pdma3_lpcg_clk|clock-controller@585400002fsl,imx8qxp-lpcgXT" pdma4_lpcg_clk}clock-controller@585500002fsl,imx8qxp-lpcgXU" pdma5_lpcg_clk~clock-controller@585600002fsl,imx8qxp-lpcgXV" pdma6_lpcg_clkclock-controller@585700002fsl,imx8qxp-lpcgXW" pdma7_lpcg_clkclock-controller@585800002fsl,imx8qxp-lpcgXX" csi0_lpcg_pxl_clkclock-controller@585900002fsl,imx8qxp-lpcgXY" csi1_lpcg_pxl_clk Ydisabledclock-controller@585a00002fsl,imx8qxp-lpcgXZ" hdmi_rx_lpcg_pxl_link_clkclock-controller@585d00002fsl,imx8qxp-lpcgX]0 img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clk clock-controller@585f00002fsl,imx8qxp-lpcgX_0 img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clk!vpu@2c000000 K,,,Yokay2nxp,imx8qxp-vpumailbox@2d0000002fsl,imx6sx-mu- @+Yokay#mailbox@2d0200002fsl,imx6sx-mu- @+Yokay&vpu-core@2d080000-2nxp,imx8q-vpu-decoder tx0tx1rx$###Yokay7$%vpu-core@2d090000-2nxp,imx8q-vpu-encoder tx0tx1rx$&&&Yokay7'(bus@31400000 2simple-bus K1@1@ crypto@314000002fsl,imx8qxp-caamfsl,sec-v4.01@  @  K1@ E jr@30000+2fsl,imx8qxp-job-ringfsl,sec-v4.0-job-ring @jr@40000+2fsl,imx8qxp-job-ringfsl,sec-v4.0-job-ring @clock-cm40-ipg 2fixed-clock)  cm40_ipg_clk,bus@34000000 2simple-bus K44)serial@372200002fsl,imx8qxp-lpuart7"@** ipgbaud n6 Ydisabledi2c@37230000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c7#@ ++peripg  n6  Ydisabledintmux@374000002fsl,imx-intmux7@`@+,ipg! Ydisabled)clock-controller@376200002fsl,imx8qxp-lpcg7b,* cm40_lpcg_uart_clkcm40_lpcg_uart_ipg_clk*clock-controller@376300002fsl,imx8qxp-lpcg7c ,( cm40_lpcg_i2c_clkcm40_lpcg_i2c_ipg_clk +bus@53000000 2simple-bus KSSgpu@53100000 2vivante,gcS @@ coreshader)'2clock-audio-ipg 2fixed-clock' audio_ipg_clk4clock-ext-aud-mclk0 2fixed-clock ext_aud_mclk0Gclock-ext-aud-mclk1 2fixed-clock ext_aud_mclk1Hclock-esai0-rx 2fixed-clock  esai0_rx_clkIclock-esai0-rx-hf 2fixed-clock esai0_rx_hf_clkJclock-esai0-tx 2fixed-clock  esai0_tx_clkKclock-esai0-tx-hf 2fixed-clock esai0_tx_hf_clkLclock-spdif0-rx 2fixed-clock  spdif0_rxMclock-sai0-rx-bclk 2fixed-clock  sai0_rx_bclkNclock-sai0-tx-bclk 2fixed-clock  sai0_tx_bclkOclock-sai1-rx-bclk 2fixed-clock  sai1_rx_bclkPclock-sai1-tx-bclk 2fixed-clock  sai1_tx_bclkQclock-sai2-rx-bclk 2fixed-clock  sai2_rx_bclkRclock-sai3-rx-bclk 2fixed-clock  sai3_rx_bclkSclock-sai4-rx-bclk 2fixed-clock  sai4_rx_bclkTbus@59000000 2simple-bus KYYasrc@590000002fsl,imx8qm-asrcY @td--./00memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`Q111111Vrxarxbrxctxatxbtxc`@n} Ydisabledesai@59010000!2fsl,imx8qm-esaifsl,imx6ull-esaiY @222coreextalfsysspba Q11Vrxtx Ydisabledspdif@590200002fsl,imx8qm-spdifY@0334:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba Q11 Vrxtx Ydisabledsai@590400002fsl,imx8qm-saiY @:55busmclk0mclk1mclk2mclk3Vrxtx Q1 1 > Ydisabledsai@590500002fsl,imx8qm-saiY @<66busmclk0mclk1mclk2mclk3Vrxtx Q11?Yokay,EEE6.default7sai@590600002fsl,imx8qm-saiY @>88busmclk0mclk1mclk2mclk3VrxQ1@ Ydisabledsai@590700002fsl,imx8qm-saiY @C99busmclk0mclk1mclk2mclk3VrxQ1 Ydisableddma-controller@591f00002fsl,imx8qm-edmaY\ ,@vwxyz{;;==?Dq@ABCDEFGHIJKLMNOPQRSTUVW1clock-controller@594000002fsl,imx8qxp-lpcgY@4 asrc0_lpcg_ipg_clk-clock-controller@594100002fsl,imx8qxp-lpcgYA 04( esai0_lpcg_extal_clkesai0_lpcg_ipg_clk2clock-controller@594200002fsl,imx8qxp-lpcgYB 04% spdif0_lpcg_tx_clkspdif0_lpcg_gclkw3clock-controller@594400002fsl,imx8qxp-lpcgYD 0 4! sai0_lpcg_mclksai0_lpcg_ipg_clk>5clock-controller@594500002fsl,imx8qxp-lpcgYE 0 4! sai1_lpcg_mclksai1_lpcg_ipg_clk?6clock-controller@594600002fsl,imx8qxp-lpcgYF 04! sai2_lpcg_mclksai2_lpcg_ipg_clk@8clock-controller@594700002fsl,imx8qxp-lpcgYG 04! sai3_lpcg_mclksai3_lpcg_ipg_clk9clock-controller@595800002fsl,imx8qxp-lpcgYX 444 4 dsp_lpcg_adb_clkdsp_lpcg_ipg_clkdsp_lpcg_core_clk:clock-controller@595900002fsl,imx8qxp-lpcgYY4 dsp_ram_lpcg_ipg_clk;dsp@596e80002fsl,imx8qxp-hifi4Yn:;:ipgocramcore txrxrxdb$<<<imx/dsp/hifi4.bin Ydisabledasrc@598000002fsl,imx8qm-asrcY @|d==./00memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`Q>>>>>>Vrxarxbrxctxatxbtxc`@n} Ydisabledsai@598200002fsl,imx8qm-saiY @I??busmclk0mclk1mclk2mclk3 Q>> Vrxtx YdisabledBsai@598300002fsl,imx8qm-saiY @K@@busmclk0mclk1mclk2mclk3Q> Vtx YdisabledCamix@598400002fsl,imx8qm-audmixYAipgBC Ydisabledmqs@598500002fsl,imx8qm-mqsYDD mclkcore Ydisableddma-controller@599f00002fsl,imx8qm-edmaY  @~JJLsXlmnopqrstuv>clock-controller@59d000002fsl,imx8qxp-lpcgY E aud_rec_clk0_lpcg_clkEEclock-controller@59d100002fsl,imx8qxp-lpcgY  aud_rec_clk1_lpcg_clkFclock-controller@59d200002fsl,imx8qxp-lpcgY E aud_pll_div_clk0_lpcg_clkE.clock-controller@59d300002fsl,imx8qxp-lpcgY  aud_pll_div_clk1_lpcg_clk/clock-controller@59d500002fsl,imx8qxp-lpcgY0 mclkout0_lpcg_clkmclock-controller@59d600002fsl,imx8qxp-lpcgY0 mclkout1_lpcg_clkacm@59e000002fsl,imx8qxp-acmYE>?@XEF./GHIJKLMNOPQRSTaud_rec_clk0_lpcg_clkaud_rec_clk1_lpcg_clkaud_pll_div_clk0_lpcg_clkaud_pll_div_clk1_lpcg_clkext_aud_mclk0ext_aud_mclk1esai0_rx_clkesai0_rx_hf_clkesai0_tx_clkesai0_tx_hf_clkspdif0_rxsai0_rx_bclksai0_tx_bclksai1_rx_bclksai1_tx_bclksai2_rx_bclksai3_rx_bclksai4_rx_bclk0clock-controller@59c000002fsl,imx8qxp-lpcgY4 asrc1_lpcg_ipg_clk=clock-controller@59c200002fsl,imx8qxp-lpcgY 04! sai4_lpcg_mclksai4_lpcg_ipg_clk?clock-controller@59c300002fsl,imx8qxp-lpcgY 04! sai5_lpcg_mclksai5_lpcg_ipg_clk@clock-controller@59c400002fsl,imx8qxp-lpcgY4 amix_lpcg_ipg_clkAclock-controller@59c500002fsl,imx8qxp-lpcgY 04! mqs0_lpcg_mclkmqs0_lpcg_ipg_clkDclock-dma-ipg 2fixed-clock'  dma_ipg_clkgbus@5a000000 2simple-bus KZZspi@5a0000002fsl,imx7ulp-spiZ  @PUUperipg 55 QVVVtxrx Ydisabledspi@5a0100002fsl,imx7ulp-spiZ  @QWWperipg 66 QVVVtxrxYokaydefaultXYYspi@5a0200002fsl,imx7ulp-spiZ  @RZZperipg 77 QVVVtxrxYokaydefault[ \spi@5a0300002fsl,imx7ulp-spiZ  @S]]peripg 88 QVVVtxrxYokaydefault^ Yserial@5a060000Z @Y__ ipgbaud 9Ĵ9Vrxtx QVV  Ydisabled2fsl,imx8qxp-lpuartserial@5a070000Z @Z`` ipgbaud :Ĵ:Vrxtx QV V Yokay2fsl,imx8qxp-lpuartdefaultaserial@5a080000Z @[bb ipgbaud ;Ĵ;Vrxtx QV V  Ydisabled2fsl,imx8qxp-lpuartserial@5a090000Z  @\cc ipgbaud <Ĵ<Vrxtx QVVYokay2fsl,imx8qxp-lpuartdefaultdpwm@5a1900002fsl,imx8qxp-pwmfsl,imx27-pwmZ @eeipgper n6defaultfdma-controller@5a1f00002fsl,imx8qm-edmaZ@CVclock-controller@5a4000002fsl,imx8qxp-lpcgZ@5g  spi0_lpcg_clkspi0_lpcg_ipg_clk5Uclock-controller@5a4100002fsl,imx8qxp-lpcgZA6g  spi1_lpcg_clkspi1_lpcg_ipg_clk6Wclock-controller@5a4200002fsl,imx8qxp-lpcgZB7g  spi2_lpcg_clkspi2_lpcg_ipg_clk7Zclock-controller@5a4300002fsl,imx8qxp-lpcgZC8g  spi3_lpcg_clkspi3_lpcg_ipg_clk8]clock-controller@5a4600002fsl,imx8qxp-lpcgZF9g' uart0_lpcg_baud_clkuart0_lpcg_ipg_clk9_clock-controller@5a4700002fsl,imx8qxp-lpcgZG:g' uart1_lpcg_baud_clkuart1_lpcg_ipg_clk:`clock-controller@5a4800002fsl,imx8qxp-lpcgZH;g' uart2_lpcg_baud_clkuart2_lpcg_ipg_clk;bclock-controller@5a4900002fsl,imx8qxp-lpcgZI<g' uart3_lpcg_baud_clkuart3_lpcg_ipg_clk<cclock-controller@5a5900002fsl,imx8qxp-lpcgZYg( adma_pwm_lpcg_clkadma_pwm_lpcg_ipg_clkei2c@5a800000Z@  @hhperipg `n6` Ydisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a810000Z@  @iiperipg an6aYokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c defaultgpiojk \ \temperature-sensor@1b2nxp,se97bjedec,jc-42.4-temprtc@512nxp,pcf85063aQXeeprom@532nxp,se97batmel,24c02S3<Fleeprom@57 2atmel,24c64W3 Flaudio-codec@182ti,tlv320aic32x4mmclkQn\ltemperature-sensor@1c2nxp,se97bjedec,jc-42.4-tempeeprom@542nxp,se97batmel,24c02T3Flgpio@70 2nxp,pca9538pdefaultop@+Fn3iLED_ALED_BDSI_ENUSB_RESET#V_12V_ENPCIE_DIS#i2c@5a820000Z@  @qqperipg bn6bYokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c defaultgpiors \ ti2c@5a830000Z@  @uuperipg cn6c Ydisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cadc@5a8800002nxp,imx8qxp-adcyZ @vvperipg en6eYokaydefaultwnadc@5a8900002nxp,imx8qxp-adcyZ @xxperipg fn6f Ydisabledcan@5a8d00002fsl,imx8qm-flexcanZ @yyipgper ibZiYokaydefaultzlcan@5a8e00002fsl,imx8qm-flexcanZ @yyipgper ibZjYokaydefault{lcan@5a8f00002fsl,imx8qm-flexcanZ @yyipgper ibZk Ydisableddma-controller@5a9f00002fsl,imx8qm-edmaZ l@E@clock-controller@5ac000002fsl,imx8qxp-lpcgZ`g  i2c0_lpcg_clki2c0_lpcg_ipg_clk`hclock-controller@5ac100002fsl,imx8qxp-lpcgZag  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interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3spi0spi1spi2spi3vpu-core0vpu-core1rtc0rtc1device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapstatusreusablealloc-rangeslinux,cma-defaultmbox-namesmboxes#power-domain-cells#clock-cellsfsl,pinslinux,keycodeswakeup-source#reset-cellstimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceclock-namespower-domainsremote-endpointfsl,channelfsl,num-irqs#gpio-cellsgpio-controllerclock-indicesassigned-clocksassigned-clock-ratesresets#mbox-cellsmemory-regionfsl,sec-eradmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-mappinctrl-namespinctrl-0#dma-cellsdma-channelsdma-channel-maskfirmware-namedaiscs-gpiosnum-cs#pwm-cellspinctrl-1scl-gpiossda-gpiosquartz-load-femtofaradspagesizeread-onlyvcc-supplyiov-supplyldoin-supplygpio-line-names#io-channel-cellsvref-supplyfsl,clk-sourcefsl,scu-indexxceiver-supplyfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordsrp-disablehnp-disableadp-disablepower-active-highover-current-active-lowdr_mode#index-cellsfsl,tuning-start-tapfsl,tuning-steppinctrl-2vqmmc-supplyvmmc-supplybus-widthnon-removableno-sdiono-sdcd-gpioswp-gpiosno-1-8-vno-mmcfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handleti,rx-internal-delayti,tx-internal-delayti,fifo-depthti,dp83867-rxctrl-strap-quirkti,clk-output-selreset-gpiosreset-assert-usreset-deassert-usenet-phy-lane-no-swapreg-namesinterrupt-namesphysphy-namescdns,on-chip-buff-size#phy-cellsgpio-rangesspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthenable-gpiosdma-rangesbus-rangeinterrupt-mapinterrupt-map-masknum-lanesnum-viewportfsl,max-link-speedvpcie-supplynum-ib-windowsnum-ob-windowsfsl,hsio-cfgfsl,refclk-pad-moderegulator-nameregulator-min-microvoltregulator-max-microvoltio-channelspwmsbrightness-levelsdefault-brightness-levelpower-supplystdout-pathautorepeatlabellinux,codecolorfunctionlinux,default-triggergpioenable-active-highstartup-delay-usregulator-always-onaudio-codecssi-controlleraudio-routing