ٽ8(p ,Freescale i.MX8QM MEK2fsl,imx8qm-mekfsl,imx8qmaliases=/bus@5b000000/mmc@5b010000B/bus@5b000000/mmc@5b020000G/bus@5b000000/mmc@5b030000L/bus@5a000000/serial@5a060000T/bus@5a000000/serial@5a070000\/bus@5a000000/serial@5a080000d/bus@5a000000/serial@5a090000l/bus@5a000000/spi@5a000000q/bus@5a000000/spi@5a010000v/bus@5a000000/spi@5a020000{/bus@5a000000/spi@5a030000 /vpu@2c000000/vpu-core@2d080000 /vpu@2c000000/vpu-core@2d090000 /vpu@2c000000/vpu-core@2d0a0000cpus cpu@0cpu2arm,cortex-a53 psci@@,@O cpu@1cpu2arm,cortex-a53 psci@@,@O cpu@2cpu2arm,cortex-a53 psci@@,@O cpu@3cpu2arm,cortex-a53 psci@@,@O l2-cache02cacheWc@Ol2-cache12cacheWc@Oopp-table-02operating-points-v2qOopp-600000000|#F Iopp-896000000|5gB@Iopp-1104000000|AʹIopp-1200000000|GIopp-table-12operating-points-v2qOopp-600000000|#FB@Iopp-1056000000|>HB@Iopp-1296000000|M?dIopp-1596000000|_!Iinterrupt-controller@51a00000 2arm,gic-v3PQQ R RR  Opmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smctimer2arm,armv8-timer0   iommu@51400000 2arm,mmu-500Q@                                 Osystem-controller 2fsl,imx-scu tx0rx0gip3$ power-controller2fsl,imx8qm-scu-pdfsl,scu-pdOclock-controller2fsl,imx8qm-clkfsl,scu-clk%Opinctrl2fsl,imx8qm-iomuxc2default@OhoggrpJsL'LOcs42888_resetgrp JLOi2c-mipi-csi0grpJI J Oi2c-mipi-csi1grpJP Q Oi2c0grpJR!S!Oi2c1grpJLLOi2c1gpio-grpJLLOadc0grp J`Ocm41i2cgrpJ L LOesai0grpxJh@i@j@k@l@m@n@o@p@q@O#fec1grpJ              Olpspi2grp$Jz@{@|@Olpspi2csgrp J}!Omipi0_lpi2c0grp$J? @ B OZmipi1_lpi2c0grp$JC D F Ojflexspi0grpJ!!!!!!!!!!!!!!!!Ofec2grpJ ````````` ` ` `Oflexcan0grpJ!!Oflexcan1grpJ!!Oflexcan3grpJ!!Olpuart0grpJ  Olpuart1grp0J    Olpuart2grpJ  Olpuart3grpJ   Olvds0lpi2c1grpJ6L7LOblvds1lpi2c1grpJ<L=LOqmipi-csi0grp$JKALAHAOmipi-csi1grp$JNAOAMAOpcieagrp$J!!+ Opcieareggrp J;!Opciebgrp$J!!!Opwmlvds0grp J2 O^pwmlvds1grp J8 Onsai0grp0JyL~LLlO'sai1grp0J@@`@O)typecgrp J!OtypecmuxgrpJ``Ousbotg1grp J!Ousdhc1grpJA!!!!!!!!!AOusdhc2grpTJA!!!!!!Ousdhc2gpiogrp$J!!!Oreset-controller2fsl,imx-scu-resetSOrtc2fsl,imx8qxp-sc-rtcOocotp2fsl,imx8qm-scu-ocotp `Omac@1c4Omac@1c6Othermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermaljOwatchdog!2fsl,imx8qm-sc-wdtfsl,imx-sc-wdt<thermal-zonesOcpu0-thermaltripstrip0passiveOtrip1 criticalOcooling-mapsmap00 gpu0-thermaltripstrip0passiveOtrip1 criticalOgpu1-thermaltripstrip0passiveO trip1 criticalO!drc0-thermal tripstrip0passiveO"trip1 criticalO#pmic-thermaltripstrip0passiveO trip1H criticalO$cooling-mapsmap0 0 clock-dummy 2fixed-clock% clk_dummyOclock-esai1-rx 2fixed-clock% esai1_rx_clkO>clock-esai1-rx-hf 2fixed-clock%esai1_rx_hf_clkO?clock-esai1-tx 2fixed-clock% esai1_tx_clkO@clock-esai1-tx-hf 2fixed-clock%esai1_tx_hf_clkOAclock-hdmi-rx-mclk 2fixed-clock% hdmi-rx-mclkO7clock-mlb-clk 2fixed-clock%mlb_clkO6clock-sai5-rx-bclk 2fixed-clock% sai5_rx_bclkOJclock-sai5-tx-bclk 2fixed-clock% sai5_tx_bclkO%clock-sai6-rx-bclk 2fixed-clock% sai6_rx_bclkOKclock-sai6-tx-bclk 2fixed-clock% sai6_tx_bclkO&clock-spdif1-rx 2fixed-clock% spdif1_rxO'clock-controller-lvds-ipg 2fixed-clock%n6lvds0_ipg_clkO\clock-controller-dsi-ipg 2fixed-clock%' dsi_ipg_clkOTclock-controller-mipi-div2-pll 2fixed-clock%mipi_pll_div2_clkO(bus@55000000 2simple-bus UUO)dsp@556e80002fsl,imx8qm-hifi4Un ipgocramcore !$  txrxrxdb/imx/dsp/hifi4.bin=okayDO*bus@31400000 2simple-bus 1@1@ O+crypto@314000002fsl,imx8qm-caamfsl,sec-v4.01@    1@ !R O,jr@30000*2fsl,imx8qm-job-ringfsl,sec-v4.0-job-ring !O-jr@40000*2fsl,imx8qm-job-ringfsl,sec-v4.0-job-ring !O.clock-cm41-ipg 2fixed-clock%) cm41_ipg_clkObus@38000000 2simple-bus 88O/i2c@3b230000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c;# peripg ^4nn6!4=okay 2default@O0gpio@20 2ti,tca6416 Oaudio-codec@482cirrus,cs42888Hmclk2default@ ,^EEEn.Ointmux@3b4000002fsl,imx-intmux;@`'ipg!5=okayOclock-controller@3b6300002fsl,imx8qxp-lpcg;c%4(cm41_lpcg_i2c_clkcm41_lpcg_i2c_ipg_clk!4Oclock-audio-ipg 2fixed-clock%'audio_ipg_clkO%clock-ext-aud-mclk0 2fixed-clock%ext_aud_mclk0O8clock-ext-aud-mclk1 2fixed-clock%ext_aud_mclk1O9clock-esai0-rx 2fixed-clock% esai0_rx_clkO:clock-esai0-rx-hf 2fixed-clock%esai0_rx_hf_clkO;clock-esai0-tx 2fixed-clock% esai0_tx_clkO<clock-esai0-tx-hf 2fixed-clock%esai0_tx_hf_clkO=clock-spdif0-rx 2fixed-clock% spdif0_rxOBclock-sai0-rx-bclk 2fixed-clock% sai0_rx_bclkOCclock-sai0-tx-bclk 2fixed-clock% sai0_tx_bclkODclock-sai1-rx-bclk 2fixed-clock% sai1_rx_bclkOEclock-sai1-tx-bclk 2fixed-clock% sai1_tx_bclkOFclock-sai2-rx-bclk 2fixed-clock% sai2_rx_bclkOGclock-sai3-rx-bclk 2fixed-clock% sai3_rx_bclkOHclock-sai4-rx-bclk 2fixed-clock% sai4_rx_bclkOIbus@59000000 2simple-bus YYO1asrc@590000002fsl,imx8qm-asrcY td memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`!!!!!!rxarxbrxctxatxbtxc!=okayOesai@59010000!2fsl,imx8qm-esaifsl,imx6ull-esaiY """coreextalfsysspba !!rxtx!=okay2default@#4^ EEE" n.Ospdif@590200002fsl,imx8qm-spdifY0$$%:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba !! rxtx! =disabledO2sai@590400002fsl,imx8qm-saiY :&&busmclk0mclk1mclk2mclk3rxtx ! ! !>=okay7,^EEE&n.2default@'Osai@590500002fsl,imx8qm-saiY <((busmclk0mclk1mclk2mclk3rxtx !!!?=okay,^EEE(n.2default@)Osai@590600002fsl,imx8qm-saiY >**busmclk0mclk1mclk2mclk3rx!!@ =disabledO3sai@590700002fsl,imx8qm-saiY C++busmclk0mclk1mclk2mclk3rx!! =disabledO4dma-controller@591f00002fsl,imx8qm-edmaYHS`vwxyz{;;==?DFHq!O!clock-controller@594000002fsl,imx8qxp-lpcgY@%%%&asrc0_lpcg_ipg_clkasrc0_lpcg_mem_clk!Oclock-controller@594100002fsl,imx8qxp-lpcgYA% %(esai0_lpcg_extal_clkesai0_lpcg_ipg_clk!O"clock-controller@594200002fsl,imx8qxp-lpcgYB% %%spdif0_lpcg_tx_clkspdif0_lpcg_gclkw!O$clock-controller@594400002fsl,imx8qxp-lpcgYD% %!sai0_lpcg_mclksai0_lpcg_ipg_clk!>O&clock-controller@594500002fsl,imx8qxp-lpcgYE% %!sai1_lpcg_mclksai1_lpcg_ipg_clk!?O(clock-controller@594600002fsl,imx8qxp-lpcgYF% %!sai2_lpcg_mclksai2_lpcg_ipg_clk!@O*clock-controller@594700002fsl,imx8qxp-lpcgYG% %!sai3_lpcg_mclksai3_lpcg_ipg_clk!O+clock-controller@595800002fsl,imx8qxp-lpcgYX% %%% 4dsp_lpcg_adb_clkdsp_lpcg_ipg_clkdsp_lpcg_core_clk! =disabledO5clock-controller@595900002fsl,imx8qxp-lpcgYY%%dsp_ram_lpcg_ipg_clk! =disabledO6asrc@598000002fsl,imx8qm-asrcY |d,, memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`------rxarxbrxctxatxbtxc@! =disabledO7sai@598200002fsl,imx8qm-saiY I..busmclk0mclk1mclk2mclk3 -- rxtx!=okay4^ . n.qO1sai@598300002fsl,imx8qm-saiY K//busmclk0mclk1mclk2mclk3- tx!=okay4^ / n.qO2amix@598400002fsl,imx8qm-audmixY0ipg!12=okayO8mqs@598500002fsl,imx8qm-mqsY33 mclkcore! =disabledO9dma-controller@599f00002fsl,imx8qm-edmaY HS `~JJLsX!O-clock-controller@59d000002fsl,imx8qxp-lpcgY% Eaud_rec_clk0_lpcg_clk!EO4clock-controller@59d100002fsl,imx8qxp-lpcgY% aud_rec_clk1_lpcg_clk!O5clock-controller@59d200002fsl,imx8qxp-lpcgY% Eaud_pll_div_clk0_lpcg_clk!EOclock-controller@59d300002fsl,imx8qxp-lpcgY% aud_pll_div_clk1_lpcg_clk!Oclock-controller@59d500002fsl,imx8qxp-lpcgY% mclkout0_lpcg_clk!Oclock-controller@59d600002fsl,imx8qxp-lpcgY% mclkout1_lpcg_clk!O:acm@59e000002fsl,imx8qm-acmY%!E>?@|456789:;<=>?@ABBCDEFGHIJKaud_rec_clk0_lpcg_clkaud_rec_clk1_lpcg_clkaud_pll_div_clk0_lpcg_clkaud_pll_div_clk1_lpcg_clkmlb_clkhdmi_rx_mclkext_aud_mclk0ext_aud_mclk1esai0_rx_clkesai0_rx_hf_clkesai0_tx_clkesai0_tx_hf_clkesai1_rx_clkesai1_rx_hf_clkesai1_tx_clkesai1_tx_hf_clkspdif0_rxspdif1_rxsai0_rx_bclksai0_tx_bclksai1_rx_bclksai1_tx_bclksai2_rx_bclksai3_rx_bclksai4_rx_bclksai5_tx_bclksai6_rx_bclkO clock-controller@59c000002fsl,imx8qxp-lpcgY%%%&asrc1_lpcg_ipg_clkasrc1_lpcg_mem_clk!O,clock-controller@59c200002fsl,imx8qxp-lpcgY% %!sai6_lpcg_mclksai6_lpcg_ipg_clk!O.clock-controller@59c300002fsl,imx8qxp-lpcgY% %!sai7_lpcg_mclksai7_lpcg_ipg_clk!O/clock-controller@59c400002fsl,imx8qxp-lpcgY%%amix_lpcg_ipg_clk!O0clock-controller@59c500002fsl,imx8qxp-lpcgY% %!mqs0_lpcg_mclkmqs0_lpcg_ipg_clk!O3sai@590800002fsl,imx8qm-saiY ELLbusmclk0mclk1mclk2mclk3rx! ! =disabledO;sai@590900002fsl,imx8qm-saiY  GMMbusmclk0mclk1mclk2mclk3tx! ! =disabledO<clock-controller@594800002fsl,imx8qxp-lpcgYH% %!sai4_lpcg_mclksai4_lpcg_ipg_clk! =disabledOLclock-controller@594900002fsl,imx8qxp-lpcgYI% %!sai5_lpcg_mclksai5_lpcg_ipg_clk! =disabledOMesai@59810000!2fsl,imx8qm-esaifsl,imx6ull-esaiY NNNcoreextalfsysspba --rxtx! =disabledO=clock-controller@59c100002fsl,imx8qxp-lpcgY% %(esai1_lpcg_extal_clkesai1_lpcg_ipg_clk!ONvpu@2c000000 ,,,! =disabledO>mailbox@2d0000002fsl,imx6sx-mu- ! =disabledOOmailbox@2d0200002fsl,imx6sx-mu- ! =disabledOPmailbox@2d0400002fsl,imx6sx-mu- ! =disabledOQvpu-core@2d080000-2nxp,imx8q-vpu-decoder! tx0tx1rx$ OOO =disabledO?vpu-core@2d090000- 2nxp,imx8q-vpu-encoder! tx0tx1rx$ PPP =disabledO@vpu-core@2d0a0000- 2nxp,imx8q-vpu-encoder! tx0tx1rx$ QQQ =disabledOAbus@53000000 2simple-bus SSOBgpu@53100000 2vivante,gcS @ coreshader^n)'2!OCbus@56220000 2simple-busR V"V"ODinterrupt-controller@56220000&2fsl,imx8qxp-irqsteerfsl,imx-irqsteerV" ;Sipg! ORclock-controller@562230002fsl,imx8qxp-lpcgV"0%!Tmipi0_lis_lpcg_ipg_clkOSclock-controller@5622300c2fsl,imx8qxp-lpcgV"0 %!T*mipi0_pwm_lpcg_clkmipi0_pwm_lpcg_ipg_clkOWclock-controller@562230142fsl,imx8qxp-lpcgV"0%Umipi0_i2c0_lpcg_ipg_clk!OYclock-controller@562230182fsl,imx8qxp-lpcgV"0%Tmipi0_i2c0_lpcg_ipg_s_clk!OUclock-controller@5622301c2fsl,imx8qxp-lpcgV"0% mipi0_i2c0_lpcg_clk!OXclock-controller@562230242fsl,imx8qxp-lpcgV"0$%Vmipi0_i2c1_lpcg_ipg_clk!OEclock-controller@562230282fsl,imx8qxp-lpcgV"0(%Tmipi0_i2c1_lpcg_ipg_s_clk!OVclock-controller@5622302c2fsl,imx8qxp-lpcgV"0,% mipi0_i2c1_lpcg_clk!OFpwm@562240002fsl,imx8qxp-pwmfsl,imx27-pwmV"@WWipgper ^nn6! =disabledOGi2c@56226000#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cV"` XYperipg^Xnn6!=okay2default@ZOHbus@56240000 2simple-bus V$V$[OIclock-controller@562430002fsl,imx8qxp-lpcgV$0%lvds0_lis_lpcg_ipg_clk!\O`clock-controller@5624300c2fsl,imx8qxp-lpcgV$0 %Alvds0_pwm_lpcg_clklvds0_pwm_lpcg_ipg_clklvds0_pwm_lpcg_32k_clk! \O]clock-controller@562430102fsl,imx8qxp-lpcgV$0%,lvds0_i2c0_lpcg_clklvds0_i2c0_lpcg_ipg_clk! \O_pwm@562440002fsl,imx8qxp-pwmfsl,imx27-pwmV$@ipgper ^nn6!=okay]]2default@^Oi2c@56246000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cV$` peripg ^nn6! =disabled__OJinterrupt-controller@56240000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerV$ 9`ipg!  O[clock-controller@562430142fsl,imx8qxp-lpcgV$0% \,lvds0_i2c1_lpcg_clklvds0_i2c1_lpcg_ipg_clk! Oai2c@56247000#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cV$p aaperipg ^ nn6! =okay2default@bOKbus@57220000 2simple-busc W"W"OLinterrupt-controller@57220000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerW" <dipg! Occlock-controller@572230002fsl,imx8qxp-lpcgW"0%Tmipi1_lis_lpcg_ipg_clk!Odclock-controller@5722300c2fsl,imx8qxp-lpcgW"0 %T*mipi1_pwm_lpcg_clkmipi1_pwm_lpcg_ipg_clk!Ogclock-controller@5722301c2fsl,imx8qxp-lpcgW"0% mipi1_i2c0_lpcg_clk!Ohclock-controller@572230142fsl,imx8qxp-lpcgW"0%emipi1_i2c0_lpcg_ipg_clk!Oiclock-controller@572230182fsl,imx8qxp-lpcgW"0%Tmipi1_i2c0_lpcg_ipg_s_clk!Oeclock-controller@572230242fsl,imx8qxp-lpcgW"0$%fmipi1_i2c1_lpcg_ipg_clk!OMclock-controller@572230282fsl,imx8qxp-lpcgW"0(%Tmipi1_i2c1_lpcg_ipg_s_clk!Ofclock-controller@5722302c2fsl,imx8qxp-lpcgW"0,% mipi1_i2c1_lpcg_clk!ONpwm@572240002fsl,imx8qxp-pwmfsl,imx27-pwmW"@ggipgper ^nn6! =disabledOOi2c@57226000#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cW"` chiperipg^hnn6!=okay2default@jOPbus@57240000 2simple-busk W$W$OQinterrupt-controller@57240000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerW$ :lipg! Okclock-controller@572430002fsl,imx8qxp-lpcgW$0%\lvds1_lis_lpcg_ipg_clk!Olclock-controller@5724300c2fsl,imx8qxp-lpcgW$0 %\*lvds1_pwm_lpcg_clklvds1_pwm_lpcg_ipg_clk!Omclock-controller@572430102fsl,imx8qxp-lpcgW$0%\,lvds1_i2c0_lpcg_clklvds1_i2c0_lpcg_ipg_clk!Ooclock-controller@572430142fsl,imx8qxp-lpcgW$0%\,lvds1_i2c1_lpcg_clklvds1_i2c1_lpcg_ipg_clk!Oppwm@572440002fsl,imx8qxp-pwmfsl,imx27-pwmW$@mmipgper ^nn6!=okay2default@nOi2c@57246000#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cW$` ooperipg ^nn6! =disabledORi2c@57247000#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cW$p ppperipg ^nn6!=okay2default@qOSclock-img-ipg 2fixed-clock%  img_ipg_clkO|clock-img-pxl 2fixed-clock%#F img_pxl_clkObus@58000000 2simple-bus XXOTisi@58100000X`)*+,-./0@rstuvwxy(per0per1per2per3per4per5per6per7@!yz{|}~ =disabled2fsl,imx8qm-isiOUports port@2endpointzOport@3endpoint{Oirqsteer@58220000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerX" @|ipg! O}gpio@582220002fsl,imx8qm-gpiofsl,imx35-gpioX" }!OVclock-controller@582230182fsl,imx8qxp-lpcgX"0 %csi0_lpcg_core_clk!yO~clock-controller@5822301c2fsl,imx8qxp-lpcgX"0 %csi0_lpcg_esc_clk!yOi2c@58226000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cX"`|peripg ^nn6}! =disabledOWcsi@58227000+2fsl,imx8qm-mipi-csi2fsl,imx8qxp-mipi-csi2X"pX"~ coreescui^~nu*J!y =disabledOXports port@0port@1endpointOzirqsteer@58240000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerX$ A|ipg! Ogpio@582420002fsl,imx8qm-gpiofsl,imx35-gpioX$ !OYclock-controller@582430182fsl,imx8qxp-lpcgX$0 %csi1_lpcg_core_clk!yOclock-controller@5824301c2fsl,imx8qxp-lpcgX$0 %csi1_lpcg_esc_clk!yOi2c@58246000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cX$`|peripg ^nn6! =disabledOZcsi@58247000+2fsl,imx8qm-mipi-csi2fsl,imx8qxp-mipi-csi2X$pX$ coreescui^nu*J!y =disabledO[ports port@0port@1endpointO{irqsteer@58260000%2fsl,imx8qm-irqsteerfsl,imx-irqsteerX& Bipg!F  =disabledOclock-controller@582630042fsl,imx8qxp-lpcgX&0 F%pi0_lpcg_ipg_clk!y =disabledO\clock-controller@582630182fsl,imx8qxp-lpcgX&0 F%pi0_lpcg_pxl_clk!y =disabledO]clock-controller@5826301c2fsl,imx8qxp-lpcgX&0 F%pi0_lpcg_misc_clk!y =disabledO^i2c@58266000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cX&`I|peripg ^Inn6!I =disabledO_jpegdec@58400000X@ 5^n !%2nxp,imx8qm-jpgdecnxp,imx8qxp-jpgdecO`jpegenc@58450000XE 1^n !%2nxp,imx8qm-jpgencnxp,imx8qxp-jpgencOaclock-controller@585000002fsl,imx8qxp-lpcgXP%pdma0_lpcg_clk!yOrclock-controller@585100002fsl,imx8qxp-lpcgXQ%pdma1_lpcg_clk!zOsclock-controller@585200002fsl,imx8qxp-lpcgXR%pdma2_lpcg_clk!{Otclock-controller@585300002fsl,imx8qxp-lpcgXS%pdma3_lpcg_clk!|Ouclock-controller@585400002fsl,imx8qxp-lpcgXT%pdma4_lpcg_clk!}Ovclock-controller@585500002fsl,imx8qxp-lpcgXU%pdma5_lpcg_clk!~Owclock-controller@585600002fsl,imx8qxp-lpcgXV%pdma6_lpcg_clk!Oxclock-controller@585700002fsl,imx8qxp-lpcgXW%pdma7_lpcg_clk!Oyclock-controller@585800002fsl,imx8qxp-lpcgXX%csi0_lpcg_pxl_clk!Oclock-controller@585900002fsl,imx8qxp-lpcgXY%csi1_lpcg_pxl_clk!Oclock-controller@585a00002fsl,imx8qxp-lpcgXZ%hdmi_rx_lpcg_pxl_link_clk!Obclock-controller@585d00002fsl,imx8qxp-lpcgX]%||0img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clk!Oclock-controller@585f00002fsl,imx8qxp-lpcgX_%||0img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clk!Oclock-dma-ipg 2fixed-clock%' dma_ipg_clkObus@5a000000 2simple-bus ZZOcspi@5a0000002fsl,imx7ulp-spiZ  Pperipg ^5n!5 txrx =disabledOdspi@5a0100002fsl,imx7ulp-spiZ  Qperipg ^6n!6 txrx =disabledOespi@5a0200002fsl,imx7ulp-spiZ  Rperipg ^7n!7 txrx=okay2default@  Ofspi@5a0300002fsl,imx7ulp-spiZ  Speripg ^8n!8 txrx =disabledOgserial@5a060000Z Y ipgbaud ^9nĴ!9rxtx   =okay%2fsl,imx8qm-lpuartfsl,imx8qxp-lpuart2default@Ohserial@5a070000Z Z ipgbaud ^:nĴ!:rxtx =okay%2fsl,imx8qm-lpuartfsl,imx8qxp-lpuart2default@Oibluetooth2nxp,88w8987-btserial@5a080000Z [ ipgbaud ^;nĴ!;rxtx =okay%2fsl,imx8qm-lpuartfsl,imx8qxp-lpuart2default@Ojserial@5a090000Z  \ ipgbaud ^<nĴ!<rxtx =okay%2fsl,imx8qm-lpuartfsl,imx8qxp-lpuart2default@Okdma-controller@5a1f00002fsl,imx8qm-edmaZHSC!@ABCDEFGHIJKLMNOPQRSTU`=okayOclock-controller@5a4000002fsl,imx8qxp-lpcgZ@%5 spi0_lpcg_clkspi0_lpcg_ipg_clk!5Oclock-controller@5a4100002fsl,imx8qxp-lpcgZA%6 spi1_lpcg_clkspi1_lpcg_ipg_clk!6Oclock-controller@5a4200002fsl,imx8qxp-lpcgZB%7 spi2_lpcg_clkspi2_lpcg_ipg_clk!7Oclock-controller@5a4300002fsl,imx8qxp-lpcgZC%8 spi3_lpcg_clkspi3_lpcg_ipg_clk!8Oclock-controller@5a4600002fsl,imx8qxp-lpcgZF%9'uart0_lpcg_baud_clkuart0_lpcg_ipg_clk!9Oclock-controller@5a4700002fsl,imx8qxp-lpcgZG%:'uart1_lpcg_baud_clkuart1_lpcg_ipg_clk!:Oclock-controller@5a4800002fsl,imx8qxp-lpcgZH%;'uart2_lpcg_baud_clkuart2_lpcg_ipg_clk!;Oclock-controller@5a4900002fsl,imx8qxp-lpcgZI%<'uart3_lpcg_baud_clkuart3_lpcg_ipg_clk!<Oi2c@5a800000Z@  peripg ^`nn6!`=okay#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2c2default@Olaccelerometer@192st,lsm303agr-accelgyrometer@202nxp,fxas21002c light-sensor@442isil,isl29023D pressure-sensor@60 2fsl,mpl3115`gpio@682maxim,max7322hOgyrometer@692st,l3g4200d-gyroitcpc@512nxp,ptn5110tcpci2default@Q=okayOmconnector2usb-c-connectorUSB-Cdualdualsink*,6@ROnports port@0endpointOport@1endpointOi2c@5a810000Z@  peripg ^ann6!a=okay#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2c 2defaultgpio@_ i sOi2c@5a820000Z@  peripg ^bnn6!b =disabled#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cOoi2c@5a830000Z@  peripg ^cnn6!c =disabled#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cOpadc@5a8800002nxp,imx8qxp-adc}Z peripg ^enn6!e=okay2default@Oqadc@5a8900002nxp,imx8qxp-adc}Z peripg ^fnn6!f =disabledOrcan@5a8d00002fsl,imx8qm-flexcanZ ipgper ^inbZ!i=okay2default@Oscan@5a8e00002fsl,imx8qm-flexcanZ ipgper ^jnbZ!j=okay2default@Otcan@5a8f00002fsl,imx8qm-flexcanZ ipgper ^knbZ!k=okay2default@Oudma-controller@5a9f00002fsl,imx8qm-edmaZ!HS xP!lmnopqrstuOvclock-controller@5ac000002fsl,imx8qxp-lpcgZ%` i2c0_lpcg_clki2c0_lpcg_ipg_clk!`Oclock-controller@5ac100002fsl,imx8qxp-lpcgZ%a i2c1_lpcg_clki2c1_lpcg_ipg_clk!aOclock-controller@5ac200002fsl,imx8qxp-lpcgZ%b i2c2_lpcg_clki2c2_lpcg_ipg_clk!bOclock-controller@5ac300002fsl,imx8qxp-lpcgZ%c i2c3_lpcg_clki2c3_lpcg_ipg_clk!cOclock-controller@5ac800002fsl,imx8qxp-lpcgZ%e adc0_lpcg_clkadc0_lpcg_ipg_clk!eOclock-controller@5ac900002fsl,imx8qxp-lpcgZ%f adc1_lpcg_clkadc1_lpcg_ipg_clk!fOclock-controller@5acd00002fsl,imx8qxp-lpcgZ%i 5can0_lpcg_pe_clkcan0_lpcg_ipg_clkcan0_lpcg_chi_clk!iOclock-controller@5a4a00002fsl,imx8qxp-lpcgZJ%='uart4_lpcg_baud_clkuart4_lpcg_ipg_clk!=Owi2c@5a840000#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cZ@ Xperipg ^dnn6!d =disabledOxclock-controller@5ac400002fsl,imx8qxp-lpcgZ%d i2c4_lpcg_clki2c4_lpcg_ipg_clk!dOclock-controller@5ace00002fsl,imx8qxp-lpcgZ%j 5can1_lpcg_pe_clkcan1_lpcg_ipg_clkcan1_lpcg_chi_clk!jOclock-controller@5acf00002fsl,imx8qxp-lpcgZ%k 5can2_lpcg_pe_clkcan2_lpcg_ipg_clkcan2_lpcg_chi_clk!kOclock-conn-axi 2fixed-clock%CU conn_axi_clkOclock-conn-ahb 2fixed-clock% ! conn_ahb_clkOclock-conn-ipg 2fixed-clock% conn_ipg_clkOclock-conn-bch 2fixed-clock%ׄ conn_bch_clkOybus@5b000000 2simple-bus [[Ozusb@5b0d0000-2fsl,imx7ulp-usbfsl,imx6ul-usbfsl,imx27-usb[   !=okay2default@#/;GO{usbmisc@5b0d0200\82fsl,imx7ulp-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc[ Ousbphy@5b100000%2fsl,imx8qm-usbphyfsl,imx7ulp-usbphy[!=okayOmmc@5b010000 [ ipgahbper ^nׄ!i~=okay32fsl,imx8qm-usdhcfsl,imx8qxp-usdhcfsl,imx7d-usdhc "2defaultstate_100mhzstate_200mhz@_O|mmc@5b020000 [ ipgahbper ^n !i~=okay32fsl,imx8qm-usdhcfsl,imx8qxp-usdhcfsl,imx7d-usdhc "2defaultstate_100mhzstate_200mhz@_  O}mmc@5b030000 [ ipgahbper ^n !i~ =disabled32fsl,imx8qm-usdhcfsl,imx8qxp-usdhcfsl,imx7d-usdhc O~ethernet@5b040000[0( 'ipgahbenet_clk_refptpenet_2x_txclk^n沀sY@!=okay2fsl,imx8qm-fecfsl,imx6sx-fec 2default@ rgmii-idOmdio ethernet-phy@02ethernet-phy-ieee802.3-c22Oethernet-phy@12ethernet-phy-ieee802.3-c22Oethernet@5b050000[0( 'ipgahbenet_clk_refptpenet_2x_txclk^n沀sY@!=okay2fsl,imx8qm-fecfsl,imx6sx-fec 2default@ rgmii-txid,7 Cmac-addressTOusb@5b1100002fsl,imx8qm-usb3[ (lpmbusaclkipgcore ^n沀!=okayOusb@5b120000 2cdns,usb3[[[ iotgxhcidev0shostperipheralotgwakeupcdns3,usb3-phy=okayotgOportendpointOusb-phy@5b1600002nxp,salvo-phy[salvo_phy_clk!=okayOclock-controller@5b2000002fsl,imx8qxp-lpcg[ % 9sdhc0_lpcg_per_clksdhc0_lpcg_ipg_clksdhc0_lpcg_ahb_clk!Oclock-controller@5b2100002fsl,imx8qxp-lpcg[!% 9sdhc1_lpcg_per_clksdhc1_lpcg_ipg_clksdhc1_lpcg_ahb_clk!Oclock-controller@5b2200002fsl,imx8qxp-lpcg["% 9sdhc2_lpcg_per_clksdhc2_lpcg_ipg_clksdhc2_lpcg_ahb_clk!Oclock-controller@5b2300002fsl,imx8qxp-lpcg[#%0 enet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clk!Oclock-controller@5b2400002fsl,imx8qxp-lpcg[$%0 enet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clk!Oclock-controller@5b2700002fsl,imx8qxp-lpcg['%"usboh3_ahb_clkusboh3_phy_ipg_clk!Oclock-controller@5b2800002fsl,imx8qxp-lpcg[(%0Musb3_app_clkusb3_lpm_clkusb3_ipg_clkusb3_core_pclkusb3_phy_clkusb3_aclk!Oclock-controller@5b2900002fsl,imx8qxp-lpcg[)%   'gpmi_bchgpmi_iogpmi_apbgpmi_bch_apb! Oclock-controller@5b2900042fsl,imx8qxp-lpcg[)% apbhdma_hclk! Odma-controller@5b810000(2fsl,imx8qxp-dma-apbhfsl,imx28-dma-apbh[ 0HS! Onand-controller@5b8120002fsl,imx8qxp-gpmi-nand[ [@ igpmi-nandbch  sbch 'gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbrx-tx!  ^ n =disabledObus@5c000000 2simple-bus \\Oddr-pmu@5c020000$2fsl,imx8qm-ddr-pmufsl,imx8-ddr-pmu\ Oddr-pmu@5c120000$2fsl,imx8qm-ddr-pmufsl,imx8-ddr-pmu\ Oclock-lsio-bus 2fixed-clock% lsio_bus_clkObus@5d000000 2simple-bus  ]]Opwm@5d0000002fsl,imx27-pwm]ipgper ^nn6 ^ =disabledOpwm@5d0100002fsl,imx27-pwm]ipgper ^nn6 _ =disabledOpwm@5d0200002fsl,imx27-pwm]ipgper ^nn6 ` =disabledOpwm@5d0300002fsl,imx27-pwm]ipgper ^nn6 a =disabledOgpio@5d080000] !2fsl,imx8qm-gpiofsl,imx35-gpio0$Ogpio@5d090000]  !2fsl,imx8qm-gpiofsl,imx35-gpio@(2 ?HOgpio@5d0a0000]  !2fsl,imx8qm-gpiofsl,imx35-gpio0PUh Ogpio@5d0b0000]  !2fsl,imx8qm-gpiofsl,imx35-gpioruOgpio@5d0c0000]  !2fsl,imx8qm-gpiofsl,imx35-gpio` Ogpio@5d0d0000]  !2fsl,imx8qm-gpiofsl,imx35-gpio Ogpio@5d0e0000] !2fsl,imx8qm-gpiofsl,imx35-gpio   Ogpio@5d0f0000] !2fsl,imx8qm-gpiofsl,imx35-gpioOspi@5d120000 2nxp,imx8qxp-fspi]ifspi_basefspi_mmap \ fspi_enfspi!=okay2default@Oflash@0 2jedec,spi-nork@Omailbox@5d1b0000]  =disabled,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-muOmailbox@5d1c0000] ,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-muOmailbox@5d1d0000]  =disabled,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-muOmailbox@5d1e0000]  =disabled,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-muOmailbox@5d1f0000]  =disabled,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-muOmailbox@5d200000]  !=okay2fsl,imx8qm-mufsl,imx6sx-muOmailbox@5d210000]! !=okay2fsl,imx8qm-mufsl,imx6sx-muO mailbox@5d280000]( !2fsl,imx8qm-mufsl,imx6sx-muOclock-controller@5d4000002fsl,imx8qxp-lpcg]@%4hpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clk!Oclock-controller@5d4100002fsl,imx8qxp-lpcg]A%4hpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clk!Oclock-controller@5d4200002fsl,imx8qxp-lpcg]B%4hpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clk!Oclock-controller@5d4300002fsl,imx8qxp-lpcg]C%4hpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clk!Oclock-controller@5d4400002fsl,imx8qxp-lpcg]D%4hpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clk!Oclock-controller@5d4500002fsl,imx8qxp-lpcg]E%4hpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clk!Oclock-controller@5d4600002fsl,imx8qxp-lpcg]F%4hpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clk!Oclock-controller@5d4700002fsl,imx8qxp-lpcg]G%4hpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clk!Oclock-hsio-axi 2fixed-clock%ׄ hsio_axi_clkOclock-hsio-per 2fixed-clock%U hsio_per_clkOclock-hsio-refa2gpio-gate-clock%  Oclock-hsio-refb2gpio-gate-clock%  Oclock-xtal100m 2fixed-clock% xtal_100MHzObus@5f000000 2simple-bus0__@`p Opcie@5f0100002fsl,imx8q-pcie_ idbiconfig0fhsmsidma  dbimstrslv$pci.ijkl<OY!f =disabled pcie-phy@2default yOpcie-ep@5f0100002fsl,imx8q-pcie-ep_idbiaddr_spaceO hsdma dbimstrslv!f =disabledOclock-controller@5f0600002fsl,imx8qxp-lpcg_ % Fhsio_pcieb_mstr_axi_clkhsio_pcieb_slv_axi_clkhsio_pcieb_dbi_axi_clk!Oclock-controller@5f0b00002fsl,imx8qxp-lpcg_ %hsio_phyx1_per_clk!Oclock-controller@5f0d00002fsl,imx8qxp-lpcg_ %hsio_pcieb_per_clk!Oclock-controller@5f0f00002fsl,imx8qxp-lpcg_%hsio_misc_per_clk!Opcie@5f0000002fsl,imx8q-pcie_O idbiconfig0O@@ Fsmsi  dbimstrslv$pci.IJKL<OY!f=okay pcie-phy@2default yOpcie-ep@5f0000002fsl,imx8q-pcie-ep_@idbiaddr_spaceO Hsdma dbimstrslv!f =disabledOsata@5f0200002fsl,imx8qm-ahci_ Xsatasata_refsata-phycali-phy0cali-phy1!0=okayOclock-controller@5f0500002fsl,imx8qxp-lpcg_ % Fhsio_pciea_mstr_axi_clkhsio_pciea_slv_axi_clkhsio_pciea_dbi_axi_clk!Oclock-controller@5f0700002fsl,imx8qxp-lpcg_%hsio_sata_clk!Oclock-controller@5f0800002fsl,imx8qxp-lpcg_%Lhsio_phyx2_pclk_0hsio_phyx2_pclk_1hsio_phyx2_apbclk_0hsio_phyx2_apbclk_1!Oclock-controller@5f0900002fsl,imx8qxp-lpcg_ %Qhsio_phyx1_pclkhsio_phyx1_epcs_tx_clkhsio_phyx1_epcs_rx_clkhsio_phyx1_apb_clk!Oclock-controller@5f0a00002fsl,imx8qxp-lpcg_ %hsio_phyx2_per_clk!Oclock-controller@5f0c00002fsl,imx8qxp-lpcg_ %hsio_pciea_per_clk!Oclock-controller@5f0e00002fsl,imx8qxp-lpcg_%hsio_sata_per_clk!Ophy@5f1800002fsl,imx8qm-hsio ____iregphyctrlmiscpvpclk0pclk1apb_pclk0apb_pclk1pclk2epcs_txepcs_rxapb_pclk2phy0_crrphy1_crrctl0_crrctl1_crrctl2_crrmisc_crr!=okaypciea-pcieb-satainputOchosen/bus@5a000000/serial@5a060000memory@80000000memory@clock-xtal24m 2fixed-clock%n6 xtal_24MHzOreserved-memory memory@90000000Omemory@90008000O memory@90010000O memory@90018000O memory@900ff000O memory@90100000Omemory@90108000Omemory@90110000Omemory@90118000Omemory@901ff000Omemory@904000002shared-dma-pool@Omemory@92400000@Omemory@942f0000/Omemory@942f8000/Omemory@943000002shared-dma-pool0Olinux,cma2shared-dma-pool <<  %backlight-lvds02pwm-backlight . 3d Ed \PObacklight-lvds12pwm-backlight . 3d Ed \POi2c-mux 2i2c-mux-gpio u  i2c@0 audio-codec@1a 2wlf,wm8960mclk,^EEEn.        Oi2c@1 wm8962@1a 2wlf,wm8962,^EEEn.        Omux-controller2nxp,cbdtu02043gpio-sbu-mux2default@    -portendpointOregulator-1v52regulator-fixed @1v5 O` g`Oregulator-1v82regulator-fixed @1v8 Ow@ gw@Oregulator-2v82regulator-fixed @2v8 O* g*Oregulator-3v32regulator-fixed @3v3 O2Z g2ZOusdhc2-vmmc2regulator-fixed @SD1_SPWR O- g-   Oregulator-audio2regulator-fixed @cs42888_supply O2Z g2ZOregulator-fec2-nvcc2regulator-fixed @fec2_nvcc Ow@ gw@  Oregulator-can01-gen2regulator-fixed @can01-en O2Z g2Z  Oregulator-can2-gen2regulator-fixed @can2-en O2Z g2Z  Oregulator-can01-stby2regulator-fixed @can01-stby O2Z g2Z   Oregulator-can2-stby2regulator-fixed @can2-stby O2Z g2Z   Oregulator-pcie2regulator-fixed@2default g2Z O2Z @mpcie_3v3   Oregulator-usbotg1-vbus2regulator-fixed @usb_otg1_vbus OLK@ gLK@  Oregulator-adc-vref2regulator-fixed @vref_1v8 Ow@ gw@Oregulator-audio-pwr2regulator-fixed @audio-5v OLK@ gLK@  Oregulator-audio-3v32regulator-fixed @audio-3v3 O2Z g2Z  Oregulator-audio-1v82regulator-fixed @audio-1v8 Ow@ gw@  Oaudio-codec-bt 2linux,bt-sco7Osound-bt-sco2simple-audio-card bt-sco-audio dsp_a  ( Gsimple-audio-card,cpu i s Osimple-audio-card,codec isound-cs428882fsl,imx-audio-cs42888 ,imx-cs42888    Line Out JackAOUT1LLine Out JackAOUT1RLine Out JackAOUT2LLine Out JackAOUT2RLine Out JackAOUT3LLine Out JackAOUT3RLine Out JackAOUT4LLine Out JackAOUT4RAIN1LLine In JackAIN1RLine In JackAIN2LLine In JackAIN2RLine In Jacksound-wm89602fsl,imx-audio-wm8960 ,wm8960-audio    Headphone JackHP_LHeadphone JackHP_RExt SpkSPK_LPExt SpkSPK_LNExt SpkSPK_RPExt SpkSPK_RNLINPUT1Mic JackMic JackMICBsound-wm89622fsl,imx-audio-wm8962 ,wm8962-audio   m Headphone JackHPOUTLHeadphone JackHPOUTRExt SpkSPKOUTLExt SpkSPKOUTRAMICMICBIASIN1RAMICIN3RAMICimx8qm-cm4-02fsl,imx8qm-cm4 txrxrxdb$ D    !)  4imx8qm-cm4-12fsl,imx8qm-cm4 txrxrxdb$    D!*= * 8__symbols__ /cpus/cpu@0 /cpus/cpu@1 /cpus/cpu@2 /cpus/cpu@3 /cpus/l2-cache0 /cpus/l2-cache1 /opp-table-0 )/opp-table-1 7/interrupt-controller@51a00000 ;/iommu@51400000$ @/system-controller/power-controller$ /system-controller/clock-controller C/system-controller/pinctrl" J/system-controller/pinctrl/hoggrp, V/system-controller/pinctrl/cs42888_resetgrp, l/system-controller/pinctrl/i2c-mipi-csi0grp, /system-controller/pinctrl/i2c-mipi-csi1grp# /system-controller/pinctrl/i2c0grp# /system-controller/pinctrl/i2c1grp( /system-controller/pinctrl/i2c1gpio-grp# /system-controller/pinctrl/adc0grp& /system-controller/pinctrl/cm41i2cgrp$ /system-controller/pinctrl/esai0grp# /system-controller/pinctrl/fec1grp% /system-controller/pinctrl/lpspi2grp' /system-controller/pinctrl/lpspi2csgrp+ /system-controller/pinctrl/mipi0_lpi2c0grp+ 3/system-controller/pinctrl/mipi1_lpi2c0grp' H/system-controller/pinctrl/flexspi0grp# Y/system-controller/pinctrl/fec2grp' f/system-controller/pinctrl/flexcan0grp' w/system-controller/pinctrl/flexcan1grp' /system-controller/pinctrl/flexcan3grp& /system-controller/pinctrl/lpuart0grp& /system-controller/pinctrl/lpuart1grp& /system-controller/pinctrl/lpuart2grp& /system-controller/pinctrl/lpuart3grp* /system-controller/pinctrl/lvds0lpi2c1grp* /system-controller/pinctrl/lvds1lpi2c1grp(/system-controller/pinctrl/mipi-csi0grp(/system-controller/pinctrl/mipi-csi1grp$'/system-controller/pinctrl/pcieagrp'5/system-controller/pinctrl/pcieareggrp$G/system-controller/pinctrl/pciebgrp'U/system-controller/pinctrl/pwmlvds0grp'g/system-controller/pinctrl/pwmlvds1grp#y/system-controller/pinctrl/sai0grp#/system-controller/pinctrl/sai1grp$/system-controller/pinctrl/typecgrp'/system-controller/pinctrl/typecmuxgrp&/system-controller/pinctrl/usbotg1grp%/system-controller/pinctrl/usdhc1grp%/system-controller/pinctrl/usdhc2grp)/system-controller/pinctrl/usdhc2gpiogrp$/system-controller/reset-controller/system-controller/rtc/system-controller/ocotp! /system-controller/ocotp/mac@1c4!/system-controller/ocotp/mac@1c6"/system-controller/thermal-sensor!/thermal-zones(//thermal-zones/cpu0-thermal/trips/trip0(:/thermal-zones/cpu0-thermal/trips/trip1(D/thermal-zones/gpu0-thermal/trips/trip0(O/thermal-zones/gpu0-thermal/trips/trip1(Y/thermal-zones/gpu1-thermal/trips/trip0(d/thermal-zones/gpu1-thermal/trips/trip1(n/thermal-zones/drc0-thermal/trips/trip0(y/thermal-zones/drc0-thermal/trips/trip1(/thermal-zones/pmic-thermal/trips/trip0(/thermal-zones/pmic-thermal/trips/trip1 /clock-dummy/clock-esai1-rx/clock-esai1-rx-hf/clock-esai1-tx/clock-esai1-tx-hf/clock-hdmi-rx-mclk/clock-mlb-clk /clock-sai5-rx-bclk/clock-sai5-tx-bclk-/clock-sai6-rx-bclk>/clock-sai6-tx-bclkO/clock-spdif1-rx]/clock-controller-lvds-ipgj/clock-controller-dsi-ipg v/clock-controller-mipi-div2-pll/bus@55000000/bus@55000000/dsp@556e8000/bus@31400000/bus@31400000/crypto@31400000'/bus@31400000/crypto@31400000/jr@30000'/bus@31400000/crypto@31400000/jr@40000/clock-cm41-ipg/bus@38000000 /bus@38000000/i2c@3b230000#/bus@38000000/i2c@3b230000/gpio@20*/bus@38000000/i2c@3b230000/audio-codec@48/bus@38000000/intmux@3b400000(/bus@38000000/clock-controller@3b630000 /clock-audio-ipg/clock-ext-aud-mclk0)/clock-ext-aud-mclk1;/clock-esai0-rxL/clock-esai0-rx-hf`/clock-esai0-txq/clock-esai0-tx-hf/clock-spdif0-rx/clock-sai0-rx-bclk/clock-sai0-tx-bclk/clock-sai1-rx-bclk/clock-sai1-tx-bclk/clock-sai2-rx-bclk/clock-sai3-rx-bclk/clock-sai4-rx-bclk /bus@59000000/bus@59000000/asrc@59000000 /bus@59000000/esai@59010000/bus@59000000/spdif@59020000 /bus@59000000/sai@59040000/bus@59000000/sai@59050000$/bus@59000000/sai@59060000)/bus@59000000/sai@59070000&./bus@59000000/dma-controller@591f0000(4/bus@59000000/clock-controller@59400000(?/bus@59000000/clock-controller@59410000(J/bus@59000000/clock-controller@59420000(@/bus@59000000/clock-controller@59440000(V/bus@59000000/clock-controller@59450000(`/bus@59000000/clock-controller@59460000(j/bus@59000000/clock-controller@59470000(t/bus@59000000/clock-controller@59580000(}/bus@59000000/clock-controller@59590000/bus@59000000/asrc@59800000/bus@59000000/sai@59820000/bus@59000000/sai@59830000/bus@59000000/amix@59840000/bus@59000000/mqs@59850000&/bus@59000000/dma-controller@599f0000(/bus@59000000/clock-controller@59d00000(/bus@59000000/clock-controller@59d10000(/bus@59000000/clock-controller@59d20000(/bus@59000000/clock-controller@59d30000(/bus@59000000/clock-controller@59d50000(/bus@59000000/clock-controller@59d60000/bus@59000000/acm@59e00000( /bus@59000000/clock-controller@59c00000(/bus@59000000/clock-controller@59c20000(/bus@59000000/clock-controller@59c30000((/bus@59000000/clock-controller@59c40000(2/bus@59000000/clock-controller@59c50000