8( sp$mediatek,mt8188-evbmediatek,mt8188 +!7MediaTek MT8188 evaluation boardaliases=/soc/dp-intf@1c015000F/soc/dp-intf@1c113000O/soc/dpi@1c112000T/soc/dsc@1c009000Y/soc/ethdr@1c114000`/soc/mailbox@10320000e/soc/mailbox@10330000j/soc/merge0@1c014000q/soc/merge@1c10c000x/soc/merge@1c10d000/soc/merge@1c10e000/soc/merge@1c10f000/soc/merge@1c110000/soc/mutex@1c016000/soc/mutex@1c101000/soc/padding@1c11d000/soc/padding@1c11e000/soc/padding@1c11f000/soc/padding@1c120000/soc/padding@1c121000/soc/padding@1c122000/soc/padding@1c123000/soc/padding@1c124000/soc/rdma@1c104000/soc/rdma@1c105000/soc/rdma@1c106000 /soc/rdma@1c107000/soc/rdma@1c108000!/soc/rdma@1c109000,/soc/rdma@1c10a0007/soc/rdma@1c10b000B/soc/serial@11001100J/soc/i2c@11280000O/soc/i2c@11e00000T/soc/i2c@11281000Y/soc/i2c@11282000^/soc/i2c@11e01000c/soc/i2c@11ec0000h/soc/i2c@11ec1000m/soc/mmc@11230000cpus+cpu@0rcpuarm,cortex-a55~psciw5@@,@O cpu@100rcpuarm,cortex-a55~psciw5@@,@O cpu@200rcpuarm,cortex-a55~psciw5@@,@O cpu@300rcpuarm,cortex-a55~psciw5@@,@O cpu@400rcpuarm,cortex-a55~psciw5@@,@O cpu@500rcpuarm,cortex-a55~psciw5@@,@Ocpu@600rcpuarm,cortex-a78~psci@@,@Ocpu@700rcpuarm,cortex-a78~psci@@,@Ocpu-mapcluster0core0W core1W core2W core3W core4W core5Wcore6Wcore7Widle-states[pscicpu-off-larm,idle-stateh2_DOcpu-off-barm,idle-stateh-Ocluster-off-larm,idle-stateh7HOcluster-off-barm,idle-stateh2Ol2-cache0cache@Ol2-cache1cache@Ol3-cachecache @Ooscillator-13m fixed-clock]@clk13mO3oscillator-26m fixed-clockclk26mO5oscillator-32k fixed-clockclk32kopp-table-gpuoperating-points-v2O[opp-390000000>opp-431000000opp-4730000001h@ 'opp-515000000F Xopp-556000000!# hopp-598000000# <opp-640000000&% opp-670000000'c opp-700000000)' Lopp-730000000+ }opp-760000000-L `opp-790000000/q 4opp-8350000001 (ropp-8800000004s qopp-9150000006 Xopp-915000000-56 0opp-915000000-66 qpopp-9500000008ـ 5opp-950000000-58ـ X0opp-950000000-68ـ qppmu-a55arm,cortex-a55-pmu -pmu-a78arm,cortex-a78-pmu -psci arm,psci-1.0smcsound8 Jdisabledthermal-zonescpu-little0-thermalQ_utripstrip-alert0LypassiveOtrip-alert1syhottrip-crit ycriticalcooling-mapsmap0H cpu-little1-thermalQ_utripstrip-alert0LypassiveOtrip-alert1syhottrip-crit ycriticalcooling-mapsmap0H cpu-little2-thermalQ_utripstrip-alert0LypassiveOtrip-alert1syhottrip-crit ycriticalcooling-mapsmap0H cpu-little3-thermalQ_utripstrip-alert0LypassiveOtrip-alert1syhottrip-crit ycriticalcooling-mapsmap0H cpu-big0-thermalQ_dutripstrip-alert0LypassiveOtrip-alert1syhottrip-crit ycriticalcooling-mapsmap0cpu-big1-thermalQ_dutripstrip-alert0LypassiveOtrip-alert1syhottrip-crit ycriticalcooling-mapsmap0apu-thermalQ_utripstrip-alert0Lypassivetrip-alert1syhottrip-crit ycriticalgpu-thermalQ_utripstrip-alert0LypassiveOtrip-alert1syhottrip-crit ycriticalcooling-mapsmap0 gpu1-thermalQ_utripstrip-alert0LypassiveOtrip-alert1syhottrip-crit ycriticalcooling-mapsmap0 adsp-thermalQ_utripstrip-alert0Lypassivetrip-alert1syhottrip-crit ycriticalvdo-thermalQ_utripstrip-alert0Lypassivetrip-alert1syhottrip-crit ycriticalinfra-thermalQ_utripstrip-alert0Lypassivetrip-alert1syhottrip-crit ycriticalcam1-thermalQ_utripstrip-alert0Lypassivetrip-alert1syhottrip-crit ycriticalcam2-thermalQ_utripstrip-alert0Lypassivetrip-alert1syhottrip-crit ycriticaltimerarm,armv8-timer @-   ]@soc+ simple-busperformance-controller@11bc10mediatek,cpufreq-hw ~ 0 Ointerrupt-controller@c000000 arm,gic-v3  ~   - Oppi-partitionsinterrupt-partition-0 Ointerrupt-partition-1Osyscon@10000000 mediatek,mt8188-topckgensyscon~O"syscon@10001000#mediatek,mt8188-infracfg-aosyscon~O#syscon@10003000mediatek,mt8188-pericfgsyscon~0OApinctrl@10005000mediatek,mt8188-pinctrl`~P0(iocfg0iocfg_rmiocfg_ltiocfg_lmiocfg_rteint2BN -O adsp-uart-pinspins-tx-rxZ#$i2c0-pinsOJpins-busZ87ai2c1-pinsOTpins-busZ:9ai2c2-pinsOKpins-busZ<;ai2c3-pinsOLpins-busZ>=ai2c4-pinsOUpins-busZ@?ai2c5-pinsOWpins-busZBAai2c6-pinsOXpins-busZDCammc0-default-pinsOGpins-cmd-dat$Zn{aepins-clkZ{fpins-rstZ{aemmc0-uhs-pinsOHpins-cmd-dat$Zn{aepins-clk-dsZ{fpins-rstZ{aenor-pinsORpins-io-ck Z}pins-io-cs Z~aspi0-pinsO;pins-spiZEFGHspi1-pinsO=pins-spiZKLMNspi2-pinsO>pins-spiZOPQRuart0-pinsO:pins-rx-txZ asyscon@10006000)mediatek,mt8188-scpsyssysconsimple-mfd~`power-controller!mediatek,mt8188-power-controller+O6power-domain@0~+power-domain@1~!"mfgalt#+power-domain@2~power-domain@3~power-domain@4~power-domain@15~"""" "3"4"=""$ $ $$$$$$$$$$$$$$$$$ topcamccuimgvencvdecwpecfgckcfgxoss-sram-cmnss-sram-v0l0ss-sram-v0l1ss-sram-ve0ss-sram-ve1ss-sram-ifass-sram-camss-sram-v1l5ss-sram-v1l6ss-sram-rdrss-iommuss-imgcamss-emiss-subcmn-rdrss-rsiss-cmn-l4ss-vdec1ss-wpess-cvdo-ve1#+power-domain@16~H""%%%%%%%Acfgckcfgxoss-galsss-cmnss-emiss-iommuss-larbss-rsiss-bus#+power-domain@20~0""&&&&8cfgckcfgxoss-vpp1-g5ss-vpp1-g6ss-vpp1-l5ss-vpp1-l6#power-domain@22~'ss-vdec1-soc-l1#+power-domain@23~( ss-vdec2-l1#power-domain@29~ """ "camccubuscfgck#+power-domain@30~()))))6ss-cam-l13ss-cam-l14ss-cam-mm0ss-cam-mm1ss-camsys#+power-domain@32~ )*+$ss-camb-subss-camb-rawss-camb-yuvpower-domain@31~),-$ss-cama-subss-cama-rawss-cama-yuvpower-domain@17~(""...&cfgckcfgxoss-larb2ss-larb3ss-gals#+power-domain@9~ "@"? bushdcp#power-domain@18~#power-domain@19~#power-domain@24~ ////0ss-ve1-larbss-ve1-coress-ve1-galsss-ve1-sram#power-domain@21~00ss-wpe-l7ss-wpe-l7pce#power-domain@5~#1 ss-pextp-fmempower-domain@7~"0"1seninf0seninf1power-domain@6~power-domain@10~ "E"D busmain#+power-domain@11~ #+power-domain@14~"Fasm#power-domain@13~ "S"2a1sysintbusadspck#power-domain@12~ #power-domain@8~1  ethermac#watchdog@10007000mediatek,mt8188-wdt~pO7syscon@1000c000"mediatek,mt8188-apmixedsyssyscon~O!timer@10017000,mediatek,mt8188-timermediatek,mt6765-timer~p- 3pwrap@100240003mediatek,mt8188-pwrapmediatek,mt8195-pwrapsyscon~@(pwrap-## spiwrappmicmediatek,mt6359  adcmediatek,mt6359-auxadcaudio-codecmediatek,mt6359-codecregulatorsmediatek,mt6359-regulatorbuck_vs1.vs1= 5U!mbuck_vgpu11.vgpu11=U7m buck_vmodem.vmodem=U*mbuck_vpu.vpu=U7m buck_vcore.vcore=U m buck_vs2.vs2= 5Ujmbuck_vpa.vpa= U7m,buck_vproc2.vproc2=U7Lm buck_vproc1.vproc1=U7Lm buck_vcore_sshub .vcore_sshub=U7buck_vgpu11_sshub .vgpu11_sshub=U7ldo_vaud18.vaud18=w@Uw@mldo_vsim1.vsim1=U/M`ldo_vibr.vibr=OU2Zldo_vrf12.vrf12=U ldo_vusb.vusb=-U-mldo_vsram_proc2 .vsram_proc2= ULmldo_vio18.vio18=Umldo_vcamio.vcamio=Uldo_vcn18.vcn18=w@Uw@mldo_vfe28.vfe28=*U*mxldo_vcn13.vcn13= U ldo_vcn33_1_bt .vcn33_1_bt=*U5gldo_vcn33_1_wifi .vcn33_1_wifi=*U5gldo_vaux18.vaux18=w@Uw@mldo_vsram_others .vsram_others= Umldo_vefuse.vefuse=Uldo_vxo22.vxo22=w@U!ldo_vrfck.vrfck=`Uldo_vrfck_1.vrfck=Ujldo_vbif28.vbif28=*U*mldo_vio28.vio28=*U2Zldo_vemc.vemc=,@ U2Zldo_vemc_1.vemc=&%U2ZOEldo_vcn33_2_bt .vcn33_2_bt=*U5gldo_vcn33_2_wifi .vcn33_2_wifi=*U5gldo_va12.va12=OU ldo_va09.va09= 5UOldo_vrf18.vrf18=UPldo_vsram_md .vsram_md= U*mldo_vufs.vufs=UOFldo_vm18.vm18=Uldo_vbbck.vbbck=UOldo_vsram_proc1 .vsram_proc1= ULmldo_vsim2.vsim2=U/M`ldo_vsram_others_sshub.vsram_others_sshub= Urtcmediatek,mt6358-rtcspmi@10027000*mediatek,mt8188-spmimediatek,mt8195-spmi ~p (pmifspmimst"8"##"8(pmif_sys_ckpmif_tmr_ckspmimst_clk_muxiommu@10315000mediatek,mt8188-iommu-infra~1P-OPmailbox@10320000mediatek,mt8188-gce~2@-#O\mailbox@10330000mediatek,mt8188-gce~3@-#O^scp@10720000mediatek,mt8188-scp-dual~r(cfg+PJokayscp@0mediatek,scp-core~ (sram-Jokay 4O_scp@d0000mediatek,scp-core~ (sram- Jdisabledaudio-controller@10b10000mediatek,mt8188-afe~"S"5! ! """"""S"" "E"Q"M"N"O"P2""""T"Rclk26mapll1apll2apll12_div0apll12_div1apll12_div2apll12_div3apll12_div9top_a1sys_hptop_aud_intbustop_audio_htop_audio_local_bustop_dptxtop_i2so1top_i2so2top_i2si1top_i2si2adsp_audio_26mapll1_d4apll2_d4apll12_div4top_a2systop_aud_iec-66 &7 -audiosys#9" JdisabledOadsp@10b80000mediatek,mt8188-dsp@~ (cfgsramsecbus"D"D"Eaudiodspadsp_busK89Rrxtx6  Jdisabledmailbox@10b861004mediatek,mt8188-adsp-mboxmediatek,mt8186-adsp-mbox~a-O8mailbox@10b871004mediatek,mt8188-adsp-mboxmediatek,mt8186-adsp-mbox~q-O9clock-controller@10b91100mediatek,mt8188-adsp-audio26m~O2serial@11001100*mediatek,mt8188-uartmediatek,mt6577-uart~- 5# baudbusJokay]defaultk:serial@11001200*mediatek,mt8188-uartmediatek,mt6577-uart~- 5# baudbus Jdisabledserial@11001300*mediatek,mt8188-uartmediatek,mt6577-uart~- 5# baudbus Jdisabledserial@11001400*mediatek,mt8188-uartmediatek,mt6577-uart~- 5# baudbus Jdisabledadc@11002000.mediatek,mt8188-auxadcmediatek,mt8173-auxadc~ #mainJokaysyscon@11003000"mediatek,mt8188-pericfg-aosyscon~0O1spi@1100a000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+~-"y"#parent-clksel-clkspi-clkJokay]defaultk;thermal-sensor@1100b000mediatek,mt8188-lvts-ap~ -#&#u<lvts-calib-data-1Opwm@1100e0002mediatek,mt8188-disp-pwmmediatek,mt8183-disp-pwm~"'#/mainmm- Jdisabledpwm@1100f0002mediatek,mt8188-disp-pwmmediatek,mt8183-disp-pwm~"(#Fmainmm- Jdisabledspi@11010000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+~-"y"#2parent-clksel-clkspi-clkJokay]defaultk=spi@11012000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+~ -"y"#3parent-clksel-clkspi-clkJokay]defaultk>spi@11013000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+~0-"y"#4parent-clksel-clkspi-clk Jdisabledspi@11018000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+~-"y"#8parent-clksel-clkspi-clk Jdisabledspi@11019000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+~-"y"#9parent-clksel-clkspi-clk Jdisabledusb@11201000#mediatek,mt8188-mtu3mediatek,mtu3 ~ - > (macippc ?+-")"v1 "1 sys_ckref_ckmcu_ck?@ Ah Jdisabledusb@0'mediatek,mt8188-xhcimediatek,mtk-xhci~(mac-"*"v1 sys_ckJokayethernet@11021000;mediatek,mt8188-gmacmediatek,mt8195-gmacsnps,dwmac-5.10a~@-macirq011"A"B"C1 .axiapbmac_mainptp_refrmii_internalmac_cg"A"B"C"""6#BC!D4?J Jdisabledmdiosnps,dwmac-mdio+stmmac-axi-configWaqOBrx-queues-configOCqueue0queue1queue2queue3tx-queues-configODqueue0 queue1 queue2 queue3 mmc@11230000(mediatek,mt8188-mmcmediatek,mt8183-mmc ~# "###M!sourcehclksource_cgcrypto_clkJokayH. <N]lyEF]defaultstate_uhskGHmmc@11240000(mediatek,mt8188-mmcmediatek,mt8183-mmc ~$"##$sourcehclksource_cg"" Jdisabledmmc@11250000(mediatek,mt8188-mmcmediatek,mt8183-mmc ~%"##Asourcehclksource_cg"" Jdisabledthermal-sensor@11278000mediatek,mt8188-lvts-mcu~'-#&#u<lvts-calib-data-1Oi2c@11280000mediatek,mt8188-i2c ~("-I#7 maindma+Jokay]defaultkJi2c@11281000mediatek,mt8188-i2c ~("-I#7 maindma+Jokay]defaultkKi2c@11282000mediatek,mt8188-i2c ~( "-I#7 maindma+Jokay]defaultkLclock-controller@11283000mediatek,mt8188-imp-iic-wrap-c~(0OIusb@112a1000#mediatek,mt8188-mtu3mediatek,mtu3 ~*-*> (macippc*?+-"-"v1"1sys_ckref_ckmcu_ckM Ap Jdisabledusb@0'mediatek,mt8188-xhcimediatek,mtk-xhci~(mac-"."v1sys_ckJokayusb@112b1000#mediatek,mt8188-mtu3mediatek,mtu3 ~+-+> (macippc+?+-","v1"1sys_ckref_ckmcu_ckN A` Jdisabledusb@0'mediatek,mt8188-xhcimediatek,mtk-xhci~(mac-"+"v1sys_ckJokaypcie@112f0000*mediatek,mt8188-pciemediatek,mt8192-pcie~/  (pcie-mac rpci+0#L###&#+#C1 /pl_250mtl_26mtl_96mtl_32kperi_26mperi_mem-`OOOO P Q (pcie-phy6&7-mac Jdisabledinterrupt-controllerOOspi@1132c000(mediatek,mt8188-normediatek,mt8186-nor~2"X11 spisfaxi"X-9+Jokay]defaultkRflash@0jedec,spi-nor~ 2ut-phy@11c20700.mediatek,mt8188-tphymediatek,generic-tphy-v3+6 Jdisabledpcie-phy@0~"ref DOQhdmi-phy@11d5f0002mediatek,mt8188-hdmi-phymediatek,mt8195-hdmi-phy~#pll_ref hdmi_txpll D O  ^ JdisabledOzdsi-phy@11c800000mediatek,mt8188-mipi-txmediatek,mt8183-mipi-tx~5 mipi_tx0_pll D JdisabledOsdsi-phy@11c900000mediatek,mt8188-mipi-txmediatek,mt8183-mipi-tx~5 mipi_tx0_pll D JdisabledOti2c@11e00000mediatek,mt8188-i2c ~"-S#7 maindma+Jokay]defaultkTi2c@11e01000mediatek,mt8188-i2c ~"-S#7 maindma+Jokay]defaultkUclock-controller@11e02000mediatek,mt8188-imp-iic-wrap-w~ OSt-phy@11e30000.mediatek,mt8188-tphymediatek,generic-tphy-v3+Jokayusb-phy@0~"! refda_ref DONt-phy@11e40000.mediatek,mt8188-tphymediatek,generic-tphy-v3+Jokayusb-phy@0~"! refda_ref DO?usb-phy@700~ !5 refda_ref DO@t-phy@11e80000.mediatek,mt8188-tphymediatek,generic-tphy-v3+Jokayusb-phy@0~"! refda_ref DOMi2c@11ec0000mediatek,mt8188-i2c ~"-V#7 maindma+Jokay]defaultkWi2c@11ec1000mediatek,mt8188-i2c ~"-V#7 maindma+Jokay]defaultkXclock-controller@11ec2000 mediatek,mt8188-imp-iic-wrap-en~ OVefuse@11f20000,mediatek,mt8188-efusemediatek,mt8186-efuse~+dp-calib@1a0~ O{lvts1-calib@1ac~@O<gpu-speedbin@581~ pOZsocinfo-data1@7a0~socinfo-data2@7e0~gpu@13000000)mediatek,mt8188-maliarm,mali-valhall-jm~@Y0-~} jobmmugpuuZ speed-bin u[666 core0core1core2@ JdisabledOclock-controller@13fbf000mediatek,mt8188-mfgcfg~OYsyscon@14000000mediatek,mt8188-vppsys0syscon~O$dma-controller@14001000mediatek,mt8188-mdp3-rdma~ $<K\ \\\\ ]6 ^   _display@140020000mediatek,mt8188-mdp3-fgmediatek,mt8195-mdp3-fg~ $ ^ display@140040002mediatek,mt8188-mdp3-hdrmediatek,mt8195-mdp3-hdr~@$" ^@display@140050002mediatek,mt8188-mdp3-aalmediatek,mt8195-mdp3-aal~P-F$ 6 ^Pdisplay@140060002mediatek,mt8188-mdp3-rszmediatek,mt8183-mdp3-rsz~`$  ^` %display@140070006mediatek,mt8188-mdp3-tdshpmediatek,mt8195-mdp3-tdshp~p$# ^pdisplay@140080006mediatek,mt8188-mdp3-colormediatek,mt8195-mdp3-color~-I$$6 ^display@140090002mediatek,mt8188-mdp3-ovlmediatek,mt8195-mdp3-ovl~-J$%6 ^ ]display@1400a000:mediatek,mt8188-mdp3-paddingmediatek,mt8195-mdp3-padding~$6 ^display@1400b0002mediatek,mt8188-mdp3-tccmediatek,mt8195-mdp3-tcc~$ ^display@1400c0004mediatek,mt8188-mdp3-wrotmediatek,mt8183-mdp3-wrot~ $ ]6 ^  +mutex@1400f000mediatek,mt8188-vpp-mutex~-P$6 ^smi@14012000mediatek,mt8188-smi-common-vpp~ $$apbsmi6O`smi@14013000mediatek,mt8188-smi-larb~0$$apbsmi6  `Ociommu@14018000mediatek,mt8188-iommu-vpp~P$bclk-R6 abcdefO]dma-controller@14f09000mediatek,mt8188-mdp3-rdma~ &  g6 ^  dma-controller@14f0a000mediatek,mt8188-mdp3-rdma~ &  ]6 ^  display@14f0c0000mediatek,mt8188-mdp3-fgmediatek,mt8195-mdp3-fg~&  ^ display@14f0d0000mediatek,mt8188-mdp3-fgmediatek,mt8195-mdp3-fg~&  ^ display@14f0f0002mediatek,mt8188-mdp3-hdrmediatek,mt8195-mdp3-hdr~&" ^ display@14f100002mediatek,mt8188-mdp3-hdrmediatek,mt8195-mdp3-hdr~&$ ^ display@14f120002mediatek,mt8188-mdp3-aalmediatek,mt8195-mdp3-aal~ -j&#6 ^ display@14f130002mediatek,mt8188-mdp3-aalmediatek,mt8195-mdp3-aal~0-k&%6 ^ 0display@14f150002mediatek,mt8188-mdp3-rszmediatek,mt8183-mdp3-rsz~P& ^ P display@14f160002mediatek,mt8188-mdp3-rszmediatek,mt8183-mdp3-rsz~`& ^ ` display@14f180006mediatek,mt8188-mdp3-tdshpmediatek,mt8195-mdp3-tdshp~& ^ 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Jdisabledports+port@0~endpointport@1~endpointdp-intf@1c113000mediatek,mt8188-dp-intf~0.:.!pixelenginepll-6 Jdisabledethdr@1c1140006mediatek,mt8188-disp-ethdrmediatek,mt8195-disp-ethdrp~@Pp4(mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsh.0.+...,./.-.<.1.2.3.4.5"mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsvdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncethdr_top-6 ]d]e6(&.1.2.3.4.5p \@\P\p\\\\padding@1c11d000mediatek,mt8188-disp-padding~.6 \padding@1c11e000mediatek,mt8188-disp-padding~. 6 \padding@1c11f000mediatek,mt8188-disp-padding~.!6 \padding@1c120000mediatek,mt8188-disp-padding~."6 \padding@1c121000mediatek,mt8188-disp-padding~.#6 \padding@1c122000mediatek,mt8188-disp-padding~ .$6 \ padding@1c123000mediatek,mt8188-disp-padding~0.%6 \0padding@1c124000mediatek,mt8188-disp-padding~@.&6 \@hdmi@1c300000mediatek,mt8188-hdmi-tx~0 "@">"?&.bushdcphdcp24mhdmi-split">"s-6 z (hdmi Jdisabledi2c2mediatek,mt8188-hdmi-ddcmediatek,mt8195-hdmi-ddc5ports+port@0~endpointport@1~endpointedp-tx@1c500000mediatek,mt8188-edp-tx~P-u{dp_calibration_data6 O Jdisableddp-tx@1c600000mediatek,mt8188-dp-tx~`-u{dp_calibration_data6 O Jdisabledchosen `serial0:115200n8memory@40000000rmemory~@reserved-memory+memory@50000000shared-dma-pool~P lO4 compatibleinterrupt-parent#address-cells#size-cellsmodeldp-intf0dp-intf1dpi1dsc0ethdr0gce0gce1merge0merge1merge2merge3merge4merge5mutex0mutex1padding0padding1padding2padding3padding4padding5padding6padding7vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7serial0i2c0i2c1i2c2i2c3i2c4i2c5i2c6mmc0device_typeregenable-methodclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheperformance-domains#cooling-cellsphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-output-namesopp-sharedopp-hzopp-microvoltopp-supported-hwinterruptsmediatek,platformstatuspolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicedma-ranges#performance-domain-cells#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-pull-upinput-enabledrive-strengthbias-pull-downbias-disable#power-domain-cellsclocksclock-namesmediatek,infracfgmediatek,disable-extrst#sound-dai-cellsinterrupts-extended#io-channel-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modesassigned-clocksassigned-clock-parents#iommu-cells#mbox-cellsmemory-regionpower-domainsresetsreset-namesmediatek,topckgenmboxesmbox-namespinctrl-namespinctrl-0nvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsphyswakeup-sourcemediatek,syscon-wakeupinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,prioritysnps,weightbus-widthhs400-ds-delaymax-frequencycap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vsupports-cqecap-mmc-hw-resetno-sdiono-sdnon-removablevmmc-supplyvqmmc-supplypinctrl-1clock-divbus-rangelinux,pci-domaininterrupt-mapinterrupt-map-maskiommu-mapiommu-map-maskphy-namesspi-max-frequency#phy-cellsmediatek,ibiasmediatek,ibias_upbitsoperating-points-v2power-domain-names#dma-cellsiommusmediatek,gce-client-regmediatek,gce-eventsmediatek,scpmediatek,larb-idmediatek,smimediatek,larbsremote-endpointmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzstdout-pathno-map