8ހ(H=hoperun,hihope-rzg2-exhoperun,hihope-rzg2mrenesas,r8a774a1 &/7HopeRun HiHope RZ/G2M (Rev.2.0) with sub boardaudio_clk_a fixed-clock=JXZ9audio_clk_b fixed-clock=JZ:audio_clk_c fixed-clock=JZ;can fixed-clock=JZ$opp-table-0operating-points-v2bZ opp-500000000met opp-1000000000m;t opp-1500000000mYh/t opp-table-1operating-points-v2bZ opp-800000000m/t opp-1000000000m;t opp-1200000000mGt cpus cpu-mapcluster0core0core1cluster1core0core1core2core3cpu@0arm,cortex-a57cpu psciV  (Zcpu@1arm,cortex-a57cpu psci  (Zcpu@100arm,cortex-a53cpu psci(  0Zcpu@101arm,cortex-a53cpu psci  0Zcpu@102arm,cortex-a53cpu psci  0Zcpu@103arm,cortex-a53cpu psci  0Zcache-controller-0cache 7EZ cache-controller-1cache7EZ extal fixed-clock=JP*QZextalr fixed-clock=JQZpcie_bus fixed-clock=JZUpmu_a53arm,cortex-a53-pmu0\TUVWgpmu_a57arm,cortex-a57-pmu\HIgpsciarm,psci-1.0arm,psci-0.2smcscif fixed-clock=JZsoc simple-busQ zwatchdog@e6020000+renesas,r8a774a1-wdtrenesas,rcar-gen3-wdt  \   okay<gpio@e6050000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioP \   Z~gpio@e6051000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioP \    lvds-connector-en-hoglvds-connector-en-gpiogpio@e6052000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio P \@   Z#gpio@e6053000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio0P \`   ZPgpio@e6054000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio@P \   gpio@e6055000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioPP \    gpio@e6055400-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioTP \     Z}usb1-reset-hog  usb1-resetgpio@e6055800-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioXP \    Zpinctrl@e6060000renesas,pfc-r8a774a1 Q defaultZhscif0%hscif0_datahscif0_ctrl,hscif0Zscif2 %scif2_data_a,scif2Z(scif_clk %scif_clk_a ,scif_clkZsd0%sdhi0_data4sdhi0_ctrl,sdhi05 ZLsd0_uhs%sdhi0_data4sdhi0_ctrl,sdhi05ZMsd2%sdhi2_data4sdhi2_ctrl,sdhi25ZQsd3 %sdhi3_data8sdhi3_ctrlsdhi3_ds,sdhi35ZSusb0%usb0,usb0ZIusb1ZKmux%usb1,usb1ovcBGP_6_27Gusb30%usb30,usb30ZCsound_clk%audio_clk_a_a ,audio_clkZ<avbZ!mux%avb_linkavb_mdioavb_mii,avbpins_mdio %avb_mdioTpins_mii_txKBPIN_AVB_TX_CTLPIN_AVB_TXCPIN_AVB_TD0PIN_AVB_TD1PIN_AVB_TD2PIN_AVB_TD3T can0 %can0_data_a,can0Z%can1 %can1_data,can1Z&pwm0%pwm0,pwm0Z'timer@e60f0000-renesas,r8a774a1-cmt0renesas,rcar-gen3-cmt0\ /cfck  / disabledtimer@e6130000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1`\xyz{|}~ .cfck  . disabledtimer@e6140000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1`\ -cfck  - disabledtimer@e6148000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1`\ ,cfck  , disabledclock-controller@e6150000renesas,r8a774a1-cpg-mssr  cextalextalr=oQZ reset-controller@e6160000renesas,r8a774a1-rstQsystem-controller@e6180000renesas,r8a774a1-syscoZthermal@e6198000renesas,r8a774a1-thermal0$\CDE     Zzinterrupt-controller@e61c0000&renesas,intc-ex-r8a774a1renesas,irqcH\   timer@e61e0000!renesas,tmu-r8a774a1renesas,tmu0$\tuni0tuni1tuni2 }cfck  } disabledtimer@e6fc0000!renesas,tmu-r8a774a1renesas,tmu00\tuni0tuni1tuni2ticpi2 |cfck  | disabledtimer@e6fd0000!renesas,tmu-r8a774a1renesas,tmu00\/012tuni0tuni1tuni2ticpi2 {cfck  { disabledtimer@e6fe0000!renesas,tmu-r8a774a1renesas,tmu0$\tuni0tuni1tuni2 zcfck  z disabledtimer@ffc00000!renesas,tmu-r8a774a1renesas,tmu0$\tuni0tuni1tuni2 ycfck  y disabledi2c@e6500000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cP@ \     txrxtxrxn disabledi2c@e6508000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cP@ \      txrxtxrx disabledi2c@e6510000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cQ@ \     txrxtxrx disabledi2c@e66d0000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cm@ \"   txrxn disabledi2c@e66d8000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cm@ \   txrxnokayJclock-generator@6aidt,5p49v5923j=cxinZqgpio@20 onnn,pca9654 Zi2c@e66e0000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cn@ \   txrxn disabledi2c@e66e8000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cn@ \   txrx disabledi2c@e60b0000 ?renesas,iic-r8a774a1renesas,rcar-gen3-iicrenesas,rmobile-iic % \   txrx disabledserial@e6540000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifT` \  cfckbrg_intscif_clk 1010 txrxtxrx  okay defaultbluetooth ti,wl1837-st serial@e6550000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifU` \  cfckbrg_intscif_clk 3232 txrxtxrx   disabledserial@e6560000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifV` \  cfckbrg_intscif_clk 5454 txrxtxrx   disabledserial@e66a0000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifj` \  cfckbrg_intscif_clk76txrx   disabledserial@e66b0000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifk` \  cfckbrg_intscif_clk98txrx   disabledusb@e6590000/renesas,usbhs-r8a774a1renesas,rcar-gen3-usbhsY \k   ch0ch1ch2ch3" 27usb   okayAotgclock-controller@e6590630Frenesas,r8a774a1-rcar-usb2-clock-selrenesas,rcar-gen3-usb2-clock-selY0  'cehci_ohcihs-usb-ifusb_extalusb_xtal=   Iehci_ohcihs-usb-if disableddma-controller@e65a0000+renesas,r8a774a1-usb-dmacrenesas,usb-dmacZ\mmch0ch1 J  JU`Zdma-controller@e65b0000+renesas,r8a774a1-usb-dmacrenesas,usb-dmac[\nnch0ch1 K  KU`Zusb-phy@e65ee0005renesas,r8a774a1-usb3-phyrenesas,rcar-gen3-usb3-phy^ Hcusb3-ifusb3s_clkusb_extal  HmokayZDdma-controller@e6700000(renesas,dmac-r8a774a1renesas,rcar-dmacp\Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 cfck  U`x     Zdma-controller@e7300000(renesas,dmac-r8a774a1renesas,rcar-dmac0\456789:;<=>?Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 cfck  U`x     Zdma-controller@e7310000(renesas,dmac-r8a774a1renesas,rcar-dmac1\Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 cfck  U`xZiommu@e6740000renesas,ipmmu-r8a774a1t  Ziommu@e7740000renesas,ipmmu-r8a774a1t  Ziommu@e6570000renesas,ipmmu-r8a774a1W  ZViommu@e67b0000renesas,ipmmu-r8a774a1{\ Z iommu@ec670000renesas,ipmmu-r8a774a1g  ZBiommu@fd800000renesas,ipmmu-r8a774a1  iommu@fd950000renesas,ipmmu-r8a774a1  iommu@fe6b0000renesas,ipmmu-r8a774a1k ZXiommu@febd0000renesas,ipmmu-r8a774a1  ZYethernet@e68000005renesas,etheravb-r8a774a1renesas,etheravb-rcar-gen3,\'()*+,-./0123456789:;<=>?sch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15ch16ch17ch18ch19ch20ch21ch22ch23ch24 ,cfck  ,rgmiix okay !default"ethernet-phy@04ethernet-phy-id001c.c915ethernet-phy-ieee802.3-c22 #  # Z"can@e6c30000+renesas,can-r8a774a1renesas,rcar-gen3-can \  .$cclkp1clkp2can_clk  . bZ  okay %defaultcan@e6c38000+renesas,can-r8a774a1renesas,rcar-gen3-canÀ \  .$cclkp1clkp2can_clk  . bZ  okay &defaultcan@e66c0000/renesas,r8a774a1-canfdrenesas,rcar-gen3-canfdl\ ch_intg_int  .$cfckcanfdcan_clk  . Ĵ   disabledchannel0 disabledchannel1 disabledpwm@e6e30000&renesas,pwm-r8a774a1renesas,pwm-rcar"     okay 'defaultZpwm@e6e31000&renesas,pwm-r8a774a1renesas,pwm-rcar"      disabledpwm@e6e32000&renesas,pwm-r8a774a1renesas,pwm-rcar "      disabledpwm@e6e33000&renesas,pwm-r8a774a1renesas,pwm-rcar0"      disabledpwm@e6e34000&renesas,pwm-r8a774a1renesas,pwm-rcar@"      disabledpwm@e6e35000&renesas,pwm-r8a774a1renesas,pwm-rcarP"      disabledpwm@e6e36000&renesas,pwm-r8a774a1renesas,pwm-rcar`"      disabledserial@e6e60000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  cfckbrg_intscif_clk QPQP txrxtxrx   disabledserial@e6e68000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  cfckbrg_intscif_clk SRSR txrxtxrx   disabledserial@e6e88000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \ 6 cfckbrg_intscif_clk  txrxtxrx  6okay (defaultQserial@e6c50000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  cfckbrg_intscif_clkWVtxrx   disabledserial@e6c40000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  cfckbrg_intscif_clkYXtxrx   disabledserial@e6f30000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  cfckbrg_intscif_clk [Z[Z txrxtxrx   disabledspi@e6e90000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd \  A@A@ txrxtxrx    disabledspi@e6ea0000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd \  CBCB txrxtxrx    disabledspi@e6c00000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd \ EDtxrx    disabledspi@e6c10000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd \ GFtxrx    disabledvideo@e6ef0000renesas,vin-r8a774a1 \ +  +- disabledports port@1 endpoint@08)Z_endpoint@28*Zgvideo@e6ef1000renesas,vin-r8a774a1 \ *  *- disabledports port@1 endpoint@08+Z`endpoint@28,Zhvideo@e6ef2000renesas,vin-r8a774a1  \ )  )- disabledports port@1 endpoint@08-Zaendpoint@28.Zivideo@e6ef3000renesas,vin-r8a774a10 \ (  (- disabledports port@1 endpoint@08/Zbendpoint@280Zjvideo@e6ef4000renesas,vin-r8a774a1@ \ '  '- disabledports port@1 endpoint@081Zcendpoint@282Zkvideo@e6ef5000renesas,vin-r8a774a1P \ &  &- disabledports port@1 endpoint@083Zdendpoint@284Zlvideo@e6ef6000renesas,vin-r8a774a1` \ %  %- disabledports port@1 endpoint@085Zeendpoint@286Zmvideo@e6ef7000renesas,vin-r8a774a1p \ $  $- disabledports port@1 endpoint@087Zfendpoint@288Znsound@ec5000004renesas,rcar_sound-r8a774a1renesas,rcar_sound-gen3PPZTTvHscuadgssiussiaudmapp\                           9:; cssi-allssi.9ssi.8ssi.7ssi.6ssi.5ssi.4ssi.3ssi.2ssi.1ssi.0src.9src.8src.7src.6src.5src.4src.3src.2src.1src.0mix.1mix.0ctu.1ctu.0dvc.0dvc.1clk_aclk_bclk_cclk_i X           DIssi-allssi.9ssi.8ssi.7ssi.6ssi.5ssi.4ssi.3ssi.2ssi.1ssi.0okay <defaultrcar_sound,ctuctu-0ctu-1ctu-2ctu-3ctu-4ctu-5ctu-6ctu-7rcar_sound,dvcdvc-0=txdvc-1=txrcar_sound,mixmix-0mix-1rcar_sound,srcsrc-0 \`>=rxtxsrc-1 \a>=rxtxsrc-2 \b>=rxtxsrc-3 \c>=rxtxsrc-4 \d>=rxtxsrc-5 \e>=rxtxsrc-6 \f>=rxtxsrc-7 \g>=rxtxsrc-8 \h>=rxtxsrc-9 \i>=rxtxrcar_sound,ssissi-0 \r>=rxtxssi-1 \s>=rxtxssi-2 \t>=rxtxZAssi-3 \u>=rxtxssi-4 \v> = rxtxssi-5 \w> = rxtxssi-6 \x> =rxtxssi-7 \y>=rxtxssi-8 \z>=rxtxssi-9 \{>=rxtxrcar_sound,ssiussiu-0>=rxtxssiu-1>5=6rxtxssiu-2>7=8rxtxssiu-3>G=Hrxtxssiu-4>?=@rxtxssiu-5>C=Drxtxssiu-6>O=Prxtxssiu-7>S=Trxtxssiu-8>I=Jrxtxssiu-9>K=Lrxtxssiu-10>W=Xrxtxssiu-11>Y=Zrxtxssiu-12>_=`rxtxssiu-13>=rxtxssiu-14>=rxtxssiu-15>=rxtxssiu-16>c=drxtxssiu-17>g=hrxtxssiu-18>k=lrxtxssiu-19>m=nrxtxssiu-20>=rxtxssiu-21>=rxtxssiu-22>=rxtxssiu-23>=rxtxssiu-24>o=prxtxssiu-25>!="rxtxssiu-26>#=$rxtxssiu-27>%=&rxtxssiu-28>'=(rxtxssiu-29>)=*rxtxssiu-30>+=,rxtxssiu-31>-=.rxtxssiu-32>q=rrxtxssiu-33>=rxtxssiu-34>=rxtxssiu-35>=rxtxssiu-36>=rxtxssiu-37>= rxtxssiu-38>1=2rxtxssiu-39>3=4rxtxssiu-40>s=trxtxssiu-41>u=vrxtxssiu-42>y=zrxtxssiu-43>{=|rxtxssiu-44>}=~rxtxssiu-45>=rxtxssiu-46>=rxtxssiu-47>=rxtxssiu-48>=rxtxssiu-49>=rxtxssiu-50>=rxtxssiu-51>=rxtxportZendpoint8?Ri2s]@m@zAZ@dma-controller@ec700000(renesas,dmac-r8a774a1renesas,rcar-dmacp\^@ABCDEFGHIJKLMNOLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 cfck  U`xBBBBBBBBBB B B B B BBZ>dma-controller@ec720000(renesas,dmac-r8a774a1renesas,rcar-dmacr\_PQRSTUVWXYZ[\]~Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 cfck  U`xBBBBBBBBBBBBBBBBZ=usb@ee000000-renesas,xhci-r8a774a1renesas,rcar-gen3-xhci  \f H  Hokay CdefaultZEusb@ee0200007renesas,r8a774a1-usb3-perirenesas,rcar-gen3-usb3-peri \h H  Hokay2D7usbEusb@ee080000 generic-ohci \l  27usb   okayZGusb@ee0a0000 generic-ohci  \p 2F7usb  okayZHusb@ee080100 generic-ehci \l  27usbG   okayusb@ee0a0100 generic-ehci  \p 2F7usbH  okayusb-phy@ee0802005renesas,usb2-phy-r8a774a1renesas,rcar-gen3-usb2-phy \l     mokay IdefaultJZusb-phy@ee0a02005renesas,usb2-phy-r8a774a1renesas,rcar-gen3-usb2-phy    mokay KdefaultZFmmc@ee100000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi  \ :  ccoreclkh   :x okay LMdefaultstate_uhsNO P mmc@ee120000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi  \ 9  ccoreclkh   9x! disabledmmc@ee140000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi  \ 8 ! ccoreclkh   8x"okay QdefaultR wlcore@2 ti,wl1837 #mmc@ee160000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi  \ 7 # ccoreclkh   7x#okay SSdefaultstate_uhsNT/>DLspi@ee2000001renesas,r8a774a1-rpc-ifrenesas,rcar-gen3-rpc-if0  Hregsdirmapwbuf \&     disabledinterrupt-controller@f1010000 arm,gic-400 @ \ ? cclk  Zpcie@fe000000-renesas,pcie-r8a774a1renesas,pcie-rcar-gen3 cpcipz 00B88mB$\tuvx t ?Ucpciepcie_bus  ?Vokaypcie@ee800000-renesas,pcie-r8a774a1renesas,pcie-rcar-gen3 cpcipz BmB$\x  >Ucpciepcie_bus  >Vokaypcie-ep@fe0000003renesas,r8a774a1-pcie-eprenesas,rcar-gen3-pcie-epP 08)Hapb-basememory0memory1memory2memory3$\tuv ?cpcie ?  disabledpcie-ep@ee8000003renesas,r8a774a1-pcie-eprenesas,rcar-gen3-pcie-epP )Hapb-basememory0memory1memory2memory3$\ >cpcie >  disabledfdp1@fe940000 renesas,fdp1$ \ w wWfcp@fe950000 renesas,fcpf g gxXZWfcp@fe96f000 renesas,fcpv _ _xYZZfcp@fea27000 renesas,fcpvp [  [xYZ[fcp@fea2f000 renesas,fcpv Z  ZxY Z\fcp@fea37000 renesas,fcpvp Y  YxY Z]fcp@fe9af000 renesas,fcpv c cxXZ^vsp@fe960000 renesas,vsp2 \  r rZvsp@fea20000 renesas,vsp2P \ o  o[Zsvsp@fea28000 renesas,vsp2P \ n  n\Ztvsp@fea30000 renesas,vsp2P \ m  m]Zuvsp@fe9a0000 renesas,vsp2 \ w w^csi2@fea80000renesas,r8a774a1-csi2 \    disabledports port@0port@1 endpoint@08_Z)endpoint@18`Z+endpoint@28aZ-endpoint@38bZ/endpoint@48cZ1endpoint@58dZ3endpoint@68eZ5endpoint@78fZ7csi2@feaa0000renesas,r8a774a1-csi2 \    disabledports port@0port@1 endpoint@08gZ*endpoint@18hZ,endpoint@28iZ.endpoint@38jZ0endpoint@48kZ2endpoint@58lZ4endpoint@68mZ6endpoint@78nZ8hdmi@fead0000-renesas,r8a774a1-hdmirenesas,rcar-gen3-hdmi \  ( ciahbisfr  okayports port@0endpoint8oZvport@1endpoint8pZ|port@2endpoint8@Z?display@feb00000renesas,du-r8a774a1$\  8   qrq*cdu.0du.1du.2dclkin.0dclkin.1dclkin.2   Idu.0du.2okaystuports port@0port@1endpoint8vZoport@2endpoint8wZxlvds@feb90000renesas,r8a774a1-lvds   okayports port@0endpoint8xZwport@1endpoint8yZchipid@fff00044 renesas,prrDQthermal-zonessensor1-thermalz"tripssensor1-crit criticalsensor2-thermalz"tripssensor2-crit criticalsensor3-thermalz"cooling-mapsmap0({ -<map1({ -<tripstrip-point1passiveZ{sensor3-crit criticaltimerarm,armv8-timer0\ ?? ? ?sec-physphysvirthyp-physusb3s0 fixed-clock=JZusb_extal fixed-clock=JZaliasesI/soc/i2c@e6500000N/soc/i2c@e6508000S/soc/i2c@e6510000X/soc/i2c@e66d0000]/soc/i2c@e66d8000b/soc/i2c@e66e0000g/soc/i2c@e66e8000l/soc/i2c@e60b0000q/soc/serial@e6e88000y/soc/serial@e6540000/soc/mmc@ee160000/soc/mmc@ee100000/soc/mmc@ee140000/soc/ethernet@e6800000chosen'ignore_loglevel rw root=/dev/nfs ip=onserial0:115200n8hdmi0-outhdmi-connectoraportendpoint8|Zpleds gpio-ledsled1 } led2 } led3 ~led4 } bt_active_ledblue:bt  hci0-poweroffwlan_active_led yellow:wlan phy0txoffregulator-1p8vregulator-fixed fixed-1.8Vw@w@*ZTregulator-3p3vregulator-fixed fixed-3.3V2Z2Z*ZNsoundaudio-graph-card rcar-sound>regulator-vbus0-usb2regulator-fixed USB20_VBUS0LK@LK@ C}HZJregulator-vccq-sdhi0regulator-gpio SDHI0 VccQw@2Z }[a2Zw@ZOx302-clock fixed-clock=J@Zrx304-clock fixed-clock=J}x@Zregulator-wlan_enregulator-fixedwlan-en-regulatorw@w@hp CHZRmemory@48000000memoryHxmemory@600000000memorybacklightpwm-backlight yP ~ @panel-lvds advantech,idk-1110wrpanel-lvds} jeida-24panel-timingJ @X((  portendpoint8Zy compatible#address-cells#size-cellsinterrupt-parentmodel#clock-cellsclock-frequencyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendcpuregdevice_typepower-domainsnext-level-cacheenable-methoddynamic-power-coefficientclocksoperating-points-v2capacity-dmips-mhz#cooling-cellscache-unifiedcache-levelbootph-allinterruptsinterrupt-affinityrangesresetsstatustimeout-sec#gpio-cellsgpio-controllergpio-ranges#interrupt-cellsinterrupt-controllergpio-hoggpiosoutput-lowline-namepinctrl-0pinctrl-namesgroupsfunctionpower-sourcepinsbias-pull-updrive-strengthclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-namesdmasdma-namesi2c-scl-internal-delay-nsidt,shutdownidt,output-enable-activeuart-has-rtsctsenable-gpiosrenesas,buswaitphysphy-namesdr_modereset-names#dma-cellsdma-channels#phy-cellsiommusrenesas,ipmmu-main#iommu-cellsphy-moderx-internal-delay-pstx-internal-delay-psphy-handleinterrupts-extendedreset-gpiosassigned-clocksassigned-clock-rates#pwm-cellsrenesas,idremote-endpointreg-namesdai-formatbitclock-masterframe-masterplaybackcompanionvbus-supplymax-frequencypinctrl-1vmmc-supplyvqmmc-supplycd-gpiosbus-widthsd-uhs-sdr50sd-uhs-sdr104non-removablecap-power-off-cardkeep-power-in-suspendmmc-hs200-1_8vno-sdno-sdiofixed-emmc-driver-typebus-rangedma-rangesinterrupt-map-maskinterrupt-mapiommu-mapiommu-map-maskrenesas,fcprenesas,vspspolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributioni2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7serial0serial1mmc0mmc1mmc2ethernet0bootargsstdout-pathlabellinux,default-triggerdefault-stateregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-ondaisgpioenable-active-highgpios-statesstartup-delay-uspwmsbrightness-levelsdefault-brightness-levelwidth-mmheight-mmdata-mappinghactivevactivehsync-lenhfront-porchhback-porchvfront-porchvback-porchvsync-len