8٤(%l&hoperun,hihope-rzg2mrenesas,r8a774a1 &37HopeRun HiHope RZ/G2M main board based on r8a774a1audio_clk_a fixed-clock=JXZ7audio_clk_b fixed-clock=Jaudio_clk_c fixed-clock=JZ8can fixed-clock=JZ%opp-table-0operating-points-v2bZ opp-500000000met opp-1000000000m;t opp-1500000000mYh/t opp-table-1operating-points-v2bZ opp-800000000m/t opp-1000000000m;t opp-1200000000mGt cpus cpu-mapcluster0core0core1cluster1core0core1core2core3cpu@0arm,cortex-a57cpu psciV  (Zcpu@1arm,cortex-a57cpu psci  (Zcpu@100arm,cortex-a53cpu psci(  0Zcpu@101arm,cortex-a53cpu psci  0Zcpu@102arm,cortex-a53cpu psci  0Zcpu@103arm,cortex-a53cpu psci  0Zcache-controller-0cache 7EZ cache-controller-1cache7EZ extal fixed-clock=JP*QZextalr fixed-clock=JQZpcie_bus fixed-clock=JZSpmu_a53arm,cortex-a53-pmu0\TUVWgpmu_a57arm,cortex-a57-pmu\HIgpsciarm,psci-1.0arm,psci-0.2smcscif fixed-clock=JZsoc simple-busQ zwatchdog@e6020000+renesas,r8a774a1-wdtrenesas,rcar-gen3-wdt  \   okay<gpio@e6050000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioP \   Z{gpio@e6051000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioP \    gpio@e6052000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio P \@   ZPgpio@e6053000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio0P \`   Zgpio@e6054000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio@P \   Z}gpio@e6055000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioPP \    gpio@e6055400-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioTP \     Zzusb1-reset-hog  usb1-resetgpio@e6055800-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioXP \    pinctrl@e6060000renesas,pfc-r8a774a1 Q defaultZhscif0%hscif0_datahscif0_ctrl,hscif0Zscif2 %scif2_data_a,scif2Z&scif_clk %scif_clk_a ,scif_clkZsd0%sdhi0_data4sdhi0_ctrl,sdhi05 ZJsd0_uhs%sdhi0_data4sdhi0_ctrl,sdhi05ZKsd2%sdhi2_data4sdhi2_ctrl,sdhi25ZNsd3 %sdhi3_data8sdhi3_ctrlsdhi3_ds,sdhi35ZQusb0%usb0,usb0ZGusb1ZImux%usb1,usb1ovcBGP_6_27Gusb30%usb30,usb30ZAi2c2%i2c2_a,i2c2Zsound_clk+%audio_clk_a_aaudio_clk_b_aaudio_clkout_a ,audio_clkZ:sound$%ssi01239_ctrlssi0_datassi1_data_a,ssiZ9timer@e60f0000-renesas,r8a774a1-cmt0renesas,rcar-gen3-cmt0\ /Tfck  / disabledtimer@e6130000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1`\xyz{|}~ .Tfck  . disabledtimer@e6140000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1`\ -Tfck  - disabledtimer@e6148000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1`\ ,Tfck  , disabledclock-controller@e6150000renesas,r8a774a1-cpg-mssr  Textalextalr=`tQZ reset-controller@e6160000renesas,r8a774a1-rstQsystem-controller@e6180000renesas,r8a774a1-sysc`Zthermal@e6198000renesas,r8a774a1-thermal0$\CDE     Zwinterrupt-controller@e61c0000&renesas,intc-ex-r8a774a1renesas,irqcH\   timer@e61e0000!renesas,tmu-r8a774a1renesas,tmu0$\tuni0tuni1tuni2 }Tfck  } disabledtimer@e6fc0000!renesas,tmu-r8a774a1renesas,tmu00\tuni0tuni1tuni2ticpi2 |Tfck  | disabledtimer@e6fd0000!renesas,tmu-r8a774a1renesas,tmu00\/012tuni0tuni1tuni2ticpi2 {Tfck  { disabledtimer@e6fe0000!renesas,tmu-r8a774a1renesas,tmu0$\tuni0tuni1tuni2 zTfck  z disabledtimer@ffc00000!renesas,tmu-r8a774a1renesas,tmu0$\tuni0tuni1tuni2 yTfck  y disabledi2c@e6500000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cP@ \     txrxtxrxn disabledi2c@e6508000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cP@ \      txrxtxrx disabledi2c@e6510000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cQ@ \     txrxtxrxokay defaultclk-multiplier@4f=cirrus,cs2000-cpOTclk_inref_clkwZi2c@e66d0000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cm@ \"   txrxn disabledi2c@e66d8000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cm@ \   txrxnokayJclock-generator@6aidt,5p49v5923j=TxinZoi2c@e66e0000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cn@ \   txrxn disabledi2c@e66e8000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cn@ \   txrx disabledi2c@e60b0000 ?renesas,iic-r8a774a1renesas,rcar-gen3-iicrenesas,rmobile-iic % \   txrx disabledserial@e6540000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifT` \  Tfckbrg_intscif_clk 1010 txrxtxrx  okay defaultbluetooth ti,wl1837-st + serial@e6550000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifU` \  Tfckbrg_intscif_clk 3232 txrxtxrx   disabledserial@e6560000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifV` \  Tfckbrg_intscif_clk 5454 txrxtxrx   disabledserial@e66a0000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifj` \  Tfckbrg_intscif_clk76txrx   disabledserial@e66b0000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifk` \  Tfckbrg_intscif_clk98txrx   disabledusb@e6590000/renesas,usbhs-r8a774a1renesas,rcar-gen3-usbhsY \k   ch0ch1ch2ch38 HMusb   okayWotgclock-controller@e6590630Frenesas,r8a774a1-rcar-usb2-clock-selrenesas,rcar-gen3-usb2-clock-selY0   !'Tehci_ohcihs-usb-ifusb_extalusb_xtal=   _ehci_ohcihs-usb-if disableddma-controller@e65a0000+renesas,r8a774a1-usb-dmacrenesas,usb-dmacZ\mmch0ch1 J  JkvZdma-controller@e65b0000+renesas,r8a774a1-usb-dmacrenesas,usb-dmac[\nnch0ch1 K  KkvZusb-phy@e65ee0005renesas,r8a774a1-usb3-phyrenesas,rcar-gen3-usb3-phy^ H! Tusb3-ifusb3s_clkusb_extal  HokayZBdma-controller@e6700000(renesas,dmac-r8a774a1renesas,rcar-dmacp\Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 Tfck  kv"""""""""" " " " " ""Zdma-controller@e7300000(renesas,dmac-r8a774a1renesas,rcar-dmac0\456789:;<=>?Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 Tfck  kv########## # # # # ##Zdma-controller@e7310000(renesas,dmac-r8a774a1renesas,rcar-dmac1\Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 Tfck  kv################Ziommu@e6740000renesas,ipmmu-r8a774a1t$ Z"iommu@e7740000renesas,ipmmu-r8a774a1t$ Z#iommu@e6570000renesas,ipmmu-r8a774a1W$ ZTiommu@e67b0000renesas,ipmmu-r8a774a1{\ Z$iommu@ec670000renesas,ipmmu-r8a774a1g$ Z@iommu@fd800000renesas,ipmmu-r8a774a1$ iommu@fd950000renesas,ipmmu-r8a774a1$ iommu@fe6b0000renesas,ipmmu-r8a774a1k$ZViommu@febd0000renesas,ipmmu-r8a774a1$  ZWethernet@e68000005renesas,etheravb-r8a774a1renesas,etheravb-rcar-gen3,\'()*+,-./0123456789:;<=>?sch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15ch16ch17ch18ch19ch20ch21ch22ch23ch24 ,Tfck  ,rgmii"  disabledcan@e6c30000+renesas,can-r8a774a1renesas,rcar-gen3-can \  .%Tclkp1clkp2can_clk  .bZ   disabledcan@e6c38000+renesas,can-r8a774a1renesas,rcar-gen3-canÀ \  .%Tclkp1clkp2can_clk  .bZ   disabledcan@e66c0000/renesas,r8a774a1-canfdrenesas,rcar-gen3-canfdl\ ch_intg_int  .%Tfckcanfdcan_clk  .Ĵ   disabledchannel0 disabledchannel1 disabledpwm@e6e30000&renesas,pwm-r8a774a1renesas,pwm-rcar      disabledpwm@e6e31000&renesas,pwm-r8a774a1renesas,pwm-rcar      disabledpwm@e6e32000&renesas,pwm-r8a774a1renesas,pwm-rcar       disabledpwm@e6e33000&renesas,pwm-r8a774a1renesas,pwm-rcar0      disabledpwm@e6e34000&renesas,pwm-r8a774a1renesas,pwm-rcar@      disabledpwm@e6e35000&renesas,pwm-r8a774a1renesas,pwm-rcarP      disabledpwm@e6e36000&renesas,pwm-r8a774a1renesas,pwm-rcar`      disabledserial@e6e60000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  Tfckbrg_intscif_clk QPQP txrxtxrx   disabledserial@e6e68000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  Tfckbrg_intscif_clk SRSR txrxtxrx   disabledserial@e6e88000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \ 6 Tfckbrg_intscif_clk  txrxtxrx  6okay &defaultQserial@e6c50000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  Tfckbrg_intscif_clkWVtxrx   disabledserial@e6c40000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  Tfckbrg_intscif_clkYXtxrx   disabledserial@e6f30000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@ \  Tfckbrg_intscif_clk [Z[Z txrxtxrx   disabledspi@e6e90000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd \  A@A@ txrxtxrx    disabledspi@e6ea0000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd \  CBCB txrxtxrx    disabledspi@e6c00000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd \ EDtxrx    disabledspi@e6c10000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd \ GFtxrx    disabledvideo@e6ef0000renesas,vin-r8a774a1 \ +  + disabledports port@1 endpoint@0'Z]endpoint@2(Zevideo@e6ef1000renesas,vin-r8a774a1 \ *  * disabledports port@1 endpoint@0)Z^endpoint@2*Zfvideo@e6ef2000renesas,vin-r8a774a1  \ )  ) disabledports port@1 endpoint@0+Z_endpoint@2,Zgvideo@e6ef3000renesas,vin-r8a774a10 \ (  ( disabledports port@1 endpoint@0-Z`endpoint@2.Zhvideo@e6ef4000renesas,vin-r8a774a1@ \ '  ' disabledports port@1 endpoint@0/Zaendpoint@20Zivideo@e6ef5000renesas,vin-r8a774a1P \ &  & disabledports port@1 endpoint@01Zbendpoint@22Zjvideo@e6ef6000renesas,vin-r8a774a1` \ %  % disabledports port@1 endpoint@03Zcendpoint@24Zkvideo@e6ef7000renesas,vin-r8a774a1p \ $  $ disabledports port@1 endpoint@05Zdendpoint@26Zlsound@ec5000004renesas,rcar_sound-r8a774a1renesas,rcar_sound-gen3PPZTTvscuadgssiussiaudmapp\                           78 Tssi-allssi.9ssi.8ssi.7ssi.6ssi.5ssi.4ssi.3ssi.2ssi.1ssi.0src.9src.8src.7src.6src.5src.4src.3src.2src.1src.0mix.1mix.0ctu.1ctu.0dvc.0dvc.1clk_aclk_bclk_cclk_i X           D_ssi-allssi.9ssi.8ssi.7ssi.6ssi.5ssi.4ssi.3ssi.2ssi.1ssi.0okay 9:default=JDrcar_sound,ctuctu-0ctu-1ctu-2ctu-3ctu-4ctu-5ctu-6ctu-7rcar_sound,dvcdvc-0;txdvc-1;txrcar_sound,mixmix-0mix-1rcar_sound,srcsrc-0 \`<;rxtxsrc-1 \a<;rxtxsrc-2 \b<;rxtxsrc-3 \c<;rxtxsrc-4 \d<;rxtxsrc-5 \e<;rxtxsrc-6 \f<;rxtxsrc-7 \g<;rxtxsrc-8 \h<;rxtxsrc-9 \i<;rxtxrcar_sound,ssissi-0 \r<;rxtxssi-1 \s<;rxtxssi-2 \t<;rxtxZ?ssi-3 \u<;rxtxssi-4 \v< ; rxtxssi-5 \w< ; rxtxssi-6 \x< ;rxtxssi-7 \y<;rxtxssi-8 \z<;rxtxssi-9 \{<;rxtxrcar_sound,ssiussiu-0<;rxtxssiu-1<5;6rxtxssiu-2<7;8rxtxssiu-3<G;Hrxtxssiu-4<?;@rxtxssiu-5<C;Drxtxssiu-6<O;Prxtxssiu-7<S;Trxtxssiu-8<I;Jrxtxssiu-9<K;Lrxtxssiu-10<W;Xrxtxssiu-11<Y;Zrxtxssiu-12<_;`rxtxssiu-13<;rxtxssiu-14<;rxtxssiu-15<;rxtxssiu-16<c;drxtxssiu-17<g;hrxtxssiu-18<k;lrxtxssiu-19<m;nrxtxssiu-20<;rxtxssiu-21<;rxtxssiu-22<;rxtxssiu-23<;rxtxssiu-24<o;prxtxssiu-25<!;"rxtxssiu-26<#;$rxtxssiu-27<%;&rxtxssiu-28<';(rxtxssiu-29<);*rxtxssiu-30<+;,rxtxssiu-31<-;.rxtxssiu-32<q;rrxtxssiu-33<;rxtxssiu-34<;rxtxssiu-35<;rxtxssiu-36<;rxtxssiu-37<; rxtxssiu-38<1;2rxtxssiu-39<3;4rxtxssiu-40<s;trxtxssiu-41<u;vrxtxssiu-42<y;zrxtxssiu-43<{;|rxtxssiu-44<};~rxtxssiu-45<;rxtxssiu-46<;rxtxssiu-47<;rxtxssiu-48<;rxtxssiu-49<;rxtxssiu-50<;rxtxssiu-51<;rxtxportZ|endpoint=i2s#>3>@?Z>dma-controller@ec700000(renesas,dmac-r8a774a1renesas,rcar-dmacp\^@ABCDEFGHIJKLMNOLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 Tfck  kv@@@@@@@@@@ @ @ @ @ @@Z<dma-controller@ec720000(renesas,dmac-r8a774a1renesas,rcar-dmacr\_PQRSTUVWXYZ[\]~Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 Tfck  kv@@@@@@@@@@@@@@@@Z;usb@ee000000-renesas,xhci-r8a774a1renesas,rcar-gen3-xhci  \f H  Hokay AdefaultZCusb@ee0200007renesas,r8a774a1-usb3-perirenesas,rcar-gen3-usb3-peri \h H  HokayHBMusbICusb@ee080000 generic-ohci \l  HMusb   okayZEusb@ee0a0000 generic-ohci  \p HDMusb  okayZFusb@ee080100 generic-ehci \l  HMusbIE   okayusb@ee0a0100 generic-ehci  \p HDMusbIF  okayusb-phy@ee0802005renesas,usb2-phy-r8a774a1renesas,rcar-gen3-usb2-phy \l     okay GdefaultSHZusb-phy@ee0a02005renesas,usb2-phy-r8a774a1renesas,rcar-gen3-usb2-phy    okay IdefaultZDmmc@ee100000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi  \ :  Tcoreclkh_   :# okay JmKdefaultstate_uhswLM  mmc@ee120000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi  \ 9  Tcoreclkh_   9#! disabledmmc@ee140000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi  \ 8 ! Tcoreclkh_   8#"okay NdefaultwO wlcore@2 ti,wl1837 Pmmc@ee160000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi  \ 7 # Tcoreclkh_   7##okay QmQdefaultstate_uhswLR &spi@ee2000001renesas,r8a774a1-rpc-ifrenesas,rcar-gen3-rpc-if0  regsdirmapwbuf \&     disabledinterrupt-controller@f1010000 arm,gic-400 @ \ ? Tclk  Zpcie@fe000000-renesas,pcie-r8a774a1renesas,pcie-rcar-gen3 =pcipz 00B88GB$\tuvR et ?STpciepcie_bus  ?sT} disabledpcie@ee800000-renesas,pcie-r8a774a1renesas,pcie-rcar-gen3 =pcipz BGB$\R e >STpciepcie_bus  >sT} disabledpcie-ep@fe0000003renesas,r8a774a1-pcie-eprenesas,rcar-gen3-pcie-epP 08)apb-basememory0memory1memory2memory3$\tuv ?Tpcie ?  disabledpcie-ep@ee8000003renesas,r8a774a1-pcie-eprenesas,rcar-gen3-pcie-epP )apb-basememory0memory1memory2memory3$\ >Tpcie >  disabledfdp1@fe940000 renesas,fdp1$ \ w wUfcp@fe950000 renesas,fcpf g gVZUfcp@fe96f000 renesas,fcpv _ _WZXfcp@fea27000 renesas,fcpvp [  [WZYfcp@fea2f000 renesas,fcpv Z  ZW ZZfcp@fea37000 renesas,fcpvp Y  YW Z[fcp@fe9af000 renesas,fcpv c cVZ\vsp@fe960000 renesas,vsp2 \  r rXvsp@fea20000 renesas,vsp2P \ o  oYZqvsp@fea28000 renesas,vsp2P \ n  nZZrvsp@fea30000 renesas,vsp2P \ m  m[Zsvsp@fe9a0000 renesas,vsp2 \ w w\csi2@fea80000renesas,r8a774a1-csi2 \    disabledports port@0port@1 endpoint@0]Z'endpoint@1^Z)endpoint@2_Z+endpoint@3`Z-endpoint@4aZ/endpoint@5bZ1endpoint@6cZ3endpoint@7dZ5csi2@feaa0000renesas,r8a774a1-csi2 \    disabledports port@0port@1 endpoint@0eZ(endpoint@1fZ*endpoint@2gZ,endpoint@3hZ.endpoint@4iZ0endpoint@5jZ2endpoint@6kZ4endpoint@7lZ6hdmi@fead0000-renesas,r8a774a1-hdmirenesas,rcar-gen3-hdmi \  ( Tiahbisfr  okayports port@0endpointmZtport@1endpointnZyport@2endpoint>Z=display@feb00000renesas,du-r8a774a1$\  8   opo*Tdu.0du.1du.2dclkin.0dclkin.1dclkin.2   _du.0du.2okayqrsports port@0port@1endpointtZmport@2endpointuZvlvds@feb90000renesas,r8a774a1-lvds    disabledports port@0endpointvZuport@1chipid@fff00044 renesas,prrDQthermal-zonessensor1-thermalw"tripssensor1-crit criticalsensor2-thermalw"tripssensor2-crit criticalsensor3-thermalw"cooling-mapsmap0x map1x tripstrip-point1passiveZxsensor3-crit criticaltimerarm,armv8-timer0\ ?? ? ?sec-physphysvirthyp-physusb3s0 fixed-clock=JZ!usb_extal fixed-clock=JZ aliases#/soc/i2c@e6500000(/soc/i2c@e6508000-/soc/i2c@e65100002/soc/i2c@e66d00007/soc/i2c@e66d8000