ko8fd( f,renesas,v3mskrenesas,r8a77970 &7Renesas V3M Starter Kit boardcan fixed-clock=JZcpus cpu@0bcpuarm,cortex-a53n rypsciZcpu@1bcpuarm,cortex-a53n rypsciZcache-controllercacheyZextal fixed-clock=JP*Zextalr fixed-clock=JZ pmu_a53arm,cortex-a53-pmuTUpsciarm,psci-1.0arm,psci-0.2smcscif fixed-clock=JZsoc simple-bus watchdog@e6020000+renesas,r8a77970-wdtrenesas,rcar-gen3-wdtn   ry okay<watchdog@e6030000+renesas,r8a77970-wdtrenesas,rcar-gen3-wdtn   ry  reservedgpio@e6050000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionP  &2C ry gpio@e6051000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionP  & 2C ry Z gpio@e6052000-renesas,gpio-r8a77970renesas,rcar-gen3-gpion P  &@2C ry gpio@e6053000-renesas,gpio-r8a77970renesas,rcar-gen3-gpion0P  &`2C ry gpio@e6054000-renesas,gpio-r8a77970renesas,rcar-gen3-gpion@P  &2C ry gpio@e6055000-renesas,gpio-r8a77970renesas,rcar-gen3-gpionPP  &2C ry pinctrl@e6060000renesas,pfc-r8a77970nZavb0$Xavb0_mdioavb0_rgmiiavb0_txcrefclk_avb0Zi2c0Xi2c0_i2c0Z mmc_3_3vXmmc_data8mmc_ctrl_mmch Zqspi0Xqspi0_ctrlqspi0_data4_qspi0Z scif0 Xscif0_data_scif0Ztimer@e60f0000-renesas,r8a77970-cmt0renesas,rcar-gen3-cmt0n r/ufcky / disabledtimer@e6130000-renesas,r8a77970-cmt1renesas,rcar-gen3-cmt1n`xyz{|}~ r.ufcky . disabledtimer@e6140000-renesas,r8a77970-cmt1renesas,rcar-gen3-cmt1n`  r-ufcky - disabledtimer@e6148000-renesas,r8a77970-cmt1renesas,rcar-gen3-cmt1n` r,ufcky , disabledclock-controller@e6150000renesas,r8a77970-cpg-mssrnr  uextalextalr=Zreset-controller@e6160000renesas,r8a77970-rstnsystem-controller@e6180000renesas,r8a77970-syscn@Zthermal@e6190000renesas,thermal-r8a77970 n $CDE r y  Z,interrupt-controller@e61c0000&renesas,intc-ex-r8a77970renesas,irqc2CnH ry timer@e61e0000!renesas,tmu-r8a77970renesas,tmun0$tuni0tuni1tuni2 r}ufcky } disabledtimer@e6fc0000!renesas,tmu-r8a77970renesas,tmun00tuni0tuni1tuni2ticpi2 r|ufcky | disabledtimer@e6fd0000!renesas,tmu-r8a77970renesas,tmun00/012tuni0tuni1tuni2ticpi2 r{ufcky { disabledtimer@e6fe0000!renesas,tmu-r8a77970renesas,tmun0$tuni0tuni1tuni2 rzufcky z disabledtimer@ffc00000!renesas,tmu-r8a77970renesas,tmun0$tuvtuni0tuni1tuni2 ryufcky y disabledi2c@e6500000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnP@  ry    txrxtxrx okay defaultJhdmi@39 adi,adv7511wn9  )5AN]mrgb1xports port@0nendpointZ/port@1nendpointZ-i2c@e6508000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnP@   ry    txrxtxrx  disabledi2c@e6510000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnQ@  ry    txrxtxrx  disabledi2c@e66d0000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnm@ " ry    txrxtxrx  disabledi2c@e66d8000+renesas,i2c-r8a77970renesas,rcar-gen3-i2cnm@  ry    txrxtxrx  disabledserial@e6540000=renesas,hscif-r8a77970renesas,rcar-gen3-hscifrenesas,hscifnT` r ufckbrg_intscif_clk  1 0 1 0 txrxtxrxy  disabledserial@e6550000=renesas,hscif-r8a77970renesas,rcar-gen3-hscifrenesas,hscifnU` r ufckbrg_intscif_clk  3 2 3 2 txrxtxrxy  disabledserial@e6560000=renesas,hscif-r8a77970renesas,rcar-gen3-hscifrenesas,hscifnV` r ufckbrg_intscif_clk  5 4 5 4 txrxtxrxy  disabledserial@e66a0000=renesas,hscif-r8a77970renesas,rcar-gen3-hscifrenesas,hscifnj` r ufckbrg_intscif_clk  7 6 7 6 txrxtxrxy  disabledcan@e66c0000/renesas,r8a77970-canfdrenesas,rcar-gen3-canfdnl ch_intg_intrufckcanfdcan_clk Ĵy  disabledchannel0 disabledchannel1 disabledethernet@e68000005renesas,etheravb-r8a77970renesas,etheravb-rcar-gen3n,'()*+,-./0123456789:;<=>?sch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15ch16ch17ch18ch19ch20ch21ch22ch23ch24 r,ufcky ,rgmii okaydefaultethernet-phy@04ethernet-phy-id0022.1622ethernet-phy-ieee802.3-c22"n   . Zpwm@e6e30000&renesas,pwm-r8a77970renesas,pwm-rcarn: r y   disabledpwm@e6e31000&renesas,pwm-r8a77970renesas,pwm-rcarn: r y   disabledpwm@e6e32000&renesas,pwm-r8a77970renesas,pwm-rcarn : r y   disabledpwm@e6e33000&renesas,pwm-r8a77970renesas,pwm-rcarn0: r y   disabledpwm@e6e34000&renesas,pwm-r8a77970renesas,pwm-rcarn@: r y   disabledserial@e6e60000:renesas,scif-r8a77970renesas,rcar-gen3-scifrenesas,scifn@ r ufckbrg_intscif_clk  Q P Q P txrxtxrxy okaydefaultserial@e6e68000:renesas,scif-r8a77970renesas,rcar-gen3-scifrenesas,scifn@ r ufckbrg_intscif_clk  S R S R txrxtxrxy  disabledserial@e6c50000:renesas,scif-r8a77970renesas,rcar-gen3-scifrenesas,scifn@ r ufckbrg_intscif_clk  W V W V txrxtxrxy  disabledserial@e6c40000:renesas,scif-r8a77970renesas,rcar-gen3-scifrenesas,scifn@ r ufckbrg_intscif_clk  Y X Y X txrxtxrxy  disabledpwm@e6e80000!renesas,tpu-r8a77970renesas,tpunH  r0y 0: disabledspi@e6e90000/renesas,msiof-r8a77970renesas,rcar-gen3-msiofnd  ry   A @ A @ txrxtxrx  disabledspi@e6ea0000/renesas,msiof-r8a77970renesas,rcar-gen3-msiofnd  ry   C B C B txrxtxrx  disabledspi@e6c00000/renesas,msiof-r8a77970renesas,rcar-gen3-msiofnd  ry   E D E D txrxtxrx  disabledspi@e6c10000/renesas,msiof-r8a77970renesas,rcar-gen3-msiofnd  ry   G F G F txrxtxrx  disabledvideo@e6ef0000renesas,vin-r8a77970n  r+y +E disabledports port@1 nendpoint@2nZ#video@e6ef1000renesas,vin-r8a77970n  r*y *E disabledports port@1 nendpoint@2nZ$video@e6ef2000renesas,vin-r8a77970n   r)y )E disabledports port@1 nendpoint@2nZ%video@e6ef3000renesas,vin-r8a77970n0  r(y (E disabledports port@1 nendpoint@2nZ&dma-controller@e7300000(renesas,dmac-r8a77970renesas,rcar-dmacn0l4567&errorch0ch1ch2ch3ch4ch5ch6ch7 rufcky P[@Z dma-controller@e7310000(renesas,dmac-r8a77970renesas,rcar-dmacn1l389:;<=>?&errorch0ch1ch2ch3ch4ch5ch6ch7 rufcky P[@Z iommu@e7740000renesas,ipmmu-r8a77970nthy {Ziommu@ff8b0000renesas,ipmmu-r8a77970nhy{iommu@e67b0000renesas,ipmmu-r8a77970n{y {Ziommu@ffc80000renesas,ipmmu-r8a77970nhy {Ziommu@febd0000renesas,ipmmu-r8a77970nh y {Z"mmc@ee140000-renesas,sdhi-r8a77970renesas,rcar-gen3-sdhin   r:y :  okaydefaultspi@ee2000001renesas,r8a77970-rpc-ifrenesas,rcar-gen3-rpc-if0n  regsdirmapwbuf & ry  okay defaultflash@0!spansion,s25fs512sjedec,spi-nornpartitionsfixed-partitions bootparam@0ncr7@40000ncert-header-sa3@c0000n bl2@140000ncert-header-sa6@180000nbl31@1c0000nFuboot@640000nd uboot-env@700000npdtb@740000ntkernel@7c0000n|@user@1bc0000nDinterrupt-controller@f1010000 arm,gic-4002 C@n   ruclky Zvsp@fea20000 renesas,vsp2nP  roy o!Z(fcp@fea27000 renesas,fcpvnp r[y ["Z!csi2@feaa0000renesas,r8a77970-csi2n  ry  disabledports port@0nport@1 nendpoint@0n#Zendpoint@1n$Zendpoint@2n%Zendpoint@3n&Zdisplay@feb00000renesas,du-r8a77970n r'udu.0dclkin.0y  du.0(okayports port@0nport@1nendpoint)Z*lvds-encoder@feb90000renesas,r8a77970-lvdsn ry okayports port@0nendpoint*Z)port@1nendpoint+Z.watchdog@ffc90000-renesas,r8a77970-wwdtrenesas,rcar-gen3-wwdtnqYpretimeouterrorrucntbusy E cnt disabledwatchdog@ffca0000-renesas,r8a77970-wwdtrenesas,rcar-gen3-wwdtnZpretimeouterrorrucntbusy D cnt disabledchipid@fff00044 renesas,prrnDthermal-zonescpu-thermal#9G,cooling-mapstripscpu-critWc icriticaltimerarm,armv8-timer0   sec-physphysvirthyp-physaliasesn/soc/i2c@e6500000s/soc/i2c@e6508000x/soc/i2c@e6510000}/soc/i2c@e66d0000/soc/i2c@e66d8000/soc/serial@e6e60000chosenserial0:115200n8hdmi-outhdmi-connectoriaportendpoint-Zlvds-decoderthine,thc63lvd1024ports port@0nendpoint.Z+port@2nendpoint/Zmemory@48000000bmemorynHxosc5-clock fixed-clock=J Z'regulator-0regulator-fixed VCC_D1.8Vw@w@Zregulator-1regulator-fixed VCC_D3.3V2Z2ZZregulator-2regulator-fixedVCC_VDDQ_VIN02Z2ZZ compatible#address-cells#size-cellsinterrupt-parentmodel#clock-cellsclock-frequencyphandledevice_typeregclockspower-domainsnext-level-cacheenable-methodcache-unifiedcache-levelbootph-allinterruptsinterrupt-affinityrangesresetsstatustimeout-sec#gpio-cellsgpio-controllergpio-ranges#interrupt-cellsinterrupt-controllergroupsfunctionpower-sourceclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-namesdmasdma-namesi2c-scl-internal-delay-nspinctrl-0pinctrl-namesinterrupts-extendedavdd-supplydvdd-supplypvdd-supplybgvdd-supplydvdd-3v-supplyadi,input-depthadi,input-colorspaceadi,input-clockremote-endpointassigned-clocksassigned-clock-ratesphy-moderx-internal-delay-pstx-internal-delay-psiommusrenesas,no-ether-linkphy-handlerxc-skew-psreset-gpios#pwm-cellsrenesas,id#dma-cellsdma-channelsrenesas,ipmmu-main#iommu-cellsmax-frequencyvmmc-supplyvqmmc-supplybus-widthnon-removablereg-namesspi-max-frequencyspi-rx-bus-widthread-onlyrenesas,fcpreset-namesrenesas,vspspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisi2c0i2c1i2c2i2c3i2c4serial0stdout-pathvcc-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-on