}8x(;xX/renesas,s4skrenesas,r8a779f4renesas,r8a779f0 &7R-Car S4 Starter Kit boardopp-table-0operating-points-v2=Hopp-500000000PeW me opp-800000000P/W me opp-1000000000P;W me opp-1200000000PGW me vopp-table-1operating-points-v2=Hopp-500000000PeW me opp-800000000P/W me opp-1000000000P;W me opp-1200000000PGW me vcpus cpu-mapcluster0core0core1cluster1core0core1cluster2core0core1cluster3core0core1 cpu@0arm,cortex-a55cpu  psci  Hcpu@100arm,cortex-a55cpu  psci  Hcpu@10000arm,cortex-a55cpu psci  Hcpu@10100arm,cortex-a55cpu psci  Hcpu@20000arm,cortex-a55cpu psci  Hcpu@20100arm,cortex-a55cpu psci  Hcpu@30000arm,cortex-a55cpu psci  Hcpu@30100arm,cortex-a55cpu psci  H cache-controller-0cache H cache-controller-1cache Hcache-controller-2cache Hcache-controller-3cache Hidle-statespscicpu-sleep-0arm,idle-state,=N^H extal fixed-clocko|1-Hextalr fixed-clocko|Hpcie0-clkref fixed-clocko|Hpcie1-clkref fixed-clocko|H pmu_a55arm,cortex-a55-pmu psciarm,psci-1.0arm,psci-0.2smcscif fixed-clocko|n6Hsoc simple-bus watchdog@e6020000+renesas,r8a779f0-wdtrenesas,rcar-gen4-wdt    @ okay<watchdog@e6030000+renesas,r8a779f0-wdtrenesas,rcar-gen4-wdt   . @ h disabledpinctrl@e6050000renesas,pfc-r8a779f0@lllldefaultHhscif0hscif0_datahscif0_ctrlhscif0Hhscif1hscif1_datahscif1_ctrlhscif1Hi2c2i2c2i2c2Hi2c4i2c4i2c4Hi2c5i2c5i2c5Hscif_clk scif_clk scif_clkHsdmmc_data4mmc_ctrlmmc H*tsn0tsn0_mdio_btsn0_link_btsn0 H#tsn1tsn1_mdio_btsn1_link_btsn1 H$gpio@e6050180-renesas,gpio-r8a779f0renesas,rcar-gen4-gpioT 6  @ #/Dgpio@e6050980-renesas,gpio-r8a779f0renesas,rcar-gen4-gpio T 7  @ # /DH,gpio@e6051180-renesas,gpio-r8a779f0renesas,rcar-gen4-gpioT 8  @ #@/Dgpio@e6051980-renesas,gpio-r8a779f0renesas,rcar-gen4-gpioT 9  @ #`/DH'fuse@e6078800renesas,r8a779f0-efuse  @ nvmem-layout fixed-layout calib@144DH"timer@e60f0000-renesas,r8a779f0-cmt0renesas,rcar-gen4-cmt0 Ufck @  disabledtimer@e6130000-renesas,r8a779f0-cmt1renesas,rcar-gen4-cmt1` Ufck @  disabledtimer@e6140000-renesas,r8a779f0-cmt1renesas,rcar-gen4-cmt1` Ufck @  disabledtimer@e6148000-renesas,r8a779f0-cmt1renesas,rcar-gen4-cmt1` Ufck @  disabledclock-controller@e6150000renesas,r8a779f0-cpg-mssr@ UextalextalroauH reset-controller@e6160000renesas,r8a779f0-rst@system-controller@e6180000renesas,r8a779f0-sysc@aH thermal@e6198000renesas,r8a779f0-thermal0  @ H.interrupt-controller@e61c0000&renesas,intc-ex-r8a779f0renesas,irqcD/H  @timer@e61e0000!renesas,tmu-r8a779f0renesas,tmu0$tuni0tuni1tuni2 Ufck @  disabledtimer@e6fc0000!renesas,tmu-r8a779f0renesas,tmu00tuni0tuni1tuni2ticpi2 Ufck @  disabledtimer@e6fd0000!renesas,tmu-r8a779f0renesas,tmu00tuni0tuni1tuni2ticpi2 Ufck @  disabledtimer@e6fe0000!renesas,tmu-r8a779f0renesas,tmu00tuni0tuni1tuni2ticpi2 Ufck @  disabledtimer@ffc00000!renesas,tmu-r8a779f0renesas,tmu00tuni0tuni1tuni2ticpi2 Ufck @  disabledphy@e6444000renesas,r8a779f0-ether-serdesD@(  @ okayH%i2c@e6500000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cP@   @   txrxtxrxn  disabledi2c@e6508000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cP@   @   txrxtxrxn  disabledi2c@e6510000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cQ@   @   txrxtxrxn okaydefault|i2c@e66d0000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cm@    @    txrxtxrxn  disabledi2c@e66d8000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cm@    @    txrxtxrxn okaydefault|i2c@e66e0000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cn@    @    txrxtxrxn okaydefault|eeprom@50st,24c16atmel,24c16Pserial@e6540000=renesas,hscif-r8a779f0renesas,rcar-gen4-hscifrenesas,hscifT`   )Ufckbrg_intscif_clk 1010 txrxtxrx @ okaydefaultserial@e6550000=renesas,hscif-r8a779f0renesas,rcar-gen4-hscifrenesas,hscifU`   )Ufckbrg_intscif_clk 3232 txrxtxrx @ okaydefaultserial@e6560000=renesas,hscif-r8a779f0renesas,rcar-gen4-hscifrenesas,hscifV`   )Ufckbrg_intscif_clk 5454 txrxtxrx @  disabledserial@e66a0000=renesas,hscif-r8a779f0renesas,rcar-gen4-hscifrenesas,hscifj`   )Ufckbrg_intscif_clk 7676 txrxtxrx @  disabledpcie@e65d0000-renesas,r8a779f0-pcierenesas,rcar-gen4-pciep]] ]0 ]P]b]p@ dbidbi2atudmaappphyconfig0msidmasft_ceapp p Ucoreref @ ppwr  $pci8@00.BD9LZ disabledpcie@e65d8000-renesas,r8a779f0-pcierenesas,rcar-gen4-pciep]]] ]]]@ dbidbi2atudmaappphyconfig0msidmasft_ceapp q  Ucoreref @ qpwr  $pci8@.BD9LZ disabledpcie-ep@e65d00003renesas,r8a779f0-pcie-eprenesas,rcar-gen4-pcie-epp] ] ]0 ]P]b]p@$dbidbi2atudmaappphyaddr_space$dmasft_ceapp p Ucoreref @ ppwr p disabledpcie-ep@e65d80003renesas,r8a779f0-pcie-eprenesas,rcar-gen4-pcie-epp] ]] ]]]@$dbidbi2atudmaappphyaddr_space$dmasft_ceapp q  Ucoreref @ qpwr p disabledufs@e6860000renesas,r8a779f0-ufs  ! Ufckref_clk~ II @ okay" calibrationethernet@e6880000renesas,r8a779f0-ether-switch basesecure_base4      !"#$%&'()*+,-.0122mfwd_errorrace_errorcoma_errorgwca0_errorgwca1_erroretha0_erroretha1_erroretha2_errorgptp0_statusgptp1_statusmfwd_statusrace_statuscoma_statusgwca0_statusgwca1_statusetha0_statusetha1_statusetha2_statusrmac0_statusrmac1_statusrmac2_statusgwca0_rxtx0gwca0_rxtx1gwca0_rxtx2gwca0_rxtx3gwca0_rxtx4gwca0_rxtx5gwca0_rxtx6gwca0_rxtx7gwca1_rxtx0gwca1_rxtx1gwca1_rxtx2gwca1_rxtx3gwca1_rxtx4gwca1_rxtx5gwca1_rxtx6gwca1_rxtx7gwca0_rxts0gwca0_rxts1gwca1_rxts0gwca1_rxts1rmac0_mdiormac1_mdiormac2_mdiormac0_phyrmac1_phyrmac2_phy  @ okay#$defaultethernet-ports port@0%okay&sgmiimdio ethernet-phy@1ethernet-phy-ieee802.3-c45 ' H&port@1%okay(sgmiimdio ethernet-phy@2ethernet-phy-ieee802.3-c45 ' H(port@2% disabledserial@e6e60000:renesas,scif-r8a779f0renesas,rcar-gen4-scifrenesas,scif@   )Ufckbrg_intscif_clk QPQP txrxtxrx @  disabledserial@e6e68000:renesas,scif-r8a779f0renesas,rcar-gen4-scifrenesas,scif@   )Ufckbrg_intscif_clk SRSR txrxtxrx @  disabledserial@e6c50000:renesas,scif-r8a779f0renesas,rcar-gen4-scifrenesas,scif@   )Ufckbrg_intscif_clk WVWV txrxtxrx @  disabledserial@e6c40000:renesas,scif-r8a779f0renesas,rcar-gen4-scifrenesas,scif@   )Ufckbrg_intscif_clk YXYX txrxtxrx @  disabledspi@e6e90000/renesas,msiof-r8a779f0renesas,rcar-gen4-msiofd  j A@A@ txrxtxrx @ j  disabledspi@e6ea0000/renesas,msiof-r8a779f0renesas,rcar-gen4-msiofd  k CBCB txrxtxrx @ k  disabledspi@e6c00000/renesas,msiof-r8a779f0renesas,rcar-gen4-msiofd  l EDED txrxtxrx @ l  disabledspi@e6c10000/renesas,msiof-r8a779f0renesas,rcar-gen4-msiofd  m GFGF txrxtxrx @ m  disableddma-controller@e7350000-renesas,dmac-r8a779f0renesas,rcar-gen4-dmac 50efghijklmnopqrstuLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 Ufck @ )))))))))) ) ) ) ) ))Hdma-controller@e7351000-renesas,dmac-r8a779f0renesas,rcar-gen4-dmac 51wxyz{|}~Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 Ufck @ ))))))))))))))))Hmmc@ee140000-renesas,sdhi-r8a779f0renesas,rcar-gen4-sdhi    # Ucoreclkh @  ) okay*default+ ,iommu@ee4800004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsaH"- @5iommu@ee4c00004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsaL"- @5iommu@eed000004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsa"- @5H)iommu@eed400004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsa"- @5iommu@eefc00004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsa @5H-interrupt-controller@f1000000 arm,gic-v3D /   Hwatchdog@ffc90000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  &cntbus disabledwatchdog@ffca0000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  'cntbus disabledwatchdog@ffcb0000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  (cntbus disabledwatchdog@ffcc0000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  )cntbus disabledwatchdog@ffcf0000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  *cntbus disabledwatchdog@ffef0000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  +cntbus disabledwatchdog@fff10000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  ,cntbus disabledwatchdog@fff20000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  -cntbus disabledwatchdog@fff30000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  .cntbus disabledwatchdog@fff40000-renesas,r8a779f0-wwdtrenesas,rcar-gen4-wwdtpretimeouterror 2 (Ucntbus @  /cntbus disabledchipid@fff00044 renesas,prrDthermal-zonessensor1-thermalBXf.tripssensor1-critv criticalsensor2-thermalBXf.tripssensor2-critv criticalsensor3-thermalBXf.tripssensor3-critv criticaltimerarm,armv8-timer<    %sec-physphysvirthyp-physhyp-virtufs30-clk fixed-clocko|IH!aliases/soc/i2c@e6500000/soc/i2c@e6508000/soc/i2c@e6510000/soc/i2c@e66d0000/soc/i2c@e66d8000/soc/i2c@e66e0000/soc/serial@e6540000/soc/serial@e6550000-/soc/ethernet@e6880000/ethernet-ports/port@0-/soc/ethernet@e6880000/ethernet-ports/port@1chosen'ignore_loglevel rw root=/dev/nfs ip=onserial0:921600n8memory@48000000memoryHXmemory@480000000memoryregulator-vcc-sdhiregulator-fixed SDHI Vcc2Z 2Z #,(H+ compatible#address-cells#size-cellsinterrupt-parentmodelopp-sharedphandleopp-hzopp-microvoltclock-latency-nsopp-suspendcpuregdevice_typepower-domainsnext-level-cacheenable-methodcpu-idle-statesclocksoperating-points-v2cache-unifiedcache-levelentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-us#clock-cellsclock-frequencybootph-allinterruptsrangesresetsstatustimeout-secpinctrl-0pinctrl-namesgroupsfunctionpower-sourcedrive-strengthgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellsclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-names#phy-cellsdmasdma-namesi2c-scl-internal-delay-nspagesizeuart-has-rtsctsreg-namesreset-namesmax-link-speednum-lanesbus-rangedma-rangesinterrupt-map-maskinterrupt-mapsnps,enable-cdm-checkmax-functionsfreq-table-hznvmem-cellsnvmem-cell-namesphysphy-handlephy-modeinterrupts-extended#dma-cellsdma-channelsiommusmax-frequencyvmmc-supplycd-gpiosbus-widthrenesas,ipmmu-main#iommu-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisi2c0i2c1i2c2i2c3i2c4i2c5serial0serial1ethernet0ethernet1bootargsstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-high