z`8sd(s,,rockchip,rk3368-evb-act8846rockchip,rk3368 +&7Rockchip RK3368 EVB with ACT8846 pmicaliases=/pinctrl/gpio@ff750000C/pinctrl/gpio@ff780000I/pinctrl/gpio@ff790000O/pinctrl/gpio@ff7a0000U/i2c@ff650000Z/i2c@ff660000_/i2c@ff140000d/i2c@ff150000i/i2c@ff160000n/i2c@ff170000s/serial@ff180000{/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/ethernet@ff290000/mmc@ff0f0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53pscidisplay-subsystemrockchip,display-subsystem  disabledarm-pmuarm,cortex-a53-pmu`pqrstuvw   psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clockn6-xin24m@@mmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @Mр [  D r vbbiuciuciu-driveciu-samplen y reset disabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @Mр [  E s wbbiuciuciu-driveciu-samplen !y reset disabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@Mр [  G u ybbiuciuciu-driveciu-samplen #y resetokay default  saradc@ff100000rockchip,saradc $[ I [bsaradcapb_pclky W saradc-apb disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi[ A Rbspiclkapb_pclk ,default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi[ B Sbspiclkapb_pclk -default+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi[ C Tbspiclkapb_pclk )default+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+bi2c[ Ndefault disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+bi2c[ Odefault disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+bi2c[ Pdefault disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+bi2c[ Qdefault disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartn6[ M Ubbaudclkapb_pclk 7 disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartn6[ N Vbbaudclkapb_pclk 8 disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartn6[ P Xbbaudclkapb_pclk : disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartn6[ Q Ybbaudclkapb_pclk ; disableddma-controller@ff250000arm,pl330arm,primecell%@ ([  bapb_pclkthermal-zonescpu-thermal?dUc tripscpu_alert0s$passive!cpu_alert1s8passive"cpu_critss criticalcooling-mapsmap0!0map1"0 gpu-thermal?dUc tripsgpu_alert0s8passive#gpu_crits8 criticalcooling-mapsmap0#0tsadc@ff280000rockchip,rk3368-tsadc( %[ H Zbtsadcapb_pclky  tsadc-apbinitdefaultsleep$%$sokay ethernet@ff290000rockchip,rk3368-gmac) macirq!&8[  f g c ]Mbstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macy B stmmacethokay.'9rmiiBoutput O( _ u'B@default)0mdiosnps,dwmac-mdio+usb@ff500000 generic-ehciP [ okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X [ botghost@@ okaydma-controller@ff600000arm,pl330arm,primecell`@ ([  bapb_pclkAi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce[ Lbi2c <default*+okaysyr827@40silergy,syr827@vdd_cpu Pp0DV+syr828@41silergy,syr828Avdd_gpu Pp0V+act8846@5aactive-semi,act8846Zokaya+l+w++,+-regulatorsREG1VCC_DDROO0REG2VCC_IO2Z2Z0,REG3VDD_LOG ``0REG4VCC_200-REG5 VCCIO_SDw@2Z0REG6 VDD10_LCDB@B@0REG7 VCCA_CODEC2Z2Z0REG8VCCA_TP2Z2Z0REG9 VCCIO_PMU2Z2Z0REG10VDD_10B@B@0REG11VCC_18w@w@0REG12 VCC18_LCDw@w@0i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+bi2c[ Mdefault. disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault/[ _okayTpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault0[ _ disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh [ _ disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default1[ _ disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti[ O Wbbaudclkapb_pclk 9default2okaymbox@ff6b0000rockchip,rk3368-mailboxk0[ E bpclk_mailbox disabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfdspower-controller!rockchip,rk3368-power-controller+Dpower-domain@12 [       c h g n o r s f d d h i l k j n m$3456789:;power-domain@14 [  o p <=>power-domain@16[ @?syscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfdsLio-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-modeRBRBRB RBclock-controller@ff760000rockchip,rk3368-cruv[@bxin24m!&@  syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw&io-domains"rockchip,rk3368-io-voltage-domain disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt[ p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  B[ a U bpclktimerspdif@ff880000rockchip,rk3368-spdif 6[ S  bmclkhclk-A2txdefaultB< disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (bi2s_clki2s_hclk[ T -AA2txrx< disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5bi2s_clki2s_hclk[ R -AA2txrxdefaultC< disablediommu@ff900800rockchip,iommu [  baclkifaceMD [ disablediommu@ff914000rockchip,iommu @P [  baclkiface[MD h disabledvop@ff930000rockchip,rk3368-vop   ׄ [ baclk_vopdclk_vophclk_vopEMD y d e f axiahbdclk disabledport+ endpoint@0FIendpoint@1GKiommu@ff930300rockchip,iommu [  baclkifaceMD [ disabledEdsi@ff960000*rockchip,rk3368-mipi-dsisnps,dw-mipi-dsi@ [ dbpclkHdphyMD y sapb!& disabledports+port@0endpointIFport@1phy@ff968000rockchip,rk3368-dsi-dphy@[ s brefpclky rapb disabledHhdmi@ff980000rockchip,rk3368-dw-hdmi g[ h m nbiahbisfrcecdefaultJMD !& disabledports+port@0endpointKGport@1iommu@ff9a0440rockchip,iommu @@@ [  baclkiface[ disablediommu@ff9a0800rockchip,iommu  [  baclkiface[ disabledqos@ffad0000rockchip,rk3368-qossyscon 3qos@ffad0080rockchip,rk3368-qossyscon 4qos@ffad0100rockchip,rk3368-qossyscon 5qos@ffad0180rockchip,rk3368-qossyscon 6qos@ffad0200rockchip,rk3368-qossyscon 7qos@ffad0280rockchip,rk3368-qossyscon 8qos@ffad0300rockchip,rk3368-qossyscon 9qos@ffad0380rockchip,rk3368-qossyscon :qos@ffad0400rockchip,rk3368-qossyscon ;qos@ffae0000rockchip,rk3368-qossyscon <qos@ffae0100rockchip,rk3368-qossyscon =qos@ffae0180rockchip,rk3368-qossyscon >qos@ffaf0000rockchip,rk3368-qossyscon ?efuse@ffb00000rockchip,rk3368-efuse +[ q bpclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400@ @ `   pinctrlrockchip,rk3368-pinctrl!&L+ gpio@ff750000rockchip,gpio-banku[ @ Q#Rgpio@ff780000rockchip,gpio-bankx[ A R#gpio@ff790000rockchip,gpio-banky[ B S#Vgpio@ff7a0000rockchip,gpio-bankz[ C T#(pcfg-pull-up/Opcfg-pull-down<pcfg-pull-noneKPpcfg-pull-none-12maKX Qemmcemmc-clkgM emmc-cmdgNemmc-pwrgOemmc-bus1gOemmc-bus4@gOOOOemmc-bus8gNNNNNNNNemmc-resetgPUgmacrgmii-pinsgPPPQ Q QQQ QPPPPPPrmii-pinsgPPPQ Q QPPPP)hdmihdmi-i2c-xfer gPPJi2c0i2c0-xfer gPP*i2c1i2c1-xfer gPP.i2c2i2c2-xfer g PPi2c3i2c3-xfer gPPi2c4i2c4-xfer gPPi2c5i2c5-xfer gPPi2si2s-8ch-busg P PPPPPPPPCpwm0pwm0-pingP/pwm1pwm1-pingP0pwm3pwm3-pingP1sdio0sdio0-bus1gOsdio0-bus4@gOOOOsdio0-cmdgOsdio0-clkgPsdio0-cdgOsdio0-wpgOsdio0-pwrgOsdio0-bkpwrgOsdio0-intgOsdmmcsdmmc-clkg Psdmmc-cmdg Osdmmc-cdg Osdmmc-bus1gOsdmmc-bus4@gOOOOspdifspdif-txgPBspi0spi0-clkgOspi0-cs0gOspi0-cs1gOspi0-txgOspi0-rxgOspi1spi1-clkgOspi1-cs0gOspi1-cs1gOspi1-rxgOspi1-txgOspi2spi2-clkg Ospi2-cs0g Ospi2-rxg Ospi2-txg Otsadcotp-pingP$otp-outgP%uart0uart0-xfer gOPuart0-ctsgPuart0-rtsgPuart1uart1-xfer gOPuart1-ctsgPuart1-rtsgPuart2uart2-xfer gOP2uart3uart3-xfer gOPuart3-ctsgPuart3-rtsgPuart4uart4-xfer gOPuart4-ctsgPuart4-rtsgPpcfg-pull-none-drv-8maKXMpcfg-pull-up-drv-8ma/XNbacklightbl-engPSkeyspwr-keygOWpmicpmic-intgOsdiowifi-reg-ongPbt-rstgPusbhost-vbus-drvgPXchosenuserial2:115200n8memory@0memory@backlightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ RdefaultSTB@emmc-pwrseqmmc-pwrseq-emmcUdefault V gpio-keys gpio-keysdefaultWkey-power R GPIO Powertregulator-vcc-hostregulator-fixed ZRdefaultX vcc_host0DV+regulator-vcc-lanregulator-fixedvcc_lan2Z2Z0DV,'regulator-vcc-sysregulator-fixedvcc_sysLK@LK@0D+ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0cpudevice_typeregenable-method#cooling-cellsphandleportsstatusinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesbus-widthcap-mmc-highspeedmmc-pwrseqnon-removablepinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#mbox-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#sound-dai-cellspower-domains#iommu-cellsrockchip,disable-mmu-resetassigned-clocksassigned-clock-ratesiommusremote-endpointphysphy-names#phy-cellsinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathbrightness-levelsdefault-brightness-levelenable-gpiospwmsreset-gpioswakeup-sourcelabellinux,codeenable-active-high