tE8m(mH#geekbuying,geekboxrockchip,rk3368 +7GeekBoxaliases=/pinctrl/gpio@ff750000C/pinctrl/gpio@ff780000I/pinctrl/gpio@ff790000O/pinctrl/gpio@ff7a0000U/i2c@ff650000Z/i2c@ff660000_/i2c@ff140000d/i2c@ff150000i/i2c@ff160000n/i2c@ff170000s/serial@ff180000{/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/ethernet@ff290000/mmc@ff0f0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53pscidisplay-subsystemrockchip,display-subsystem  disabledarm-pmuarm,cortex-a53-pmu`pqrstuvw   psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clockn6-xin24m@Bmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @Mр [  D r vbbiuciuciu-driveciu-samplen y reset disabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @Mр [  E s wbbiuciuciu-driveciu-samplen !y reset disabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@Mр [  G u ybbiuciuciu-driveciu-samplen #y resetokayр  default saradc@ff100000rockchip,saradc $[ I [bsaradcapb_pclky W saradc-apb disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi[ A Rbspiclkapb_pclk ,default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi[ B Sbspiclkapb_pclk -default+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi[ C Tbspiclkapb_pclk )default+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+bi2c[ Ndefault disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+bi2c[ Odefault disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+bi2c[ Pdefault disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+bi2c[ Qdefault  disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartn6[ M Ubbaudclkapb_pclk 7 disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartn6[ N Vbbaudclkapb_pclk 8 disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartn6[ P Xbbaudclkapb_pclk : disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartn6[ Q Ybbaudclkapb_pclk ; disableddma-controller@ff250000arm,pl330arm,primecell%@6[  bapb_pclkthermal-zonescpu-thermalMdcq!tripscpu_alert0$passive"cpu_alert18passive#cpu_crits criticalcooling-mapsmap0"0map1#0 gpu-thermalMdcq!tripsgpu_alert08passive$gpu_crit8 criticalcooling-mapsmap0$0tsadc@ff280000rockchip,rk3368-tsadc( %[ H Zbtsadcapb_pclky  tsadc-apbinitdefaultsleep%&%sokay!ethernet@ff290000rockchip,rk3368-gmac) macirq/'8[  f g c ]Mbstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macy B stmmacethokay<(GrgmiiPinput] m)default*0mdiosnps,dwmac-mdio+usb@ff500000 generic-ehciP [ okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X [ botgotg@@ okaydma-controller@ff600000arm,pl330arm,primecell`@6[  bapb_pclkCi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce[ Lbi2c <default++okaypmic@1brockchip,rk808default,- ./// //"/. :/F/S/` -xin32krk808-clkout2@regulatorsDCDC_REG1m ``vdd_cpuDCDC_REG2m ``vdd_logDCDC_REG3mvcc_ddrDCDC_REG4m2Z2Zvcc_io LDO_REG1mw@w@ vcc18_flash LDO_REG2m2Z2Z vcc33_lcdLDO_REG3mB@B@vdd_10LDO_REG4w@w@vcca_18LDO_REG5mw@2Z vccio_sdLDO_REG6mB@B@ vdd10_lcdLDO_REG7mw@w@vcc_18LDO_REG8mw@w@ vcc18_lcdSWITCH_REG1vcc_sdSWITCH_REG2mvcc_lan(i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+bi2c[ Mdefault0 disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault1[ _ disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault2[ _ disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh [ _ disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default3[ _ disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti[ O Wbbaudclkapb_pclk 9default4okaymbox@ff6b0000rockchip,rk3368-mailboxk0[ E bpclk_mailbox disabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfdspower-controller!rockchip,rk3368-power-controller+Fpower-domain@12 [       c h g n o r s f d d h i l k j n m$56789:;<=power-domain@14 [  o p >?@power-domain@16[ @Asyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfdsNio-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-mode RBRB%RB 5RBclock-controller@ff760000rockchip,rk3368-cruv[Bbxin24m/'@A syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw'io-domains"rockchip,rk3368-io-voltage-domain disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt[ p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  B[ a U bpclktimerspdif@ff880000rockchip,rk3368-spdif 6[ S  bmclkhclkNCStxdefaultD] disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (bi2s_clki2s_hclk[ T NCCStxrx] disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5bi2s_clki2s_hclk[ R NCCStxrxdefaultE] disablediommu@ff900800rockchip,iommu [  baclkifacenF | disablediommu@ff914000rockchip,iommu @P [  baclkiface|nF  disabledvop@ff930000rockchip,rk3368-vop  ] ׄ [ baclk_vopdclk_vophclk_vopGnF y d e f axiahbdclk disabledport+ endpoint@0HKendpoint@1IMiommu@ff930300rockchip,iommu [  baclkifacenF | disabledGdsi@ff960000*rockchip,rk3368-mipi-dsisnps,dw-mipi-dsi@ [ dbpclkJdphynF y sapb/' disabledports+port@0endpointKHport@1phy@ff968000rockchip,rk3368-dsi-dphy@[ s brefpclky rapb disabledJhdmi@ff980000rockchip,rk3368-dw-hdmi g[ h m nbiahbisfrcecdefaultLnF /' disabledports+port@0endpointMIport@1iommu@ff9a0440rockchip,iommu @@@ [  baclkiface| disablediommu@ff9a0800rockchip,iommu  [  baclkiface| disabledqos@ffad0000rockchip,rk3368-qossyscon 5qos@ffad0080rockchip,rk3368-qossyscon 6qos@ffad0100rockchip,rk3368-qossyscon 7qos@ffad0180rockchip,rk3368-qossyscon 8qos@ffad0200rockchip,rk3368-qossyscon 9qos@ffad0280rockchip,rk3368-qossyscon :qos@ffad0300rockchip,rk3368-qossyscon ;qos@ffad0380rockchip,rk3368-qossyscon <qos@ffad0400rockchip,rk3368-qossyscon =qos@ffae0000rockchip,rk3368-qossyscon >qos@ffae0100rockchip,rk3368-qossyscon ?qos@ffae0180rockchip,rk3368-qossyscon @qos@ffaf0000rockchip,rk3368-qossyscon Aefuse@ffb00000rockchip,rk3368-efuse +[ q bpclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400@ @ `   pinctrlrockchip,rk3368-pinctrl/'N+gpio@ff750000rockchip,gpio-banku[ @ Q$4.gpio@ff780000rockchip,gpio-bankx[ A R$4gpio@ff790000rockchip,gpio-banky[ B S$4Ugpio@ff7a0000rockchip,gpio-bankz[ C T$4Rpcfg-pull-up@Ppcfg-pull-downMpcfg-pull-none\Opcfg-pull-none-12ma\i Qemmcemmc-clkxOemmc-cmdxPemmc-pwrxPemmc-bus1xPemmc-bus4@xPPPPemmc-bus8xPPPPPPPPgmacrgmii-pinsxOOOQ Q QQQ QOOOOOO*rmii-pinsxOOOQ Q QOOOOhdmihdmi-i2c-xfer xOOLi2c0i2c0-xfer xOO+i2c1i2c1-xfer xOO0i2c2i2c2-xfer x OOi2c3i2c3-xfer xOOi2c4i2c4-xfer xOOi2c5i2c5-xfer xOO i2si2s-8ch-busx O OOOOOOOOEpwm0pwm0-pinxO1pwm1pwm1-pinxO2pwm3pwm3-pinxO3sdio0sdio0-bus1xPsdio0-bus4@xPPPPsdio0-cmdxPsdio0-clkxOsdio0-cdxPsdio0-wpxPsdio0-pwrxPsdio0-bkpwrxPsdio0-intxPsdmmcsdmmc-clkx Osdmmc-cmdx Psdmmc-cdx Psdmmc-bus1xPsdmmc-bus4@xPPPPspdifspdif-txxODspi0spi0-clkxPspi0-cs0xPspi0-cs1xPspi0-txxPspi0-rxxPspi1spi1-clkxPspi1-cs0xPspi1-cs1xPspi1-rxxPspi1-txxPspi2spi2-clkx Pspi2-cs0x Pspi2-rxx Pspi2-txx Ptsadcotp-pinxO%otp-outxO&uart0uart0-xfer xPOuart0-ctsxOuart0-rtsxOuart1uart1-xfer xPOuart1-ctsxOuart1-rtsxOuart2uart2-xfer xPO4uart3uart3-xfer xPOuart3-ctsxOuart3-rtsxOuart4uart4-xfer xPOuart4-ctsxOuart4-rtsxOirir-intxOSkeyspwr-keyxOTpmicpmic-sleepxO-pmic-intxP,chosenserial2:115200n8memory@0memorygmac-clk fixed-clocksY@ -ext_gmac@)ir-receivergpio-ir-receiver RdefaultSgpio-keys gpio-keysdefaultTkey-power . GPIO Powertgpio-leds gpio-ledsled-0 Ugeekbox:blue:ledonled-1 Ugeekbox:red:ledoffregulator-vcc-sysregulator-fixedvcc_sysLK@LK@m/ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0cpudevice_typeregenable-method#cooling-cellsphandleportsstatusinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesbus-widthcap-mmc-highspeednon-removablevmmc-supplyvqmmc-supplypinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outassigned-clocksassigned-clock-parentstx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizesystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-name#pwm-cells#mbox-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#sound-dai-cellspower-domains#iommu-cellsrockchip,disable-mmu-resetassigned-clock-ratesiommusremote-endpointphysphy-names#phy-cellsinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathgpioslabellinux,codewakeup-sourcedefault-state