w8o(bohrockchip,r88rockchip,rk3368 + 7Rockchip R88aliases=/pinctrl/gpio@ff750000C/pinctrl/gpio@ff780000I/pinctrl/gpio@ff790000O/pinctrl/gpio@ff7a0000U/i2c@ff650000Z/i2c@ff660000_/i2c@ff140000d/i2c@ff150000i/i2c@ff160000n/i2c@ff170000s/serial@ff180000{/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/ethernet@ff290000/mmc@ff0d0000/mmc@ff0f0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53pscidisplay-subsystemrockchip,display-subsystem  disabledarm-pmuarm,cortex-a53-pmu`pqrstuvw  psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clock"n62xin24mEEmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @Rр `  D r vgbiuciuciu-driveciu-samples  ~ reset disabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @Rр `  E s wgbiuciuciu-driveciu-samples !~ resetokay E  default  '3mmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@Rр `  G u ygbiuciuciu-driveciu-samples #~ resetokay@default saradc@ff100000rockchip,saradc $R` I [gsaradcapb_pclk~ W saradc-apbokaydspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi` A Rgspiclkapb_pclk ,default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi` B Sgspiclkapb_pclk -default+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi` C Tgspiclkapb_pclk )default !"+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+gi2c` Ndefault# disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+gi2c` Odefault$ disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+gi2c` Pdefault% disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+gi2c` Qdefault& disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart"n6` M Ugbaudclkapb_pclk 7pz disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart"n6` N Vgbaudclkapb_pclk 8pz disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart"n6` P Xgbaudclkapb_pclk :pz disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart"n6` Q Ygbaudclkapb_pclk ;pz disableddma-controller@ff250000arm,pl330arm,primecell%@`  gapb_pclkthermal-zonescpu-thermald'tripscpu_alert0$passive(cpu_alert18passive)cpu_crits criticalcooling-mapsmap0(0map1)0 gpu-thermald'tripsgpu_alert08passive*gpu_crit8 criticalcooling-mapsmap0*0tsadc@ff280000rockchip,rk3368-tsadc( %` H Zgtsadcapb_pclk~  tsadc-apbinitdefaultsleep+#,-+7Msokayd{'ethernet@ff290000rockchip,rk3368-gmac) macirq-8`  f g c ]Mgstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac~ B stmmacethokay.rmiioutput /  'B@default00mdiosnps,dwmac-mdio+usb@ff500000 generic-ehciP ` okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X ` gotg!host);J@@ okaydma-controller@ff600000arm,pl330arm,primecell`@`  gapb_pclkFi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce` Lgi2c <default1+okaysyr827@40silergy,syr827@Yvvdd_cpu, 4`@ 2rtc@51haoyu,hym8563QE2xin32k]i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+gi2c` Mdefault3 disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault4` _ disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault5` _ disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh ` _ disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default6` _ disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti` O Wgbaudclkapb_pclk 9default7pzokaymbox@ff6b0000rockchip,rk3368-mailboxk0` E gpclk_mailbox" disabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfdspower-controller!rockchip,rk3368-power-controller.+Ipower-domain@12 `       c h g n o r s f d d h i l k j n m$B89:;<=>?@.power-domain@14 `  o p BABC.power-domain@16` @BD.syscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfdsQio-domains&rockchip,rk3368-pmu-io-voltage-domainokayITreboot-modesyscon-reboot-mode_fRBrRBRB RBclock-controller@ff760000rockchip,rk3368-cruv`Egxin24m-E syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw-io-domains"rockchip,rk3368-io-voltage-domainokaywatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt` p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  B` a U gpclktimerspdif@ff880000rockchip,rk3368-spdif 6` S  gmclkhclkFtxdefaultG disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (gi2s_clki2s_hclk` T FFtxrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5gi2s_clki2s_hclk` R FFtxrxdefaultH disablediommu@ff900800rockchip,iommu `  gaclkifaceI  disablediommu@ff914000rockchip,iommu @P `  gaclkifaceI  disabledvop@ff930000rockchip,rk3368-vop   6ׄ ` gaclk_vopdclk_vophclk_vopKJI ~ d e f axiahbdclk disabledport+ endpoint@0RKNendpoint@1RLPiommu@ff930300rockchip,iommu `  gaclkifaceI  disabledJdsi@ff960000*rockchip,rk3368-mipi-dsisnps,dw-mipi-dsi@ ` dgpclkbMgdphyI ~ sapb- disabledports+port@0endpointRNKport@1phy@ff968000rockchip,rk3368-dsi-dphy@` s grefpclkq~ rapb disabledMhdmi@ff980000rockchip,rk3368-dw-hdmi g` h m ngiahbisfrcecdefaultOI z- disabledports+port@0endpointRPLport@1iommu@ff9a0440rockchip,iommu @@@  `  gaclkiface disablediommu@ff9a0800rockchip,iommu  `  gaclkiface disabledqos@ffad0000rockchip,rk3368-qossyscon 8qos@ffad0080rockchip,rk3368-qossyscon 9qos@ffad0100rockchip,rk3368-qossyscon :qos@ffad0180rockchip,rk3368-qossyscon ;qos@ffad0200rockchip,rk3368-qossyscon <qos@ffad0280rockchip,rk3368-qossyscon =qos@ffad0300rockchip,rk3368-qossyscon >qos@ffad0380rockchip,rk3368-qossyscon ?qos@ffad0400rockchip,rk3368-qossyscon @qos@ffae0000rockchip,rk3368-qossyscon Aqos@ffae0100rockchip,rk3368-qossyscon Bqos@ffae0180rockchip,rk3368-qossyscon Cqos@ffaf0000rockchip,rk3368-qossyscon Defuse@ffb00000rockchip,rk3368-efuse +` q gpclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400|@ @ `   pinctrlrockchip,rk3368-pinctrl-Q+gpio@ff750000rockchip,gpio-banku` @ Q|Zgpio@ff780000rockchip,gpio-bankx` A R|gpio@ff790000rockchip,gpio-banky` B S|Xgpio@ff7a0000rockchip,gpio-bankz` C T|/pcfg-pull-upTpcfg-pull-downpcfg-pull-noneUpcfg-pull-none-12ma Vemmcemmc-clk Remmc-cmd Semmc-pwr Temmc-bus1 Temmc-bus4@ TTTTemmc-bus8 SSSSSSSSemmc-reset UWgmacrgmii-pins UUUV V VVV VUUUUUUrmii-pins UUUV V VUUUU0hdmihdmi-i2c-xfer  UUOi2c0i2c0-xfer  UU1i2c1i2c1-xfer  UU3i2c2i2c2-xfer  UU#i2c3i2c3-xfer  UU$i2c4i2c4-xfer  UU%i2c5i2c5-xfer  UU&i2si2s-8ch-bus  U UUUUUUUUHpwm0pwm0-pin U4pwm1pwm1-pin U5pwm3pwm3-pin U6sdio0sdio0-bus1 Tsdio0-bus4@ TTTTsdio0-cmd Tsdio0-clk U sdio0-cd Tsdio0-wp Tsdio0-pwr Tsdio0-bkpwr Tsdio0-int Tsdmmcsdmmc-clk  Usdmmc-cmd  Tsdmmc-cd  Tsdmmc-bus1 Tsdmmc-bus4@ TTTTspdifspdif-tx UGspi0spi0-clk Tspi0-cs0 Tspi0-cs1 Tspi0-tx Tspi0-rx Tspi1spi1-clk Tspi1-cs0 Tspi1-cs1 Tspi1-rx Tspi1-tx Tspi2spi2-clk Tspi2-cs0 T"spi2-rx T!spi2-tx T tsadcotp-pin U+otp-out U,uart0uart0-xfer  TUuart0-cts Uuart0-rts Uuart1uart1-xfer  TUuart1-cts Uuart1-rts Uuart2uart2-xfer  TU7uart3uart3-xfer  TUuart3-cts Uuart3-rts Uuart4uart4-xfer  TUuart4-cts Uuart4-rts Upcfg-pull-none-drv-8maRpcfg-pull-up-drv-8maSirir-int T\keyspwr-key TYledsstby-pwren Uled-ctl U[sdiowifi-reg-on U_bt-rst U^usbhost-vbus-drv U`chosenserial2:115200n8memory@0memory@emmc-pwrseqmmc-pwrseq-emmcWdefault $Xgpio-keys gpio-keysdefaultYkey-power0 *Z >GPIO PowerDtgpio-leds gpio-ledsled-0 */>r88:green:leddefault[ir-receivergpio-ir-receiver */default\sdio-pwrseqmmc-pwrseq-simple`] gext_clockdefault^_$// regulator-vcc18regulator-fixedvvcc_18w@w@ 2regulator-vcc-hostregulator-fixedO Zdefault` vvcc_host 2regulator-vcc-ioregulator-fixedvvcc_io2Z2Z 2regulator-vcc-lanregulator-fixedvvcc_lan2Z2Z .regulator-vcc-sysregulator-fixedvvcc_sysLK@LK@2regulator-vccio-wlregulator-fixed vvccio_wl2Z2Z regulator-vdd-10regulator-fixedvvdd_10B@B@ 2 compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0mmc1cpudevice_typeregenable-method#cooling-cellsphandleportsstatusinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesassigned-clocksassigned-clock-parentsbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-mmc-highspeed#io-channel-cellsvref-supplyreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supply#pwm-cells#mbox-cells#power-domain-cellspm_qospmu-supplyvop-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsaudio-supplygpio30-supplygpio1830-supplywifi-supplydmasdma-names#sound-dai-cellspower-domains#iommu-cellsrockchip,disable-mmu-resetassigned-clock-ratesiommusremote-endpointphysphy-names#phy-cellsinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathreset-gpioswakeup-sourcelabellinux,codeenable-active-high