G8( %pine64,pinephone-prorockchip,rk3399 +7Pine64 PinePhone Pro=handsetaliasesJ/pinctrl/gpio@ff720000P/pinctrl/gpio@ff730000V/pinctrl/gpio@ff780000\/pinctrl/gpio@ff788000b/pinctrl/gpio@ff790000h/i2c@ff3c0000m/i2c@ff110000r/i2c@ff120000w/i2c@ff130000|/i2c@ff3d0000/i2c@ff140000/i2c@ff150000/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/spi@ff1c0000/spi@ff1d0000/spi@ff1e0000/spi@ff350000/spi@ff1f0000/spi@ff200000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci &5dO _l@~@   cpu@1cpuarm,cortex-a53psci &5dO _l@~@   cpu@2cpuarm,cortex-a53psci &5dO _l@~@   cpu@3cpuarm,cortex-a53psci &5dO _l@~@   cpu@100cpuarm,cortex-a72psci  &5O _l@~@thermal-idle&'cpu@101cpuarm,cortex-a72psci  &5O _l@~@thermal-idle&'l2-cache-cluster0cache an@ l2-cache-cluster1cache an@idle-states%pscicpu-sleeparm,idle-state2CZxk cluster-sleeparm,idle-state2CZk display-subsystemrockchip,display-subsystem|memory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ * Gaclkaclk-perfhclkpm01234syslegacyclientD`Wet |,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controller pcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk |,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 default disabledethernet@fe300000rockchip,rk3399-gmac0 4macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmaceth# disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@.р Mbiuciuciu-driveciu-sample<yresetokayGQbozdefault  +wifi@1brcm,bcm4329-fmac ! 4host-wakedefault"mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@A.р  Lbiuciuciu-driveciu-sample<zresetokayGQ #odefault$%&'()mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahbemmc_cardclock|* phy_arasanokayG%usb@fe380000 generic-ehci8+|,usb disabledusb@fe3a0000 generic-ohci:+|,usb disabledusb@fe3c0000 generic-ehci<-|.usb disabledusb@fe3e0000 generic-ohci> -|.usb disableddebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otg disabledusb@fe800000 snps,dwc3irefbus_earlysuspend4otg|/0usb2-phyusb3-phy Pesaradcapb_pclk saradc-apbokay07crypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cn6AU i2cpclk;default89+okaycamera@1asony,imx258-pdaf<:Gdefault; S<_h=s>?portendpoint%@camera-lens@cdongwoon,dw9714 =:camera@36 ovti,ov88586xvclk=GdefaultAB C  S<_ZportendpointDi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#defaultE+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"defaultF+okaytouchscreen@14goodix,gt1158 G  G  SG HH#6light-sensor@48sensortek,stk3311H !defaultII,i2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&defaultJ+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%defaultK+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$defaultL+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc^hdefault MNOokayubluetoothbrcm,bcm4345c5Plpo C #`default QRS # (Tserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb^hdefaultU disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd^hdefaultVokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke^hdefaultW disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDX X txrxdefaultYZ[\+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5X X txrxdefault]^_`+okayflash@0jedec,spi-norTspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4XXtxrxdefaultabcd+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCXXtxrxdefaultefgh+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkii txrxdefaultjklm+ disabledthermal-zonescpu-thermald"ntripscpu_alert02>Epassiveocpu_alert12 >Epassivepcpu_crit2s> Ecriticalcooling-mapsmap0IoNmap1IpHNgpu-thermald"ntripsgpu_alert02$>Epassiveqgpu_crit2s> Ecriticalcooling-mapsmap0Iq Nrtsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apb]sinitdefaultsleepstt~sokaynqos@ffa58000rockchip,rk3399-qossyscon |qos@ffa5c000rockchip,rk3399-qossyscon }qos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon qos@ffa70080rockchip,rk3399-qossyscon qos@ffa74000rockchip,rk3399-qossyscon@ ~qos@ffa76000rockchip,rk3399-qossyscon` qos@ffa90000rockchip,rk3399-qossyscon qos@ffa98000rockchip,rk3399-qossyscon uqos@ffaa0000rockchip,rk3399-qossyscon qos@ffaa0080rockchip,rk3399-qossyscon qos@ffaa8000rockchip,rk3399-qossyscon qos@ffaa8080rockchip,rk3399-qossyscon qos@ffab0000rockchip,rk3399-qossyscon vqos@ffab0080rockchip,rk3399-qossyscon wqos@ffab8000rockchip,rk3399-qossyscon xqos@ffac0000rockchip,rk3399-qossyscon yqos@ffac0080rockchip,rk3399-qossyscon zqos@ffac8000rockchip,rk3399-qossyscon qos@ffac8080rockchip,rk3399-qossyscon qos@ffad0000rockchip,rk3399-qossyscon qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon {power-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+power-domain@34"upower-domain@33!vwpower-domain@31xpower-domain@32  yzpower-domain@35#{power-domain@25lpower-domain@23|power-domain@22f}power-domain@27L~power-domain@28power-domain@8~}power-domain@9 power-domain@24power-domain@15+power-domain@21rpower-domain@19power-domain@20power-domain@16+power-domain@17power-domain@18syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2io-domains&rockchip,rk3399-pmu-io-voltage-domainokayTspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclk<default+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclkf^hdefault disabledi2c@ff3c0000rockchip,rk3399-i2c<    i2cpclk9default+okaypmic@1crockchip,rk818 <xin32krk808-clkout2default   , 8 D P \( h t(PregulatorsDCDC_REG1 vdd_cpu_l   Y  q regulator-state-mem DCDC_REG2 vdd_center   5 B@ qregulator-state-mem DCDC_REG3 vcc_ddr  regulator-state-mem DCDC_REG4 vcc_1v8   w@ w@Tregulator-state-mem LDO_REG1 vcca3v0_codec - -LDO_REG2 vcc3v0_touch - -HLDO_REG3 vcca1v8_codec   w@ w@LDO_REG4 rk818_pwr_on   2Z 2Zregulator-state-mem LDO_REG5 vcc_3v0   - -regulator-state-mem LDO_REG6 vcc_1v5   ` `regulator-state-mem LDO_REG7 vcc1v8_dvp w@ w@=LDO_REG8 vcc3v3_s3   2Z 2Zregulator-state-mem LDO_REG9 vccio_sd w@ 2Z)SWITCH_REG vcc3v3_s0  regulator-state-mem regulator@40silergy,syr827@ +default vdd_cpu_b Y 0   regulator-state-mem regulator@41silergy,syr828A +default vdd_gpu Y    regulator-state-mem i2c@ff3d0000rockchip,rk3399-i2c=    i2cpclk8default+okayXmpu6500@68invensense,mpu6500h <TT H1000-1000-1compass@1cvoltafield,af8133j U aTdefault S< H010-100001i2c@ff3e0000rockchip,rk3399-i2c>    i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB mdefaultokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB mdefault disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  mdefault disabledpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 mdefault disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_monvideo-codec@ff650000rockchip,rk3399-vpue rq 4vepuvdpu aclkhclk xiommu@ff650800rockchip,iommue@s aclkiface video-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore x iommu@ff660480rockchip,iommu f@f@u aclkiface  iommu@ff670800rockchip,iommug@* aclkiface  disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclkidma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclkXclock-controller@ff750000rockchip,rk3399-pmucruuxin24m (Jclock-controller@ff760000rockchip,rk3399-cruvxin24m @BCxD#g/;рxh<4`#Fׄׄ ׄsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domainokay =  ) mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf okayusb2phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480m disabled+host-port  4linestate disabled,otg-port 0ghj4otg-bvalidotg-idlinestate disabled/usb2phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480m disabled-host-port  4linestate disabled.otg-port 0lmo4otg-bvalidotg-idlinestate disabled1phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okay*pcie-phyrockchip,rk3399-pcie-phyrefclk phy disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphy disableddp-port 3usb3-port 0phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphy disableddp-port 4usb3-port 2watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBitx mclkhclkUdefault disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'iitxrxi2s_clki2s_hclkVbclk_onbclk_offt disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(iitxrxi2s_clki2s_hclkWdefault disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)iitxrxi2s_clki2s_hclkX disabledvop@ff8f0000rockchip,rk3399-vop-lit w ׄaclk_vopdclk_vophclk_vop x axiahbdclkokay port+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@46iommu@ff8f3f00rockchip,iommu?w aclkiface okayvop@ff900000rockchip,rk3399-vop-big v ׄaclk_vopdclk_vophclk_vop x axiahbdclkokay port+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@45iommu@ff903f00rockchip,iommu?v aclkiface okayisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk x|dphyokayports+port@0+endpoint@0Diommu@ff914000rockchip,iommu @P+ aclkiface  (okayisp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk x|dphyokayports+port@0+endpoint@0@iommu@ff924000rockchip,iommu @P, aclkiface  (okayhdmi-soundsimple-audio-card Ci2s \ vhdmi-sound disabledsimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmih(tqpoiahbisfrcecgrfref disabledports+port@0+endpoint@0endpoint@1port@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapbokay +ports+port@0+endpoint@0endpoint@1port@1endpointpanel@0!hannstar,hsd060bhw4himax,hx8394  default S!portendpointdsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb okayports+port@0+endpoint@0endpoint@1port@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0endpoint@1port@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 4jobmmugpu&5 P#okay rpinctrlrockchip,rk3399-pinctrl+gpio@ff720000rockchip,gpio-bankr   #gpio@ff730000rockchip,gpio-banks   <gpio@ff780000rockchip,gpio-bankxP   Cgpio@ff788000rockchip,gpio-bankxQ   Ggpio@ff790000rockchip,gpio-bankyR   !pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  pcfg-pull-none-13ma  pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low 'pcfg-input-enable 2pcfg-input-pull-up 2 pcfg-input-pull-down 2 clockclk-32k ?cifcif-clkin ? cif-clkouta ? 9edpedp-hpd ?gmacrgmii-pins ?    rmii-pins ?     i2c0i2c0-xfer ?i2c1i2c1-xfer ?8i2c2i2c2-xfer ?Ei2c3i2c3-xfer ?Fi2c4i2c4-xfer ?  i2c5i2c5-xfer ?  Ji2c6i2c6-xfer ?  Ki2c7i2c7-xfer ?Li2c8i2c8-xfer ?i2s0i2s0-2ch-bus` ?i2s0-2ch-bus-bclk-off` ?i2s0-8ch-bus ?i2s0-8ch-bus-bclk-off ?i2s1i2s1-2ch-busP ?i2s1-2ch-bus-bclk-offP ?sdio0sdio0-bus1 ?sdio0-bus4@ ?sdio0-cmd ?sdio0-clk ? sdio0-cd ?sdio0-pwr ?sdio0-bkpwr ?sdio0-wp ?sdio0-int ?sdmmcsdmmc-bus1 ?sdmmc-bus4@ ?   'sdmmc-clk ? $sdmmc-cmd ? %sdmmc-cd ?&sdmmc-wp ?suspendap-pwroff ?ddrio-pwroff ?spdifspdif-bus ?spdif-bus-1 ?spi0spi0-clk ?Yspi0-cs0 ?\spi0-cs1 ?spi0-tx ?Zspi0-rx ?[spi1spi1-clk ? ]spi1-cs0 ? `spi1-rx ?_spi1-tx ?^spi2spi2-clk ? aspi2-cs0 ? dspi2-rx ? cspi2-tx ? bspi3spi3-clk ?spi3-cs0 ?spi3-rx ?spi3-tx ?spi4spi4-clk ?espi4-cs0 ?hspi4-rx ?gspi4-tx ?fspi5spi5-clk ?jspi5-cs0 ?mspi5-rx ?lspi5-tx ?ktestclktest-clkout0 ?test-clkout1 ?test-clkout2 ?tsadcotp-pin ?sotp-out ?tuart0uart0-xfer ?Muart0-cts ?Nuart0-rts ?Ouart1uart1-xfer ?  Uuart2auart2a-xfer ? uart2buart2b-xfer ?uart2cuart2c-xfer ?Vuart3uart3-xfer ?Wuart3-cts ?uart3-rts ?uart4uart4-xfer ?uarthdcpuarthdcp-xfer ?pwm0pwm0-pin ?pwm0-pin-pull-down ?vop0-pwm-pin ?vop1-pwm-pin ?pwm1pwm1-pin ?pwm1-pin-pull-down ?pwm2pwm2-pin ?pwm2-pin-pull-down ?pwm3apwm3a-pin ?pwm3bpwm3b-pin ?hdmihdmi-i2c-xfer ?hdmi-cec ?pciepci-clkreqn-cpm ?pci-clkreqnb-cpm ?buttonspwrbtn-pin ?lcdlcd1-rst-pin ?camerascamera-rst-l ?;camera2-rst-l ?Advp-pdn0-h ? Bcompasscompass-rst-l ?ledsred-led-pin ?green-led-pin ?blue-led-pin ?pmicpmic-int-l ?vsel1-pin ?vsel2-pin ?sdio-pwrseqwifi-enable-h-pin ? soundvcc1v8-codec-en ?stk3311light-int-l ?Iwifiwifi-host-wake-l ?"wireless-bluetoothbt-wake-pin ?Rbt-host-wake-pin ?Qbt-reset-pin ? Sopp-table-0operating-points-v2 M opp00 XQ _  m@opp01 X#F _ opp02 X0, _ P Popp03 X< _HHopp-table-1operating-points-v2 Mopp00 XQ _  m@opp01 X#F _ opp02 X0, _ opp03 X< _ Y Yopp04 XG _~~opp05 XTfr _opp06 XYh/ _0opp-table-2operating-points-v2opp00 X  _ 0opp01 X@ _ 0opp02 Xׄ _ 0opp03 Xe _ Y Y0opp04 X#F _HH0opp05 X/ _0chosen ~serial2:115200n8adc-keys adc-keys  buttons j dbutton-up Volume Up s button-down Volume Down r backlightpwm-backlight Pgpio-keys gpio-keysdefaultkey-power  # Power t leds gpio-ledsdefault led-0  !led-1  !led-2  !multi-ledleds-group-multicolor   indicator regulator-vcc-sysregulator-fixed vcc_sys  regulator-avdd2v8-dvpregulator-fixed avdd2v8_dvp   * * %(>regulator-vcc3v3-sysregulator-fixed vcc3v3_sys   2Z 2Z %(regulator-vcc1v8-s3regulator-fixed vcca1v8_s3 w@ w@ %(  7regulator-vcc1v8-codecregulator-fixed 0 CGdefault vcc1v8_codec w@ w@ %(regulator-vcc1v2-dvpregulator-fixed vcc1v2_dvp   O O %7?sdio-wifi-pwrseqmmc-pwrseq-simpleP ext_clockdefault Hn _' S# regulator-vcc1v8-lcdregulator-fixed 0 vcc1v8_lcd w@ w@ %( CGregulator-vcc2v8-lcdregulator-fixed 0 vcc2v8_lcd * * %( CGvibratorgpio-vibrator rG ( compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typegpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clocksassigned-clock-ratescd-gpiosvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplylens-focusorientationreset-gpiosrotationvif-supplyvana-supplyvdig-supplydata-laneslink-frequenciesvcc-supplydovdd-supplypowerdown-gpiosi2c-scl-rising-time-nsi2c-scl-falling-time-nsirq-gpiosAVDD28-supplyVDDIO-supplytouchscreen-size-xtouchscreen-size-yproximity-near-levelreg-shiftreg-io-widthuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosmax-speedshutdown-gpiosvbat-supplyvddio-supplydmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplysystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendfcs,suspend-voltage-selectormount-matrixavdd-supplydvdd-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmassigned-clock-parentsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightiovcc-supplymali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpwmsdebounce-intervalcolorfunctionledsvin-supplyenable-active-highgpiopost-power-on-delay-mspower-off-delay-usenable-gpios