}68u(Ruradxa,rock-2arockchip,rk3528 +7Radxa ROCK 2Aaliases=/pinctrl/gpio@ff610000C/pinctrl/gpio@ffaf0000I/pinctrl/gpio@ffb00000O/pinctrl/gpio@ffb10000U/pinctrl/gpio@ffb20000[/soc/i2c@ffa58000`/soc/mmc@ffbf0000e/soc/mmc@ffc30000j/soc/serial@ff9f0000r/soc/ethernet@ffbe0000cpus+cpu-mapcluster0core0|core1|core2|core3|cpu@0arm,cortex-a53cpupscicpu@1arm,cortex-a53cpupscicpu@2arm,cortex-a53cpupscicpu@3arm,cortex-a53cpupscifirmwarescmi arm,scmi-smĉ +protocol@14opp-table-cpuoperating-points-v2opp-1200000000G Y Y @opp-1416000000Tfr HH @opp-1608000000_"  @opp-1800000000kI ԼԼ @opp-2016000000x)  @opp-table-gpuoperating-points-v2/opp-300000000 Y YB@opp-500000000e Y YB@opp-600000000#F Y YB@opp-700000000)' B@opp-800000000/ ~~B@pinctrlrockchip,rk3528-pinctrl' +4 gpio@ff610000rockchip,gpio-banka r s ;GFVb negpio@ffaf0000rockchip,gpio-bank  ;IFVb n agpio@ffb00000rockchip,gpio-bank $ % ;KFVb @ n gpio@ffb10000rockchip,gpio-bank  ;LFVb ` n bgpio@ffb20000rockchip,gpio-bank  ;NFVb n Mpcfg-pull-uppcfg-pull-downpcfg-pull-nonepcfg-pull-none-drv-level-0pcfg-pull-none-drv-level-2pcfg-pull-up-drv-level-2pcfg-pull-none-smtarmclkemmcemmc-bus8Nemmc-clkOemmc-cmdPemmc-strbQethfephyfephym0-led-link@fephym0-led-spdAfspigpuhdmihsmi2c0i2c1i2c1m0-xfer 3i2c2i2c2m1-xfer 5i2c3i2c4i2c4-xfer 6i2c5i2c6i2c7i2c7-xfer 7i2s0i2s1jtagpciepdmpmupwm0pwm1pwm1m0-pins8pwm2pwm2m0-pins9pwm3pwm4pwm5pwm6pwm7pwrrefrgmiirgmii-miim Grgmii-rx-bus20Irgmii-tx-bus20Hrgmii-rgmii-clk Jrgmii-rgmii-bus@ Kscrsdio0sdio0-bus4@Rsdio0-clkSsdio0-cmdTsdio1sdio1-bus4@ Usdio1-clkVsdio1-cmdWsdmmcsdmmc-bus4@Xsdmmc-clkYsdmmc-cmdZsdmmc-det[sdmmc-vol-ctrl-hgspdifspi0spi1tsi0tsi1uart0uart0m0-xfer 2uart1uart2uart3uart4uart5uart6uart7bluetoothbt-wake-host-hhost-wake-bt-hledsstate-led-b_sys-led-g`usbusb-host-enfusb-otg-enkwifiusb-wifi-pwrdwifi-reg-on-hjwifi-wake-host-hethernetgmac1-rstn-lLpsciarm,psci-1.0arm,psci-0.2smcreserved-memory+4shmem@10f000arm,scmi-shmem timerarm,armv8-timer0;   clock-xin24m fixed-clockn6xin24mclock-gmac50m fixed-clockgmac0soc simple-bus4D+pcie@fe000000*rockchip,rk3528-pcierockchip,rk3568-pcie0@O'dbiapbconfig1( $;aclk_mstaclk_slvaclk_dbipclkauxpciH;GsyspmcmsglegacyerrmsiW`jx pcie-phy T4 @ d b pwrpipe+ disabledlegacy-interrupt-controllern  ;interrupt-controller@fed01000 arm,gic-400@ @ `  ; nqos@ff200000rockchip,rk3528-qossyscon qos@ff200080rockchip,rk3528-qossyscon qos@ff200100rockchip,rk3528-qossyscon  qos@ff200200rockchip,rk3528-qossyscon  qos@ff200280rockchip,rk3528-qossyscon  qos@ff200300rockchip,rk3528-qossyscon  qos@ff200380rockchip,rk3528-qossyscon  qos@ff210000rockchip,rk3528-qossyscon! qos@ff210080rockchip,rk3528-qossyscon! qos@ff220000rockchip,rk3528-qossyscon" qos@ff220080rockchip,rk3528-qossyscon" qos@ff240000rockchip,rk3528-qossyscon$ qos@ff250000rockchip,rk3528-qossyscon% qos@ff260000rockchip,rk3528-qossyscon& qos@ff270000rockchip,rk3528-qossyscon' qos@ff270080rockchip,rk3528-qossyscon' qos@ff270100rockchip,rk3528-qossyscon' qos@ff270200rockchip,rk3528-qossyscon'  qos@ff270280rockchip,rk3528-qossyscon' !qos@ff270300rockchip,rk3528-qossyscon' "qos@ff270380rockchip,rk3528-qossyscon' #qos@ff270480rockchip,rk3528-qossyscon' $qos@ff270500rockchip,rk3528-qossyscon' %qos@ff280000rockchip,rk3528-qossyscon( &qos@ff280080rockchip,rk3528-qossyscon( 'qos@ff280100rockchip,rk3528-qossyscon( (qos@ff280180rockchip,rk3528-qossyscon( )qos@ff280200rockchip,rk3528-qossyscon( *qos@ff280280rockchip,rk3528-qossyscon( +qos@ff280300rockchip,rk3528-qossyscon( ,qos@ff280380rockchip,rk3528-qossyscon( -qos@ff280400rockchip,rk3528-qossyscon( .syscon@ff340000rockchip,rk3528-vpu-grfsyscon4Bsyscon@ff348000$rockchip,rk3528-pipe-phy-grfsyscon4]syscon@ff360000rockchip,rk3528-vo-grfsyscon6<clock-controller@ff4a0000rockchip,rk3528-cruJ t          z y  LLFq;;]Q沀eр Cׄ#FsY@e ;xin24mgmac0 syscon@ff540000rockchip,rk3528-ioc-grfsysconT power-management@ff600000&rockchip,rk3528-pmusysconsimple-mfd` power-controller!rockchip,rk3528-power-controller+ power-domain@4 power-domain@5 disabledpower-domain@6power-domain@7$ !"#$%power-domain@8$&'()*+,-.gpu@ff700000"rockchip,rk3528-maliarm,mali-450p @  ;buscoreT;XYV\]Z["Ggpgpmmupppp0ppmmu0pp1ppmmu1/  wokay0spi@ff9c0000(rockchip,rk3528-spirockchip,rk3066-spi ;spiclkapb_pclk ;$11)txrx + disabledspi@ff9d0000(rockchip,rk3528-spirockchip,rk3066-spi ;spiclkapb_pclk ;$11)txrx + disabledserial@ff9f0000&rockchip,rk3528-uartsnps,dw-apb-uart  k;baudclkapb_pclk ;($1 13@okayJdefaultX2serial@ff9f8000&rockchip,rk3528-uartsnps,dw-apb-uart  ;baudclkapb_pclk ;)$1 1  3@ disabledserial@ffa00000&rockchip,rk3528-uartsnps,dw-apb-uart  ;baudclkapb_pclk ;*$1 1  3@ disabledserial@ffa08000&rockchip,rk3528-uartsnps,dw-apb-uart  ;baudclkapb_pclk ;+$11 3@ disabledserial@ffa10000&rockchip,rk3528-uartsnps,dw-apb-uart  1;baudclkapb_pclk ;,$11 3@ disabledserial@ffa18000&rockchip,rk3528-uartsnps,dw-apb-uart " ;baudclkapb_pclk ;-$11 3@ disabledserial@ffa20000&rockchip,rk3528-uartsnps,dw-apb-uart % ;baudclkapb_pclk ;.$11 3@ disabledserial@ffa28000&rockchip,rk3528-uartsnps,dw-apb-uart ( ;baudclkapb_pclk ;/$11 3@ disabledi2c@ffa50000(rockchip,rk3528-i2crockchip,rk3399-i2c  ;i2cpclk ;= + disabledi2c@ffa58000(rockchip,rk3528-i2crockchip,rk3399-i2c  ;i2cpclk ;> +okayJdefaultX3eeprom@50belling,bl24c16aatmel,24c16Pbku4i2c@ffa60000(rockchip,rk3528-i2crockchip,rk3399-i2c j i ;i2cpclk ;?JdefaultX5+ disabledi2c@ffa68000(rockchip,rk3528-i2crockchip,rk3399-i2c  ;i2cpclk ;@ + disabledi2c@ffa70000(rockchip,rk3528-i2crockchip,rk3399-i2c 3 2 ;i2cpclk ;AJdefaultX6 + disabledi2c@ffa78000(rockchip,rk3528-i2crockchip,rk3399-i2c  ;i2cpclk ;B + disabledi2c@ffa80000(rockchip,rk3528-i2crockchip,rk3399-i2c  ;i2cpclk ;C + disabledi2c@ffa88000(rockchip,rk3528-i2crockchip,rk3399-i2c 5 4 ;i2cpclk ;DJdefaultX7 + disabledpwm@ffa90000(rockchip,rk3528-pwmrockchip,rk3328-pwm o n ;pwmpclk disabledpwm@ffa90010(rockchip,rk3528-pwmrockchip,rk3328-pwm o n ;pwmpclkokayJdefaultX8hpwm@ffa90020(rockchip,rk3528-pwmrockchip,rk3328-pwm  o n ;pwmpclkokayJdefaultX9ipwm@ffa90030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 o n ;pwmpclk disabledpwm@ffa98000(rockchip,rk3528-pwmrockchip,rk3328-pwm r q ;pwmpclk disabledpwm@ffa98010(rockchip,rk3528-pwmrockchip,rk3328-pwm r q ;pwmpclk disabledpwm@ffa98020(rockchip,rk3528-pwmrockchip,rk3328-pwm  r q ;pwmpclk disabledpwm@ffa98030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 r q ;pwmpclk disabledadc@ffae0000rockchip,rk3528-saradc ;saradcapb_pclk ;  o saradc-apbokay:^ethernet@ffbd0000&rockchip,rk3528-gmacsnps,dwmac-4.20a0      >;stmmacethclk_mac_refmac_clk_rxmac_clk_txpclk_macaclk_mac;qtGmacirqeth_wake_irq;rmii   stmmaceth'<=>? disabledmdiosnps,dwmac-mdio+ethernet-phy@2ethernet-phy-ieee802.3-c22 " JdefaultX@A ;stmmac-axi-config)9=rx-queues-configI>queue0tx-queues-config_?queue0ethernet@ffbe0000&rockchip,rk3528-gmacsnps,dwmac-4.20a (;stmmacethclk_mac_refpclk_macaclk_mac;y|Gmacirqeth_wake_irq  a stmmaceth'BCDEokayuoutputF rgmii-id4JdefaultXGHIJKmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22JdefaultXLN  MFstmmac-axi-config)9Crx-queues-configIDqueue0tx-queues-config_Equeue0mmc@ffbf00000rockchip,rk3528-dwcmshcrockchip,rk3588-dwcmshc   n6 ( ;corebusaxiblocktimer ; JdefaultXNOPQ ( A B C D Ecorebusaxiblocktimerokay4:mmc@ffc100000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  ;biuciuciu-driveciu-sample) ; Jdefault XRST  greset disabledmmc@ffc200000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  ;biuciuciu-driveciu-sample) ; Jdefault XUVW  hreset disabledmmc@ffc300000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@ ( '  ;biuciuciu-driveciu-sample) ;JdefaultXXYZ[  reset4ZokayRcn4\dma-controller@ffd60000arm,pl330arm,primecell@ ^ ;apb_pclkl;|1phy@ffdc0000rockchip,rk3528-naneng-combphy { {  ;refapbpipe  c ephyapbB] disabledchosenserial0:1500000n8adc-keys adc-keys^buttonsw@dbutton-maskrom"MASKROM(3leds gpio-ledsJdefaultX_`led-0MSon aheartbeat a jheartbeatled-1MSonastatus bregulator-0v9-vddregulator-fixedvdd_0v9  cregulator-1v1-vcc-ddrregulator-fixedvcc_ddrcregulator-1v8-vccregulator-fixedvcc_1v8w@w@4:regulator-3v3-vccregulator-fixedvcc_3v32Z2Zc4regulator-3v3-vcc-wifiregulator-fixed MJdefaultXd vcc_wifi2Z2Z4regulator-5v0-vcc-sysregulator-fixed vcc5v0_sysLK@LK@cregulator-5v0-vcc-usb20regulator-fixed eJdefaultXf vcc5v0_usb20LK@LK@cregulator-vccio-sdregulator-gpio aJdefaultXg vccio_sdw@2Zw@2Zc\regulator-vdd-armpwm-regulator hcvdd_arm bShregulator-vdd-logicpwm-regulator ic vdd_logic Y0rfkill rfkill-gpio "rfkill-wlanJdefaultXj8wlan Caregulator-5v0-vcc-usb30-otgregulator-fixed aJdefaultXkvcc5v0_usb30_otgLK@LK@c compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c1mmc0mmc1serial0ethernet0cpuregdevice_typeenable-methodclocksoperating-points-v2cpu-supplyphandlearm,smc-idshmem#clock-cellsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,grfrangesinterruptsgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellspower-domainsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsno-mapclock-frequencyclock-output-namesreg-namesbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-lanesphysphy-namesresetsreset-namesstatusassigned-clocksassigned-clock-rates#reset-cells#power-domain-cellspm_qosmali-supplydmasdma-namesreg-io-widthreg-shiftpinctrl-namespinctrl-0pagesizeread-onlyvcc-supply#pwm-cells#io-channel-cellsvref-supplyphy-handlephy-modesnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-is-integratedsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useclock_in_outphy-supplyreset-assert-usreset-deassert-usreset-gpiosmax-frequencybus-widthcap-mmc-highspeedmmc-hs200-1_8vno-sdno-sdionon-removablevmmc-supplyvqmmc-supplyfifo-depthrockchip,default-sample-phasecap-sd-highspeeddisable-wpsd-uhs-sdr104#dma-cellsarm,pl330-periph-burst#phy-cellsrockchip,pipe-grfrockchip,pipe-phy-grfstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolordefault-statefunctionlinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highstatespwmspwm-supplyregulator-settling-time-up-usradio-typeshutdown-gpios