w8p(pPradxa,rock-2frockchip,rk3528 +7Radxa ROCK 2Faliases=/pinctrl/gpio@ff610000C/pinctrl/gpio@ffaf0000I/pinctrl/gpio@ffb00000O/pinctrl/gpio@ffb10000U/pinctrl/gpio@ffb20000[/soc/i2c@ffa58000`/soc/mmc@ffbf0000e/soc/mmc@ffc30000j/soc/serial@ff9f0000cpus+cpu-mapcluster0core0rcore1rcore2rcore3rcpu@0arm,cortex-a53vzcpupscicpu@1arm,cortex-a53vzcpupscicpu@2arm,cortex-a53vzcpupscicpu@3arm,cortex-a53vzcpupscifirmwarescmi arm,scmi-smc‚ +protocol@14vopp-table-cpuoperating-points-v2opp-1200000000G Y Y@opp-1416000000Tfr HH@opp-1608000000_" @opp-1800000000kI ԼԼ@opp-2016000000x) @opp-table-gpuoperating-points-v2/opp-300000000 Y YB@opp-500000000e Y YB@opp-600000000#F Y YB@opp-700000000)' B@opp-800000000/ ~~B@pinctrlrockchip,rk3528-pinctrl +* gpio@ff610000rockchip,gpio-bankva r s 1G<LX dy\gpio@ffaf0000rockchip,gpio-bankv  1I<LX dy Xgpio@ffb00000rockchip,gpio-bankv $ % 1K<LX @ dy gpio@ffb10000rockchip,gpio-bankv  1L<LX ` dy gpio@ffb20000rockchip,gpio-bankv  1N<LX dy Zpcfg-pull-uppcfg-pull-downpcfg-pull-nonepcfg-pull-none-drv-level-0pcfg-pull-none-drv-level-2pcfg-pull-up-drv-level-2pcfg-pull-none-smtarmclkemmcemmc-bus8Femmc-clkGemmc-cmdHemmc-strbIethfephyfephym0-led-link@fephym0-led-spdAfspigpuhdmihsmi2c0i2c1i2c1m0-xfer 3i2c2i2c2m1-xfer 5i2c3i2c4i2c4-xfer 6i2c5i2c6i2c7i2c7-xfer 7i2s0i2s1jtagpciepdmpmupwm0pwm1pwm1m0-pins8pwm2pwm2m0-pins9pwm3pwm4pwm5pwm6pwm7pwrrefrgmiiscrsdio0sdio0-bus4@Jsdio0-clkKsdio0-cmdLsdio1sdio1-bus4@ Msdio1-clkNsdio1-cmdOsdmmcsdmmc-bus4@Psdmmc-clkQsdmmc-cmdRsdmmc-detSsdmmc-vol-ctrl-h^spdifspi0spi1tsi0tsi1uart0uart0m0-xfer 2uart1uart2uart3uart4uart5uart6uart7bluetoothbt-wake-host-hhost-wake-bt-hledsstate-led-bWusbusb-host-en]wifiusb-wifi-pwr[wifi-reg-on-hawifi-wake-host-hpsciarm,psci-1.0arm,psci-0.2smcreserved-memory+*shmem@10f000arm,scmi-shmemv timerarm,armv8-timer01   clock-xin24m fixed-clockn6 xin24mclock-gmac50m fixed-clock gmac0soc simple-bus*D+pcie@fe000000*rockchip,rk3528-pcierockchip,rk3568-pcie0v@Odbiapbconfig'( $1aclk_mstaclk_slvaclk_dbipclkauxzpciH1=syspmcmsglegacyerrmsiyM``n pcie-phy T* @ d b pwrpipe+ disabledlegacy-interrupt-controllerd  1yinterrupt-controller@fed01000 arm,gic-400@v @ `  1 dyqos@ff200000rockchip,rk3528-qossysconv qos@ff200080rockchip,rk3528-qossysconv qos@ff200100rockchip,rk3528-qossysconv  qos@ff200200rockchip,rk3528-qossysconv  qos@ff200280rockchip,rk3528-qossysconv  qos@ff200300rockchip,rk3528-qossysconv  qos@ff200380rockchip,rk3528-qossysconv  qos@ff210000rockchip,rk3528-qossysconv! qos@ff210080rockchip,rk3528-qossysconv! qos@ff220000rockchip,rk3528-qossysconv" qos@ff220080rockchip,rk3528-qossysconv" qos@ff240000rockchip,rk3528-qossysconv$ qos@ff250000rockchip,rk3528-qossysconv% qos@ff260000rockchip,rk3528-qossysconv& qos@ff270000rockchip,rk3528-qossysconv' qos@ff270080rockchip,rk3528-qossysconv' qos@ff270100rockchip,rk3528-qossysconv' qos@ff270200rockchip,rk3528-qossysconv'  qos@ff270280rockchip,rk3528-qossysconv' !qos@ff270300rockchip,rk3528-qossysconv' "qos@ff270380rockchip,rk3528-qossysconv' #qos@ff270480rockchip,rk3528-qossysconv' $qos@ff270500rockchip,rk3528-qossysconv' %qos@ff280000rockchip,rk3528-qossysconv( &qos@ff280080rockchip,rk3528-qossysconv( 'qos@ff280100rockchip,rk3528-qossysconv( (qos@ff280180rockchip,rk3528-qossysconv( )qos@ff280200rockchip,rk3528-qossysconv( *qos@ff280280rockchip,rk3528-qossysconv( +qos@ff280300rockchip,rk3528-qossysconv( ,qos@ff280380rockchip,rk3528-qossysconv( -qos@ff280400rockchip,rk3528-qossysconv( .syscon@ff340000rockchip,rk3528-vpu-grfsysconv4Bsyscon@ff348000$rockchip,rk3528-pipe-phy-grfsysconv4Usyscon@ff360000rockchip,rk3528-vo-grfsysconv6<clock-controller@ff4a0000rockchip,rk3528-cruvJ t          z y  LLFq;;]Q沀eр Cׄ#FsY@e 1xin24mgmac0 syscon@ff540000rockchip,rk3528-ioc-grfsysconvT power-management@ff600000&rockchip,rk3528-pmusysconsimple-mfdv` power-controller!rockchip,rk3528-power-controller+ power-domain@4v power-domain@5v disabledpower-domain@6vpower-domain@7v$ !"#$%power-domain@8v$&'()*+,-.gpu@ff700000"rockchip,rk3528-maliarm,mali-450vp @  1buscoreT1XYV\]Z["=gpgpmmupppp0ppmmu0pp1ppmmu1/  wokay0spi@ff9c0000(rockchip,rk3528-spirockchip,rk3066-spiv 1spiclkapb_pclk 111txrx + disabledspi@ff9d0000(rockchip,rk3528-spirockchip,rk3066-spiv 1spiclkapb_pclk 111txrx + disabledserial@ff9f0000&rockchip,rk3528-uartsnps,dw-apb-uartv  k1baudclkapb_pclk 1(1 1)6okay@defaultN2serial@ff9f8000&rockchip,rk3528-uartsnps,dw-apb-uartv  1baudclkapb_pclk 1)1 1  )6 disabledserial@ffa00000&rockchip,rk3528-uartsnps,dw-apb-uartv  1baudclkapb_pclk 1*1 1  )6 disabledserial@ffa08000&rockchip,rk3528-uartsnps,dw-apb-uartv  1baudclkapb_pclk 1+11 )6 disabledserial@ffa10000&rockchip,rk3528-uartsnps,dw-apb-uartv  11baudclkapb_pclk 1,11 )6 disabledserial@ffa18000&rockchip,rk3528-uartsnps,dw-apb-uartv " 1baudclkapb_pclk 1-11 )6 disabledserial@ffa20000&rockchip,rk3528-uartsnps,dw-apb-uartv % 1baudclkapb_pclk 1.11 )6 disabledserial@ffa28000&rockchip,rk3528-uartsnps,dw-apb-uartv ( 1baudclkapb_pclk 1/11 )6 disabledi2c@ffa50000(rockchip,rk3528-i2crockchip,rk3399-i2cv  1i2cpclk 1= + disabledi2c@ffa58000(rockchip,rk3528-i2crockchip,rk3399-i2cv  1i2cpclk 1> +okay@defaultN3eeprom@50belling,bl24c16aatmel,24c16vPXak4i2c@ffa60000(rockchip,rk3528-i2crockchip,rk3399-i2cv j i 1i2cpclk 1?@defaultN5+ disabledi2c@ffa68000(rockchip,rk3528-i2crockchip,rk3399-i2cv  1i2cpclk 1@ + disabledi2c@ffa70000(rockchip,rk3528-i2crockchip,rk3399-i2cv 3 2 1i2cpclk 1A@defaultN6 + disabledi2c@ffa78000(rockchip,rk3528-i2crockchip,rk3399-i2cv  1i2cpclk 1B + disabledi2c@ffa80000(rockchip,rk3528-i2crockchip,rk3399-i2cv  1i2cpclk 1C + disabledi2c@ffa88000(rockchip,rk3528-i2crockchip,rk3399-i2cv 5 4 1i2cpclk 1D@defaultN7 + disabledpwm@ffa90000(rockchip,rk3528-pwmrockchip,rk3328-pwmv o n 1pwmpclkv disabledpwm@ffa90010(rockchip,rk3528-pwmrockchip,rk3328-pwmv o n 1pwmpclkvokay@defaultN8_pwm@ffa90020(rockchip,rk3528-pwmrockchip,rk3328-pwmv  o n 1pwmpclkvokay@defaultN9`pwm@ffa90030(rockchip,rk3528-pwmrockchip,rk3328-pwmv0 o n 1pwmpclkv disabledpwm@ffa98000(rockchip,rk3528-pwmrockchip,rk3328-pwmv r q 1pwmpclkv disabledpwm@ffa98010(rockchip,rk3528-pwmrockchip,rk3328-pwmv r q 1pwmpclkv disabledpwm@ffa98020(rockchip,rk3528-pwmrockchip,rk3328-pwmv  r q 1pwmpclkv disabledpwm@ffa98030(rockchip,rk3528-pwmrockchip,rk3328-pwmv0 r q 1pwmpclkv disabledadc@ffae0000rockchip,rk3528-saradcv 1saradcapb_pclk 1  o saradc-apbokay:Vethernet@ffbd0000&rockchip,rk3528-gmacsnps,dwmac-4.20av0      >1stmmacethclk_mac_refmac_clk_rxmac_clk_txpclk_macaclk_mac1qt=macirqeth_wake_irq;rmii   stmmaceth<=>? disabledmdiosnps,dwmac-mdio+ethernet-phy@2ethernet-phy-ieee802.3-c22v "@defaultN@A ;stmmac-axi-config/=rx-queues-config?>queue0tx-queues-configU?queue0ethernet@ffbe0000&rockchip,rk3528-gmacsnps,dwmac-4.20av (1stmmacethclk_mac_refpclk_macaclk_mac1y|=macirqeth_wake_irq  a stmmacethBCDE disabledmdiosnps,dwmac-mdio+stmmac-axi-config/Crx-queues-config?Dqueue0tx-queues-configUEqueue0mmc@ffbf00000rockchip,rk3528-dwcmshcrockchip,rk3588-dwcmshcv   n6 ( 1corebusaxiblocktimer 1k @defaultNFGHI ( A B C D Ecorebusaxiblocktimerokayy4:mmc@ffc100000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshcv@  1biuciuciu-driveciu-sample 1k @default NJKL  greset disabledmmc@ffc200000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshcv@  1biuciuciu-driveciu-sample 1k @default NMNO  hreset disabledmmc@ffc300000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshcv@ ( '  1biuciuciu-driveciu-sample 1k@defaultNPQRS  resetZokayy4Tdma-controller@ffd60000arm,pl330arm,primecellv@ ^ 1apb_pclkl1,71phy@ffdc0000rockchip,rk3528-naneng-combphyv { {  1refapbpipe  c ephyapbNYBkU disabledchosenserial0:1500000n8adc-keys adc-keysVbuttonsw@dbutton-maskromMASKROMleds gpio-leds@defaultNWled-0on heartbeat X  heartbeatregulator-0v9-vddregulator-fixed6vdd_0v9EYk  Yregulator-1v1-vcc-ddrregulator-fixed6vcc_ddrEYkYregulator-1v8-vccregulator-fixed6vcc_1v8EYkw@w@4:regulator-3v3-vccregulator-fixed6vcc_3v3EYk2Z2ZY4regulator-3v3-vcc-wifiregulator-fixed Z@defaultN[ 6vcc_wifik2Z2Z4regulator-5v0-vcc-sysregulator-fixed 6vcc5v0_sysEYkLK@LK@Yregulator-5v0-vcc-usb20regulator-fixed \@defaultN] 6vcc5v0_usb20kLK@LK@Yregulator-vccio-sdregulator-gpio X@defaultN^ 6vccio_sdkw@2Zw@2ZYTregulator-vdd-armpwm-regulator_Y6vdd_armEYk bShregulator-vdd-logicpwm-regulator`Y 6vdd_logicEYk Y0rfkill rfkill-gpio rfkill-wlan@defaultNawlan X compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c1mmc0mmc1serial0cpuregdevice_typeenable-methodclocksoperating-points-v2cpu-supplyphandlearm,smc-idshmem#clock-cellsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,grfrangesinterruptsgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellspower-domainsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsno-mapclock-frequencyclock-output-namesreg-namesbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-lanesphysphy-namesresetsreset-namesstatusassigned-clocksassigned-clock-rates#reset-cells#power-domain-cellspm_qosmali-supplydmasdma-namesreg-io-widthreg-shiftpinctrl-namespinctrl-0pagesizeread-onlyvcc-supply#pwm-cells#io-channel-cellsvref-supplyphy-handlephy-modesnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-is-integratedsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usemax-frequencybus-widthcap-mmc-highspeedmmc-hs200-1_8vno-sdno-sdionon-removablevmmc-supplyvqmmc-supplyfifo-depthrockchip,default-sample-phasecap-sd-highspeeddisable-wpsd-uhs-sdr104#dma-cellsarm,pl330-periph-burst#phy-cellsrockchip,pipe-grfrockchip,pipe-phy-grfstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolordefault-statefunctiongpioslinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highstatespwmspwm-supplyregulator-settling-time-up-usradio-typeshutdown-gpios