s8ބ(L ,anbernic,rg503rockchip,rk35667handsetDAnbernic RG503aliasesJ/pinctrl/gpio@fdd60000P/pinctrl/gpio@fe740000V/pinctrl/gpio@fe750000\/pinctrl/gpio@fe760000b/pinctrl/gpio@fe770000h/i2c@fdd40000m/i2c@fe5a0000r/i2c@fe5b0000w/i2c@fe5c0000|/i2c@fe5d0000/i2c@fe5e0000/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe2c0000/mmc@fe000000cpus cpu@0cpu,arm,cortex-a55 psci-:@LYf@x cpu@100cpu,arm,cortex-a55 psci-:@LYf@x cpu@200cpu,arm,cortex-a55 psci-:@LYf@x cpu@300cpu,arm,cortex-a55 psci-:@LYf@x l3-cache,cache/<@Ndisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc݂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s+Eokaysimple-audio-card,codecLsimple-audio-card,cpuL pmu,arm,cortex-a55-pmu0Va psci ,arm,psci-1.0&smcreserved-memory tshmem@10f000,arm,scmi-shmem{timer,arm,armv8-timer0V   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob V_ sata-phy Edisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob V` sata-phy Edisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ V ref_clksuspend_clkbus_clk peripheral utmi_wide 'Eokay usb2-phy@ Ghigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ V ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide 'Eokayinterrupt-controller@fd400000 ,arm,gic-v3 @F V Uj{A(t msi-controller@fd440000,arm,gic-v3-itsD_usb@fd800000 ,generic-ehci V usb Edisabledusb@fd840000 ,generic-ohci V usb Edisabledusb@fd880000 ,generic-ehci V usbEokayusb@fd8c0000 ,generic-ohci V usbEokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd]io-domains&,rockchip,rk3568-pmu-io-voltage-domainEokaysyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru*clock-controller@fdd20000,rockchip,rk3568-cru xin24m* 7GG e\si2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c V. - i2cpclk default Eokaypmic@20,rockchip,rk817 !Vrk808-clkout1rk808-clkout2mclk H7H\default"#$$$$$$$$%regulatorsDCDC_REG1 1 Ipaqv vdd_logicregulator-state-mem DCDC_REG2 1 Ipaqvvdd_gpuEregulator-state-memDCDC_REG3 vvcc_ddrregulator-state-memDCDC_REG4 12ZI2Zvvcc_3v3regulator-state-mem2ZLDO_REG1 1w@Iw@ vcca1v8_pmuNregulator-state-memw@LDO_REG2 1 I  vdda_0v9regulator-state-memLDO_REG3 1 I  vdda0v9_pmuregulator-state-mem LDO_REG4 12ZI2Z vccio_acodecregulator-state-memLDO_REG5 1w@I2Z vccio_sdregulator-state-memLDO_REG6 12ZI2Z vcc3v3_pmuregulator-state-mem2ZLDO_REG7 1w@Iw@vcc_1v8regulator-state-memLDO_REG8 1w@I2Z vcc1v8_dvpregulator-state-memLDO_REG9 1*I* vcc2v8_dvpregulator-state-memBOOST 1G`IReboost%regulator-state-memOTG_SWITCH otg_switchregulator-state-memcharger&'Dregulator@40 ,fcs,fan53555@k 1 4I5vdd_cpua$regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Vt  ,baudclkapb_pclk''(default Edisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultEokaypwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default Edisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0 pwmpclk+default Edisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0 pwmpclk,default Edisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7 -power-domain@8  ./0power-domain@9   123power-domain@10  456789power-domain@11  :power-domain@13  ;power-domain@14  <=>power-domain@15 ?@ABCgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$V()' jobmmugpu gpubusEokayDEvideo-codec@fdea0400,rockchip,rk3568-vpu Vvdpu  aclkhclkF iommu@fdea0800,rockchip,rk3568-iommu@ V aclkiface  Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga VZ aclkhclksclk &$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu V@  aclkhclkG iommu@fdee0800,rockchip,rk3568-iommu@ V?  aclkiface Gvideo-capture@fdfe0000,rockchip,rk3568-vicap V7G  aclkhclkdclkiclkH( arsthrstdrstprstirsts Edisabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu V  aclkiface EdisabledHmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Vd  biuciuciu-driveciu-sample,7р resetEokayEO`mI JKLdefaultMNethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aV macirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref  stmmacethsOPQ Edisabledmdio,snps,dwmac-mdio stmmac-axi-config)9Orx-queues-configIPqueue0tx-queues-config_Qqueue0vop@fe040000 0@uvopgamma-lut V( %aclkhclkdclk_vp0dclk_vp1dclk_vp2R sEokay,rockchip,rk3566-vop7\ports port@0 endpoint@2S[port@1 endpoint@4TVport@2 iommu@fe043e00,rockchip,rk3568-iommu >? V  aclkiface EokayRdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi VDpclk dphyU apb sEokayports port@0endpointVTport@1endpointWdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi VEpclk dphyX apb s Edisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  V-( (iahbisfrcecrefdefaultY sEokayZports port@0endpoint[Sport@1endpoint\qos@fe128000,rockchip,rk3568-qossyscon -qos@fe138080,rockchip,rk3568-qossyscon <qos@fe138100,rockchip,rk3568-qossyscon =qos@fe138180,rockchip,rk3568-qossyscon >qos@fe148000,rockchip,rk3568-qossyscon .qos@fe148080,rockchip,rk3568-qossyscon /qos@fe148100,rockchip,rk3568-qossyscon 0qos@fe150000,rockchip,rk3568-qossyscon :qos@fe158000,rockchip,rk3568-qossyscon 4qos@fe158100,rockchip,rk3568-qossyscon 5qos@fe158180,rockchip,rk3568-qossyscon 6qos@fe158200,rockchip,rk3568-qossyscon 7qos@fe158280,rockchip,rk3568-qossyscon 8qos@fe158300,rockchip,rk3568-qossyscon 9qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ?qos@fe190280,rockchip,rk3568-qossyscon @qos@fe190300,rockchip,rk3568-qossyscon Aqos@fe190380,rockchip,rk3568-qossyscon Bqos@fe190400,rockchip,rk3568-qossyscon Cqos@fe198000,rockchip,rk3568-qossyscon ;qos@fe1a8000,rockchip,rk3568-qossyscon 1qos@fe1a8080,rockchip,rk3568-qossyscon 2qos@fe1a8100,rockchip,rk3568-qossyscon 3dfi@fe230000,rockchip,rk3568-dfi# V ]pcie@fe260000,rockchip,rk3568-pcie0@&udbiapbconfig<VKJIHGsyspmcmsglegacyerr( $aclk_mstaclk_slvaclk_dbipclkauxpcij`^^^^  _  pcie-phyTt @ pipe  Edisabledlegacy-interrupt-controllerjU VH^mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Vb  biuciuciu-driveciu-sample,7р resetEokayEO #! ,`abcdefault 7mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Vc  biuciuciu-driveciu-sample,7р resetEokayEO #d  ,efghdefault 7spi@fe300000 ,rockchip,sfc0@ Ve xvclk_sfchclk_sfcidefault Edisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 V7{}G n6( |zy{}corebusaxiblocktimer Edisabledrng@fe388000,rockchip,rk3568-rng8@ po coreahb m Edisabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ V47=AGFqFq ?C9mclk_txmclk_rxhclkj Etx PQ tx-mrx-msEokay i2s@fe410000,rockchip,rk3568-i2s-tdmA V57EIGFqFq GK:mclk_txmclk_rxhclkjj Erxtx RS tx-mrx-msdefaultklmnEokay Oi2s@fe420000,rockchip,rk3568-i2s-tdmB V67MGFq OO;mclk_txmclk_rxhclkjj Etxrx Ttx-msdefaultopqr Edisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC V7 SW<mclk_txmclk_rxhclkjj Etxrx UV tx-mrx-ms Edisabledpdm@fe440000,rockchip,rk3568-pdmD VL ZYpdm_clkpdm_hclkj  Erxstuvwxdefault Xpdm-m Edisabledspdif@fe460000,rockchip,rk3568-spdifF Vf mclkhclk _\j Etxdefaulty Edisableddma-controller@fe530000,arm,pl330arm,primecellS@V  j   apb_pclk 'dma-controller@fe550000,arm,pl330arm,primecellU@V j   apb_pclk ji2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ V/ HG i2cpclkzdefault  Edisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ V0 JI i2cpclk{default  Edisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ V1 LK i2cpclk|default  Edisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] V2 NM i2cpclk}default  Edisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ V3 PO i2cpclk~default EokayZwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` V  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia Vg RQspiclkapb_pclk'' Etxrxdefault   Edisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib Vh TSspiclkapb_pclk'' Etxrxdefault   Edisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic Vi VUspiclkapb_pclk'' Etxrxdefault   Edisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid Vj XWspiclkapb_pclk'' Etxrxdefault   Edisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Vu baudclkapb_pclk'' defaultEokay bluetooth*,realtek,rtl8821cs-btrealtek,rtl8723bs-bt   serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Vv # baudclkapb_pclk''defaultEokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Vw '$baudclkapb_pclk''default Edisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Vx +(baudclkapb_pclk'' default Edisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Vy /,baudclkapb_pclk' ' default Edisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Vz 30baudclkapb_pclk' ' default Edisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk V{ 74baudclkapb_pclk''default Edisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl V| ;8baudclkapb_pclk''default Edisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm V} ?<baudclkapb_pclk''default Edisabledthermal-zonescpu-thermal d  tripscpu_alert0 p ?passivecpu_alert1 $ ?passivecpu_crit s  ?criticalcooling-mapsmap0 0  gpu-thermal   tripsgpu-threshold p ?passivegpu-target $ ?passivegpu-crit s  ?criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq Vs7Gf@ ` tsadcapb_pclk s *sdefaultsleep A KEokay a xsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr V] saradcapb_pclk  saradc-apb Eokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault Edisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultEokaypwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY pwmpclkdefaultEokaypwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY pwmpclkdefaultEokaypwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault Edisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault Edisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\ pwmpclkdefault Edisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\ pwmpclkdefault Edisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault Edisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault Edisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_ pwmpclkdefault Edisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_ pwmpclkdefault Edisabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipe7"G phy   Eokayphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipe7%G phy    Edisabledphy@fe870000,rockchip,rk3568-csi-dphy ypclk  apbs Edisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclk z  apb EokayUmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk {  apb  EdisabledXusb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkclk_usbphy0_480m V Eokayhost-port  Edisabledotg-port Eokayusb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkclk_usbphy1_480m V Eokayhost-port Eokayotg-port  Edisabledpinctrl,rockchip,rk3568-pinctrls] tgpio@fdd60000,rockchip,gpio-bank V! .     Uj!gpio@fe740000,rockchip,gpio-bankt V" cd    Ujgpio@fe750000,rockchip,gpio-banku V# ef  @  Ujdgpio@fe760000,rockchip,gpio-bankv V$ gh  `  Ujgpio@fe770000,rockchip,gpio-bankw V% ij    Ujpcfg-pull-up pcfg-pull-none )pcfg-pull-none-drv-level-1 ) 6pcfg-pull-none-drv-level-2 ) 6pcfg-pull-none-drv-level-3 ) 6pcfg-pull-up-drv-level-1  6pcfg-pull-up-drv-level-2  6pcfg-pull-none-smt ) Epcfg-output-low Zacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ecpuebcedpdpemmceth0eth1flashfspifspi-pins` eigmac0gmac1gpuhdmitxhdmitxm0-cec eYi2c0i2c0-xfer e   i2c1i2c1-xfer e  zi2c2i2c2m0-xfer e {i2c3i2c3m0-xfer e|i2c4i2c4m0-xfer e  }i2c5i2c5m1-xfer e~i2s1i2s1m0-lrcktx eli2s1m0-mclk e"i2s1m0-sclktx eki2s1m0-sdi0 e mi2s1m0-sdo0 eni2s2i2s2m0-lrcktx epi2s2m0-sclktx eoi2s2m0-sdi eqi2s2m0-sdo eri2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk espdmm0-clk1 etpdmm0-sdi0 e updmm0-sdi1 e vpdmm0-sdi2 e wpdmm0-sdi3 expmicpmic-int-l e#pmupwm0pwm0m1-pins e)pwm1pwm1m0-pins e*pwm2pwm2m0-pins e+pwm3pwm3-pins e,pwm4pwm4-pins epwm5pwm5-pins epwm6pwm6-pins epwm7pwm7-pins epwm8pwm8m0-pins e pwm9pwm9m0-pins e pwm10pwm10m0-pins e pwm11pwm11m0-pins epwm12pwm12m0-pins epwm13pwm13m0-pins epwm14pwm14m0-pins epwm15pwm15m0-pins erefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ e`sdmmc0-clk easdmmc0-cmd ebsdmmc0-det ecsdmmc1sdmmc1-bus4@ eesdmmc1-clk egsdmmc1-cmd efsdmmc1-det e hsdmmc2sdmmc2m0-bus4@ eJsdmmc2m0-clk eLsdmmc2m0-cmd eKspdifspdifm0-tx eyspi0spi0m0-pins0 e spi0m0-cs0 espi0m0-cs1 espi1spi1m0-pins0 e spi1m0-cs0 espi1m0-cs1 espi2spi2m0-pins0 espi2m0-cs0 espi2m0-cs1 espi3spi3m0-pins0 e  spi3m0-cs0 espi3m0-cs1 etsadctsadc-shutorg etsadc-pin euart0uart0-xfer e(uart1uart1m1-xfer euart1m1-ctsn euart1m1-rtsn euart2uart2m0-xfer euart3uart3m0-xfer euart4uart4m0-xfer euart5uart5m0-xfer euart6uart6m0-xfer euart7uart7m0-xfer euart8uart8m0-xfer euart9uart9m0-xfer evopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2gpio-btnsbtn-pins-ctrl e     btn-pins-vol ejoy-muxjoy-mux-en e sdio-pwrseqwifi-enable-h evcc3v3-lcdvcc-lcd-h evcc-wifivcc-wifi-h eaudio-amplifierspk-amp-enable-h egpio-lcdlcd-reset egpio-spispi-pins0 e opp-table-0,operating-points-v2 sopp-408000000 ~Q P P0 @opp-600000000 ~#F P P0 @opp-816000000 ~0, P P0 @ opp-1104000000 ~Aʹ 0 @opp-1416000000 ~Tfr 0 @opp-1608000000 ~_" 0 @opp-1800000000 ~kI 000 @opp-table-1,operating-points-v2Dopp-200000000 ~  P PB@opp-300000000 ~ P PB@opp-400000000 ~ׄ P PB@opp-600000000 ~#F B@opp-700000000 ~)' ~~B@opp-800000000 ~/ B@B@B@chosen serial2:1500000n8adc-keys ,adc-keys  buttons w@ <button-mode MODE < gpio-keys-control ,gpio-keysdefaultbutton-b & SOUTH 0button-down & DPAD-DOWN !button-l1 &  TL 6button-l2 &  TL2 8button-select & SELECT :button-start &  START ;button-up & DPAD-UP  button-x & NORTH 3button-a & EAST 1button-left & DPAD-LEFT "button-right & DPAD-RIGHT #button-r1 &  TR 7button-r2 &  TR2 9button-thumbl & THUMBL =button-thumbr & THUMBR >button-y & WEST 4gpio-keys-vol ,gpio-keys ,defaultbutton-vol-down & VOLUMEDOWN rbutton-vol-up & VOLUMEUP shdmi-con,hdmi-connectorZ?cportendpoint\pwm-leds ,pwm-ledsled-0 7 =on Kpower T caled-1 7 Kcharging T caled-2 7 =off Kstatus T casdio-pwrseq,mmc-pwrseq-simple  ext_clockdefault h Iregulator-vcc3v3-lcd0,regulator-fixed ! default12ZI2Zvcc3v3_lcd0_nregulator-state-memregulator-vcc-sys,regulator-fixed 19I9vcc_sys$regulator-vcc-wifi,regulator-fixed  !default 12ZI2Z vcc_wifiMpwm-vibrator ,pwm-vibrator enable c;adc-joystick ,adc-joystick default < axis@0    axis@1    axis@2    axis@3    adc-mux,io-channel-mux left_xright_xleft_yright_y   parent  dbattery,simple-battery 4  $ I@@ o ? 3@  ?d=_<ʀZ;U;P:aPK9XF9(A8<827727[-7`(6#66}8635Ɉ5H 43@&mux-controller ,gpio-mux !!spi ,spi-gpiodefault    ! ,5panel@0,samsung,ams495qa01default EportendpointWsound,simple-audio-card rk817_extPi2s k+CMicrophoneMic JackHeadphoneHeadphonesSpeakerInternal SpeakersMICLMic JackHeadphonesHPOLHeadphonesHPORInternal SpeakersSpeaker Amp OUTLInternal SpeakersSpeaker Amp OUTRSpeaker Amp INLHPOLSpeaker Amp INRHPORInternal Speakerssimple-audio-card,codecLsimple-audio-card,cpuLaudio-amplifier,simple-audio-amplifier default Speaker Amp interrupt-parent#address-cells#size-cellscompatiblechassis-typemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grf#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendmonitored-batteryrockchip,resistor-sense-micro-ohmsrockchip,sleep-enter-current-microamprockchip,sleep-filter-current-microampfcs,suspend-voltage-selectorvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencybus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-mmcno-sdnon-removablesd-uhs-sdr50vmmc-supplyvqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointddc-i2c-busrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanescd-gpiosdisable-wpsd-uhs-sdr104dma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enableoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltautorepeatcolordefault-statefunctionmax-brightnesspwmspost-power-on-delay-msreset-gpiosgpioenable-active-highpwm-namesabs-flatabs-fuzzabs-rangemux-controlssettle-time-uscharge-full-design-microamp-hourscharge-term-current-microampconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltfactory-internal-resistance-micro-ohmsvoltage-max-design-microvoltvoltage-min-design-microvoltocv-capacity-celsiusocv-capacity-table-0mux-gpios#mux-control-cellssck-gpiosmosi-gpioscs-gpiosnum-chipselectsvdd-supplysimple-audio-card,aux-devssimple-audio-card,hp-det-gpiossimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,pin-switchessound-name-prefix