R8(( * ),rockchip,rk3566-box-demorockchip,rk35667Rockchip RK3566 BOX DEMO Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe310000/mmc@fe2b0000/mmc@fe2c0000cpus cpu@0cpu,arm,cortex-a55 psci*7@IVc@u cpu@100cpu,arm,cortex-a55 psci*7@IVc@u cpu@200cpu,arm,cortex-a55 psci*7@IVc@u cpu@300cpu,arm,cortex-a55 psci*7@IVc@u l3-cache,cache,9@Kdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcڂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s(Bokaysimple-audio-card,codecIsimple-audio-card,cpuI pmu,arm,cortex-a55-pmu0S^ psci ,arm,psci-1.0#smcreserved-memory qshmem@10f000,arm,scmi-shmemxtimer,arm,armv8-timer0S   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob S_ sata-phy Bdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob S` sata-phy Bdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Sref_clksuspend_clkbus_clk otg utmi_wide$ Bdisabled usb2-phy= Dhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Sref_clksuspend_clkbus_clk host usb2-phyusb3-phy utmi_wide$Bokayinterrupt-controller@fd400000 ,arm,gic-v3 @F S RgxA(q msi-controller@fd440000,arm,gic-v3-itsDWusb@fd800000 ,generic-ehci SusbBokayusb@fd840000 ,generic-ohci SusbBokayusb@fd880000 ,generic-ehci SusbBokayusb@fd8c0000 ,generic-ohci SusbBokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdUio-domains&,rockchip,rk3568-pmu-io-voltage-domainBokay syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucruclock-controller@fdd20000,rockchip,rk3568-cruxin24m& 6G Kbi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c S.- i2cpclkdefault  Bdisabledserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart St ,baudclkapb_pclkodefaultt Bdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk defaultBokaypwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk!defaultBokaypwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk"default Bdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk#default Bdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7$power-domain@8 %&'power-domain@9  ()*power-domain@10 +,-./0power-domain@11 1power-domain@13 2power-domain@14 345power-domain@156789:gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$S()' jobmmugpugpubus Bokay;video-codec@fdea0400,rockchip,rk3568-vpu Svdpu aclkhclk< Bokayiommu@fdea0800,rockchip,rk3568-iommu@ S aclkiface Bokay<rga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga SZaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu S@ aclkhclk= iommu@fdee0800,rockchip,rk3568-iommu@ S? aclkiface =video-capture@fdfe0000,rockchip,rk3568-vicap S&6 aclkhclkdclkiclk>(arsthrstdrstprstirstb Bdisabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu S aclkiface Bdisabled>mmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Sd biuciuciu-driveciu-sampleрreset Bdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aS macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethb?%6@IA\Bokay& KBergmiininputdefaultCDEFGH {I N O-Jmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22Jstmmac-axi-config?rx-queues-config@queue0tx-queues-configAqueue0vop@fe040000 0@)vopgamma-lut S(%aclkhclkdclk_vp0dclk_vp1dclk_vp2K bBokay,rockchip,rk3566-vop&Kports port@0 endpoint@23LSport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? S aclkiface BokayKdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi SDpclkdphyM apbb Bdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi SEpclkdphyN apbb Bdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  S-((iahbisfrcecrefdefault OPQ tbCBokay&6TRdports port@0endpoint3SLport@1endpoint3Tqos@fe128000,rockchip,rk3568-qossyscon $qos@fe138080,rockchip,rk3568-qossyscon 3qos@fe138100,rockchip,rk3568-qossyscon 4qos@fe138180,rockchip,rk3568-qossyscon 5qos@fe148000,rockchip,rk3568-qossyscon %qos@fe148080,rockchip,rk3568-qossyscon &qos@fe148100,rockchip,rk3568-qossyscon 'qos@fe150000,rockchip,rk3568-qossyscon 1qos@fe158000,rockchip,rk3568-qossyscon +qos@fe158100,rockchip,rk3568-qossyscon ,qos@fe158180,rockchip,rk3568-qossyscon -qos@fe158200,rockchip,rk3568-qossyscon .qos@fe158280,rockchip,rk3568-qossyscon /qos@fe158300,rockchip,rk3568-qossyscon 0qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon 6qos@fe190280,rockchip,rk3568-qossyscon 7qos@fe190300,rockchip,rk3568-qossyscon 8qos@fe190380,rockchip,rk3568-qossyscon 9qos@fe190400,rockchip,rk3568-qossyscon :qos@fe198000,rockchip,rk3568-qossyscon 2qos@fe1a8000,rockchip,rk3568-qossyscon (qos@fe1a8080,rockchip,rk3568-qossyscon )qos@fe1a8100,rockchip,rk3568-qossyscon *dfi@fe230000,rockchip,rk3568-dfi# S tUpcie@fe260000,rockchip,rk3568-pcie0@&)dbiapbconfig<SKJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpcig`VVVVW pcie-phyTq @pipe  Bdisabledlegacy-interrupt-controllergR SHVmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Sb biuciuciu-driveciu-sampleрresetBokay X defaultYZ[\+mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Sc biuciuciu-driveciu-sampleрresetBokay р7DRh]sdefault ^_`+wifi@1,brcm,bcm4329-fmacaS  host-wakedefaultbspi@fe300000 ,rockchip,sfc0@ Sexvclk_sfchclk_sfccdefault Bdisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 S&{}6 n6(|zy{}corebusaxiblocktimerBokaysrng@fe388000,rockchip,rk3568-rng8@po coreahbm Bdisabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ S4&=A6FqFq?C9mclk_txmclk_rxhclkodtxPQ tx-mrx-mbCBokay i2s@fe410000,rockchip,rk3568-i2s-tdmA S5&EI6FqFqGK:mclk_txmclk_rxhclkoddrxtxRS tx-mrx-mbdefault0efghijklmnopCBokayi2s@fe420000,rockchip,rk3568-i2s-tdmB S6&M6FqOO;mclk_txmclk_rxhclkoddtxrxTtx-mbdefaultqrstC Bdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC S7SW<mclk_txmclk_rxhclkoddtxrxUV tx-mrx-mbC Bdisabledpdm@fe440000,rockchip,rk3568-pdmD SLZYpdm_clkpdm_hclkod rxuvwxyzdefaultXpdm-mC Bdisabledspdif@fe460000,rockchip,rk3568-spdifF Sf mclkhclk_\odtxdefault{CBokaydma-controller@fe530000,arm,pl330arm,primecellS@S   apb_pclkdma-controller@fe550000,arm,pl330arm,primecellU@S  apb_pclkdi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ S/HG i2cpclk|default  Bdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ S0JI i2cpclk}default  Bdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ S1LK i2cpclk~default  Bdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] S2NM i2cpclkdefault  Bdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ S3PO i2cpclkdefault  Bdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` S tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia SgRQspiclkapb_pclkotxrxdefault   Bdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib ShTSspiclkapb_pclkotxrxdefault  Bdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic SiVUspiclkapb_pclkotxrxdefault   Bdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid SjXWspiclkapb_pclkotxrxdefault   Bdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Subaudclkapb_pclkodefaulttBokaybluetooth,brcm,bcm43438-bttxco a a adefault )5serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Sv# baudclkapb_pclkodefaulttBokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Sw'$baudclkapb_pclkodefaultt Bdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Sx+(baudclkapb_pclko defaultt Bdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Sy/,baudclkapb_pclko  defaultt Bdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Sz30baudclkapb_pclko  defaultt Bdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk S{74baudclkapb_pclkodefaultt Bdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl S|;8baudclkapb_pclkodefaultt Bdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm S}?<baudclkapb_pclkodefaultt Bdisabledthermal-zonescpu-thermalBdXftripscpu_alert0vppassivecpu_alert1v$passivecpu_critvs criticalcooling-mapsmap00 gpu-thermalBXftripsgpu-thresholdvppassivegpu-targetv$passivegpu-critvs criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq Ss&6f@ `tsadcapb_pclkbsdefaultsleepBokaysaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr S]saradcapb_pclk saradc-apb  Bdisabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault Bdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault Bdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault Bdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault Bdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault Bdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault Bdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault Bdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault Bdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault Bdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault Bdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault Bdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault Bdisabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe&"6phy  . DBokayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe&%6phy  . DBokayphy@fe870000,rockchip,rk3568-csi-dphyypclk Dapbb Bdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz D apb BdisabledMmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ D apb BdisabledNusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m S O Bdisabledhost-port DBokay _otg-port DBokay _usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m S OBokayhost-port DBokay _otg-port DBokay _pinctrl,rockchip,rk3568-pinctrlbtU qgpio@fdd60000,rockchip,gpio-bank S!.  j z  RgXgpio@fe740000,rockchip,gpio-bankt S"cd j z  Rggpio@fe750000,rockchip,gpio-banku S#ef j z@  Rgagpio@fe760000,rockchip,gpio-bankv S$gh j z`  Rggpio@fe770000,rockchip,gpio-bankw S%ij j z  RgIpcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmceth0eth1flashfspifspi-pins` cgmac0gmac1gmac1m1-miim Cgmac1m1-clkinout Hgmac1m1-rx-bus20  Egmac1m1-tx-bus20 Dgmac1m1-rgmii-clk Fgmac1m1-rgmii-bus@ Ggpuhdmitxhdmitxm0-cec Qhdmitx-scl Ohdmitx-sda Pi2c0i2c0-xfer  i2c1i2c1-xfer  |i2c2i2c2m0-xfer }i2c3i2c3m0-xfer ~i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrckrx hi2s1m0-lrcktx gi2s1m0-sclkrx fi2s1m0-sclktx ei2s1m0-sdi0  ii2s1m0-sdi1  ji2s1m0-sdi2  ki2s1m0-sdi3 li2s1m0-sdo0 mi2s1m0-sdo1 ni2s1m0-sdo2  oi2s1m0-sdo3  pi2s2i2s2m0-lrcktx ri2s2m0-sclktx qi2s2m0-sdi si2s2m0-sdo ti2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk updmm0-clk1 vpdmm0-sdi0  wpdmm0-sdi1  xpdmm0-sdi2  ypdmm0-sdi3 zpmicpmupwm0pwm0m0-pins  pwm1pwm1m0-pins !pwm2pwm2m0-pins "pwm3pwm3-pins #pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ Ysdmmc0-clk Zsdmmc0-cmd [sdmmc0-det \sdmmc1sdmmc1-bus4@ ^sdmmc1-clk `sdmmc1-cmd _sdmmc2spdifspdifm0-tx {spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer uart1uart1m0-xfer   uart1m0-ctsn uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h bt-host-wake-l bt-wake-l sdio-pwrseqwifi-enable-h  wifi-host-wake-l  bwifi-32k usbvcc5v0_usb_host_en vcc5v0_usb2_otg_en irir-int ledled_work_en opp-table-0,operating-points-v2 opp-408000000 Q P P0 @opp-600000000 #F P P0 @opp-816000000 0, P P0 @ opp-1104000000 Aʹ 0 @opp-1416000000 Tfr 0 @opp-1608000000 _" 0 @opp-1800000000 kI 000 @opp-table-1,operating-points-v2;opp-200000000  P PB@opp-300000000  P PB@opp-400000000 ׄ P PB@opp-600000000 #F B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@chosen *serial2:1500000n8external-gmac1-clock ,fixed-clocksY@ gmac1_clkinBhdmi-con,hdmi-connectoraportendpoint3Tir-receiver,gpio-ir-receiver I 6rc-beelink-gs1Bokayleds ,gpio-ledsled-0 X Hheartbeat Q Wheartbeatdefaultsdio-pwrseqBokay,mmc-pwrseq-simple ext_clockdefault ma ]spdif-dit,linux,spdif-ditCspdif-sound,simple-audio-cardSPDIFsimple-audio-card,cpuIsimple-audio-card,codecIregulator-vcc12v0-dcin,regulator-fixed yvcc12v0_dcin    regulator-vcc5v0-sys,regulator-fixed yvcc5v0_sys   LK@ LK@ regulator-vcc3v3-sys,regulator-fixed yvcc3v3_sys   2Z 2Z regulator-vcc-3v3,regulator-fixed yvcc_3v3   2Z 2Z regulator-vcc5v0-usb-host,regulator-fixed  Xdefault yvcc5v0_usb_host LK@ LK@ regulator-vcc5v0-usb2-otg,regulator-fixed  Xdefault yvcc5v0_usb_otg LK@ LK@ regulator-vcca-1v8,regulator-fixed yvcca_1v8   w@ w@ regulator-vdda-0v9,regulator-fixed yvdda_0v9     Rregulator-vdd-fixed,regulator-fixed yvdd_fixed ~ ~   regulator-vdd-cpu,pwm-regulator  yvdd_cpu 5 O    regulator-vdd-logic,pwm-regulator  yvdd_logic 5      interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grfdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpvmmc-supplycap-sdio-irqsd-uhs-sdr104keep-power-in-suspendmmc-pwrseqnon-removablevqmmc-supplymmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathlinux,rc-map-namefunctioncolorlinux,default-triggerreset-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highpwmsregulator-settling-time-up-uspwm-supply