P8Р( h ",lckfb,tspi-rk3566rockchip,rk35667LCKFB Taishan Pi RK3566aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe310000/mmc@fe2c0000cpus cpu@0cpu,arm,cortex-a55psci -@?LY@kx cpu@100cpu,arm,cortex-a55psci -@?LY@kx cpu@200cpu,arm,cortex-a55psci -@?LY@kx cpu@300cpu,arm,cortex-a55psci -@?LY@kx l3-cache,cache"/@Adisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcЂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s8okaysimple-audio-card,codec?simple-audio-card,cpu? pmu,arm,cortex-a55-pmu0IT psci ,arm,psci-1.0smcreserved-memory gshmem@10f000,arm,scmi-shmemnramoops@110000,ramoopsutimer,arm,armv8-timer0I   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob I_ sata-phy# 8disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob I` sata-phy# 8disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Iref_clksuspend_clkbus_clk1otg 9utmi_wide#BI8okay usb2-phyb ihigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Iref_clksuspend_clkbus_clk1host usb2-phyusb3-phy 9utmi_wide#BI8okayinterrupt-controller@fd400000 ,arm,gic-v3 @F I wA(g msi-controller@fd440000,arm,gic-v3-itsDXusb@fd800000 ,generic-ehci Iusb8okayusb@fd840000 ,generic-ohci Iusb8okayusb@fd880000 ,generic-ehci Iusb8okayusb@fd8c0000 ,generic-ohci Iusb8okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdVio-domains&,rockchip,rk3568-pmu-io-voltage-domain8okay"0>Lreboot-mode,syscon-reboot-modeZaRBmRByRBRB syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucruclock-controller@fdd20000,rockchip,rk3568-cruxin24m G i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c I.- i2cpclk default 8okayregulator@1c ,tcs,tcs4525 vdd_cpu-? 5W0o!regulator-state-mempmic@20,rockchip,rk809 Hrk808-clkout1rk808-clkout2mclkH"Idefault#$%%%%%%'%3%?%regulatorsDCDC_REG1  vdd_logic-? WpoqKregulator-state-memDCDC_REG2 vdd_gpu-? WpoqKDregulator-state-memDCDC_REG3 vcc_ddr-Kregulator-state-membDCDC_REG4 vdd_npu-? WpoqKregulator-state-memLDO_REG1 vdda0v9_image-? W Rregulator-state-memLDO_REG2  vdda_0v9-? W regulator-state-memLDO_REG3  vdda0v9_pmu-? W regulator-state-membz LDO_REG4  vccio_acodec-?2ZW2Zregulator-state-memLDO_REG5  vccio_sd-?w@W2Zregulator-state-memLDO_REG6  vcc3v3_pmu-?2ZW2Zregulator-state-membz2ZLDO_REG7  vcca_1v8-?w@Ww@regulator-state-memLDO_REG8  vcca1v8_pmu-?w@Ww@regulator-state-membzw@LDO_REG9 vcca1v8_image-?w@Ww@Sregulator-state-memDCDC_REG5 vcc_1v8-?w@Ww@regulator-state-memSWITCH_REG1 vcc_3v3-regulator-state-memSWITCH_REG2  vcc3v3_sd-]regulator-state-memcodecserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart It ,baudclkapb_pclk&&'default 8disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default 8disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk)default 8disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default 8disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk+default 8disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7,power-domain@8 -./power-domain@9  012power-domain@10 345678power-domain@11 9power-domain@13 :power-domain@14 ;<=power-domain@15>?@ABgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$I()' jobmmugpugpubus#8okayCDvideo-codec@fdea0400,rockchip,rk3568-vpu Ivdpu aclkhclkE# iommu@fdea0800,rockchip,rk3568-iommu@ I aclkiface# Erga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga IZaclkhclksclkB&$% %coreaxiahb# video-codec@fdee0000,rockchip,rk3568-vepu I@ aclkhclkF# iommu@fdee0800,rockchip,rk3568-iommu@ I? aclkiface# Fvideo-capture@fdfe0000,rockchip,rk3568-vicap I aclkhclkdclkiclkG#(B%arsthrstdrstprstirst 8disabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu I aclkiface#1 8disabledGmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Id biuciuciu-driveciu-sampleLWрB%reset 8disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aI macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refB %stmmacetheHuIJ 8disabledmdio,snps,dwmac-mdio stmmac-axi-configHrx-queues-configIqueue0tx-queues-configJqueue0vop@fe040000 0@ vopgamma-lut I(%aclkhclkdclk_vp0dclk_vp1dclk_vp2K# 8okay,rockchip,rk3566-vopports port@0 endpoint@2LTport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? I aclkiface# 8okayKdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi IDpclkdphyM# %apbB 8disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi IEpclkdphyN# %apbB 8disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  I-((iahbisfrcecrefdefault OPQ# 8okay%R5Sports port@0endpointTLport@1endpointUqos@fe128000,rockchip,rk3568-qossyscon ,qos@fe138080,rockchip,rk3568-qossyscon ;qos@fe138100,rockchip,rk3568-qossyscon <qos@fe138180,rockchip,rk3568-qossyscon =qos@fe148000,rockchip,rk3568-qossyscon -qos@fe148080,rockchip,rk3568-qossyscon .qos@fe148100,rockchip,rk3568-qossyscon /qos@fe150000,rockchip,rk3568-qossyscon 9qos@fe158000,rockchip,rk3568-qossyscon 3qos@fe158100,rockchip,rk3568-qossyscon 4qos@fe158180,rockchip,rk3568-qossyscon 5qos@fe158200,rockchip,rk3568-qossyscon 6qos@fe158280,rockchip,rk3568-qossyscon 7qos@fe158300,rockchip,rk3568-qossyscon 8qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon >qos@fe190280,rockchip,rk3568-qossyscon ?qos@fe190300,rockchip,rk3568-qossyscon @qos@fe190380,rockchip,rk3568-qossyscon Aqos@fe190400,rockchip,rk3568-qossyscon Bqos@fe198000,rockchip,rk3568-qossyscon :qos@fe1a8000,rockchip,rk3568-qossyscon 0qos@fe1a8080,rockchip,rk3568-qossyscon 1qos@fe1a8100,rockchip,rk3568-qossyscon 2dfi@fe230000,rockchip,rk3568-dfi# I EVpcie@fe260000,rockchip,rk3568-pcie0@& dbiapbconfig<IKJIHGsyspmcmsglegacyerrR($aclk_mstaclk_slvaclk_dbipclkauxpci\`oWWWW}X pcie-phy#Tg @B%pipe  8disabledlegacy-interrupt-controllerw IHWmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Ib biuciuciu-driveciu-sampleLWрB%reset8okaydefaultYZ[\  ] mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Ic biuciuciu-driveciu-sampleLWрB%reset8okay , 9 O^ Zdefault _`a  %  wifi@1,brcm,bcm4329-fmacbI  host-wakedefaultcspi@fe300000 ,rockchip,sfc0@ Iexvclk_sfchclk_sfcddefault 8disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 I{} n6(|zy{}corebusaxiblocktimer8okayW  Zdefaultefghi  rng@fe388000,rockchip,rk3568-rng8@po coreahbBm 8disabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ I4=AFqFq?C9mclk_txmclk_rxhclkj htxBPQ %tx-mrx-m8okay i2s@fe410000,rockchip,rk3568-i2s-tdmA I5EIFqFqGK:mclk_txmclk_rxhclkjj hrxtxBRS %tx-mrx-mdefaultklmn8okay ri2s@fe420000,rockchip,rk3568-i2s-tdmB I6MFqOO;mclk_txmclk_rxhclkjj htxrxBT%tx-mdefaultopqr8okay ri2s@fe430000,rockchip,rk3568-i2s-tdmC I7SW<mclk_txmclk_rxhclkjj htxrxBUV %tx-mrx-m 8disabledpdm@fe440000,rockchip,rk3568-pdmD ILZYpdm_clkpdm_hclkj  hrxstuvwxdefaultBX%pdm-m 8disabledspdif@fe460000,rockchip,rk3568-spdifF If mclkhclk_\j htxdefaulty 8disableddma-controller@fe530000,arm,pl330arm,primecellS@I    apb_pclk &dma-controller@fe550000,arm,pl330arm,primecellU@I   apb_pclk ji2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ I/HG i2cpclkzdefault 8okayi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ I0JI i2cpclk{default  8disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ I1LK i2cpclk|default  8disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] I2NM i2cpclk}default 8okayi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ I3PO i2cpclk~default  8disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` I tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia IgRQspiclkapb_pclk&& htxrxdefault   8disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib IhTSspiclkapb_pclk&& htxrxdefault   8disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic IiVUspiclkapb_pclk&& htxrxdefault   8disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid IjXWspiclkapb_pclk&& htxrxdefault   8disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Iubaudclkapb_pclk&& default8okay bluetooth,brcm,bcm43430a1-btlpo `default  b % serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Iv# baudclkapb_pclk&&default8okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Iw'$baudclkapb_pclk&&default 8disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Ix+(baudclkapb_pclk&& default 8disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Iy/,baudclkapb_pclk& & default 8disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Iz30baudclkapb_pclk& & default 8disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk I{74baudclkapb_pclk&&default 8disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl I|;8baudclkapb_pclk&&default 8disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm I}?<baudclkapb_pclk&&default 8disabledthermal-zonescpu-thermal d  tripscpu_alert0 %p 1passivecpu_alert1 %$ 1passivecpu_crit %s 1 criticalcooling-mapsmap0 <0 A gpu-thermal   tripsgpu-threshold %p 1passivegpu-target %$ 1passivegpu-crit %s 1 criticalcooling-mapsmap0 < Atsadc@fe710000,rockchip,rk3568-tsadcq Isf@ `tsadcapb_pclkB Psdefaultsleep g q8okay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr I]saradcapb_pclkB %saradc-apb 8okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault 8disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault 8disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault 8disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault 8disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault 8disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault 8disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault 8disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault 8disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault 8disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault 8disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault 8disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault 8disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe"B%phy   8okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe%B%phy   8okayphy@fe870000,rockchip,rk3568-csi-dphyypclk B%apb 8disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz # %apbB 8disabledMmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ # %apbB 8disabledNusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m I 8okayhost-port 8okay !otg-port 8okay !usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m I 8okayhost-port 8okay otg-port 8okay pinctrl,rockchip,rk3568-pinctrlEV ggpio@fdd60000,rockchip,gpio-bank I!.  % 5  Aw"gpio@fe740000,rockchip,gpio-bankt I"cd % 5  Awgpio@fe750000,rockchip,gpio-banku I#ef % 5@  Awbgpio@fe760000,rockchip,gpio-bankv I$gh % 5`  Awgpio@fe770000,rockchip,gpio-bankw I%ij % 5  Awpcfg-pull-up Mpcfg-pull-down Zpcfg-pull-none ipcfg-pull-none-drv-level-1 i vpcfg-pull-none-drv-level-2 i vpcfg-pull-none-drv-level-3 i vpcfg-pull-up-drv-level-1 M vpcfg-pull-up-drv-level-2 M vpcfg-pull-none-smt i acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-rstnout iemmc-bus8   eemmc-clk femmc-cmd gemmc-datastrobe heth0eth1flashfspifspi-pins` dgmac0gmac1gpuhdmitxhdmitxm0-cec Qhdmitx-scl Ohdmitx-sda Pi2c0i2c0-xfer   i2c1i2c1-xfer  zi2c2i2c2m0-xfer {i2c3i2c3m0-xfer |i2c4i2c4m0-xfer   }i2c5i2c5m0-xfer   ~i2s1i2s1m0-lrcktx li2s1m0-mclk $i2s1m0-sclktx ki2s1m0-sdi0  mi2s1m0-sdo0 ni2s2i2s2m0-lrcktx pi2s2m0-sclktx oi2s2m0-sdi qi2s2m0-sdo ri2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk spdmm0-clk1 tpdmm0-sdi0  updmm0-sdi1  vpdmm0-sdi2  wpdmm0-sdi3 xpmicpmic-int #pmupwm0pwm0m0-pins (pwm1pwm1m0-pins )pwm2pwm2m0-pins *pwm3pwm3-pins +pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ Ysdmmc0-clk Zsdmmc0-cmd [sdmmc0-det \sdmmc1sdmmc1-bus4@ _sdmmc1-clk asdmmc1-cmd `sdmmc2spdifspdifm0-tx yspi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer 'uart1uart1m0-xfer   uart1m0-ctsn uart1m0-rtsn  uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h bt-host-wake-l bt-wake-l hp-detecthp-det sdio-pwrseqwifi-enable-h  wifi-host-wake-l  cusb2vcc5v0-host-en opp-table-0,operating-points-v2 opp-408000000 Q P P0 @opp-600000000 #F P P0 @opp-816000000 0, P P0 @ opp-1104000000 Aʹ 0 @opp-1416000000 Tfr 0 @opp-1608000000 _" 0 @opp-1800000000 kI 000 @opp-table-1,operating-points-v2Copp-200000000  P PB@opp-300000000  P PB@opp-400000000 ׄ P PB@opp-600000000 #F B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@chosen serial2:1500000n8adc-keys ,adc-keys  buttons w@ (dbutton-recovery 6recovery < Glhdmi-con,hdmi-connectordportendpointUleds ,gpio-ledsrgb-led-r a  6status-redrgb-led-g  a 6status-greenrgb-led-b  a 6status-bluemulti-led,leds-group-multicolor a  6status-rgb gindicator pregulator-12v0-dcin,regulator-fixed  vcc12v0_dcin-?Wregulator-3v3-vcc-sys,regulator-fixed  vcc3v3_sys-?2ZW2Z!%regulator-5v0-vcc-sys,regulator-fixed  vcc5v0_sys-?LK@WLK@!regulator-5v0-vcc-host,regulator-fixed u default  vcc5v0_host?LK@WLK@!sdio-pwrseq,mmc-pwrseq-simple ext_clockdefault  b ^sound,simple-audio-cardi2s Analog RK809simple-audio-card,cpu?simple-audio-card,codec? interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-mapconsole-sizeftrace-sizepmsg-sizerecord-sizearm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supplyoffsetmode-normalmode-loadermode-recoverymode-bootloader#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltrockchip,mic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsmax-speedshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolorfunctionledsenable-active-highgpiopost-power-on-delay-msreset-gpios