۟8( ϸ &,hardkernel,odroid-m1srockchip,rk35667Hardkernel ODROID-M1Saliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe310000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci%2@DQ^@p} cpu@100cpu,arm,cortex-a55psci%2@DQ^@p} cpu@200cpu,arm,cortex-a55psci%2@DQ^@p} cpu@300cpu,arm,cortex-a55psci%2@DQ^@p} l3-cache,cache'4@Fdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcՂ protocol@14hdmi-sound,simple-audio-cardHDMI i2s#=okaysimple-audio-card,codecDsimple-audio-card,cpuD pmu,arm,cortex-a55-pmu0NY psci ,arm,psci-1.0smcreserved-memory lshmem@10f000,arm,scmi-shmemstimer,arm,armv8-timer0N   zxin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob N_ sata-phy =disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob N` sata-phy =disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Nref_clksuspend_clkbus_clkotg utmi_wide=okay usb2-phy8 ?high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Nref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide=okayinterrupt-controller@fd400000 ,arm,gic-v3 @F N MbsA}(l msi-controller@fd440000,arm,gic-v3-itsD_usb@fd800000 ,generic-ehci Nusb=okayusb@fd840000 ,generic-ohci Nusb=okayusb@fd880000 ,generic-ehci Nusb=okayusb@fd8c0000 ,generic-ohci Nusb=okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd]io-domains&,rockchip,rk3568-pmu-io-voltage-domain=okay"syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru0clock-controller@fdd20000,rockchip,rk3568-cruxin24m0= MG byi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c N.- i2cpclk default =okayregulator@1c ,tcs,tcs4525vdd_cpu 45!regulator-state-mem(pmic@20,rockchip,rk809 =HbHmclkrk809-clkout1rk809-clkout2"Ndefault#$ARjx!!!!!!!!!regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem(DCDC_REG2vdd_gpu pqCregulator-state-mem(DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-mem(DCDC_REG5vcc_1v8w@w@regulator-state-mem(LDO_REG1vdda0v9_image  Yregulator-state-mem(LDO_REG2 vdda_0v9  regulator-state-mem(LDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-mem(LDO_REG5 vccio_sdw@2Zregulator-state-mem(LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem(LDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@Zregulator-state-mem(SWITCH_REG1vcc_3v3regulator-state-mem(SWITCH_REG2 vcc3v3_sdgregulator-state-mem(serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Nt ,baudclkapb_pclk/%%&default4A =disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'defaultK =disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(defaultK =disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultK =disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk*defaultK =disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllerV power-domain@7j+Vpower-domain@8 j,-.Vpower-domain@9  j/01Vpower-domain@10 j234567Vpower-domain@11 j8Vpower-domain@13 j9Vpower-domain@14 j:;<Vpower-domain@15j=>?@AVgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$N()' qjobmmugpugpubus=okayBCvideo-codec@fdea0400,rockchip,rk3568-vpu Nqvdpu aclkhclkD iommu@fdea0800,rockchip,rk3568-iommu@ N aclkiface Drga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga NZaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu N@ aclkhclkE iommu@fdee0800,rockchip,rk3568-iommu@ N? aclkiface Evideo-capture@fdfe0000,rockchip,rk3568-vicap N=M aclkhclkdclkiclkF(arsthrstdrstprstirsty =disabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu N aclkiface =disabledFmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Nd biuciuciu-driveciu-sampleрreset =disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aN qmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethyGHI(=okay=b1input>J Irgmii-idRdefaultKLMNOPmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22]N m QJstmmac-axi-configGrx-queues-configHqueue0tx-queues-configIqueue0vop@fe040000 0@vopgamma-lut N(%aclkhclkdclk_vp0dclk_vp1dclk_vp2R y=okay,rockchip,rk3566-vop=bports port@0 endpoint@2S[port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? N aclkiface =okayRdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi NDpclkdphyT apby =disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi NEpclkdphyU apby =disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  N-((iahbisfrcecrefdefault VWX 4yA=okayY Zports port@0endpoint[Sport@1endpoint\qos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon >qos@fe190300,rockchip,rk3568-qossyscon ?qos@fe190380,rockchip,rk3568-qossyscon @qos@fe190400,rockchip,rk3568-qossyscon Aqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi# N ]pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<NKJIHGqsyspmcmsglegacyerr(($aclk_mstaclk_slvaclk_dbipclkauxpcib2`E^^^^Sds_ pcie-phyTl @pipe =okaydefault` a blegacy-interrupt-controllerbM NH^mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Nb biuciuciu-driveciu-sampleрreset=okaydefaultcdefgmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Nc biuciuciu-driveciu-sampleрreset =disabledspi@fe300000 ,rockchip,sfc0@ Nexvclk_sfchclk_sfchdefault =disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 N={}M n6(|zy{}corebusaxiblocktimer=okay    & .defaultijklmrng@fe388000,rockchip,rk3568-rng8@po coreahbm =disabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ N4==AMFqFq?C9mclk_txmclk_rxhclk/n