Z8(  +,asus,rk3566-tinker-board-3rockchip,rk35667Asus Tinker Board 3aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci#@5BO@an cpu@100cpu,arm,cortex-a55psci#@5BO@an cpu@200cpu,arm,cortex-a55psci#@5BO@an cpu@300cpu,arm,cortex-a55psci#@5BO@an l3-cache,cache%@7display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcƂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s .disabledsimple-audio-card,codec5simple-audio-card,cpu5 pmu,arm,cortex-a55-pmu0?J psci ,arm,psci-1.0smcreserved-memory ]shmem@10f000,arm,scmi-shmemdtimer,arm,armv8-timer0?   kxin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob ?_ sata-phy .disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ?` sata-phy .disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ?ref_clksuspend_clkbus_clkotg utmi_wide  .disabled usb2-phy) 0high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ?ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide  .disabledinterrupt-controller@fd400000 ,arm,gic-v3 @F ? >SdAn(y] msi-controller@fd440000,arm,gic-v3-itsDyLusb@fd800000 ,generic-ehci ?usb.okayusb@fd840000 ,generic-ohci ?usb.okayusb@fd880000 ,generic-ehci ?usb.okayusb@fd8c0000 ,generic-ohci ?usb.okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdJio-domains&,rockchip,rk3568-pmu-io-voltage-domain .disabledsyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucruclock-controller@fdd20000,rockchip,rk3568-cruxin24m G i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c ?.- i2cpclkdefault .okaypmic@20,rockchip,rk809 HHmclkrk809-clkout1rk809-clkout2?default "0<HT`lxregulatorsDCDC_REG5vcc_1v8w@w@regulator-state-memSWITCH_REG1vcc_3v3regulator-state-memSWITCH_REG2 vcc3v3_sdQregulator-state-memLDO_REG5 vccio_sdw@2ZRregulator-state-memregulator@40,silergy,syr827@vdd_cpu 0O7Lregulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart ?t ,baudclkapb_pclkW !default\i .disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk"defaults .disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk#defaults .disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk$defaults .disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk%defaults .disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller~ power-domain@7&~power-domain@8 '()~power-domain@9  *+,~power-domain@10 -./012~power-domain@11 3~power-domain@13 4~power-domain@14 567~power-domain@1589:;<~gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$?()' jobmmugpugpubus .disabled=video-codec@fdea0400,rockchip,rk3568-vpu ?vdpu aclkhclk> iommu@fdea0800,rockchip,rk3568-iommu@ ? aclkiface >rga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ?Zaclkhclksclk &$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu ?@ aclkhclk? iommu@fdee0800,rockchip,rk3568-iommu@ ?? aclkiface ?video-capture@fdfe0000,rockchip,rk3568-vicap ? aclkhclkdclkiclk@( arsthrstdrstprstirst .disabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu ? aclkiface .disabled@mmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ ?d biuciuciu-driveciu-sampleр reset .disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a? macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref  stmmacethA B1CD .disabledmdio,snps,dwmac-mdio stmmac-axi-configMWgArx-queues-configwBqueue0tx-queues-configCqueue0vop@fe040000 0@vopgamma-lut ?(%aclkhclkdclk_vp0dclk_vp1dclk_vp2D  .disabled,rockchip,rk3566-vopports port@0 port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? ? aclkiface  .disabledDdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi ?DpclkdphyE apb  .disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi ?EpclkdphyF apb  .disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  ?-((iahbisfrcecrefdefault GHI \ .disabledports port@0port@1qos@fe128000,rockchip,rk3568-qossyscon &qos@fe138080,rockchip,rk3568-qossyscon 5qos@fe138100,rockchip,rk3568-qossyscon 6qos@fe138180,rockchip,rk3568-qossyscon 7qos@fe148000,rockchip,rk3568-qossyscon 'qos@fe148080,rockchip,rk3568-qossyscon (qos@fe148100,rockchip,rk3568-qossyscon )qos@fe150000,rockchip,rk3568-qossyscon 3qos@fe158000,rockchip,rk3568-qossyscon -qos@fe158100,rockchip,rk3568-qossyscon .qos@fe158180,rockchip,rk3568-qossyscon /qos@fe158200,rockchip,rk3568-qossyscon 0qos@fe158280,rockchip,rk3568-qossyscon 1qos@fe158300,rockchip,rk3568-qossyscon 2qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon 8qos@fe190280,rockchip,rk3568-qossyscon 9qos@fe190300,rockchip,rk3568-qossyscon :qos@fe190380,rockchip,rk3568-qossyscon ;qos@fe190400,rockchip,rk3568-qossyscon <qos@fe198000,rockchip,rk3568-qossyscon 4qos@fe1a8000,rockchip,rk3568-qossyscon *qos@fe1a8080,rockchip,rk3568-qossyscon +qos@fe1a8100,rockchip,rk3568-qossyscon ,dfi@fe230000,rockchip,rk3568-dfi# ? Jpcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<?KJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpciS`KKKK#L+ pcie-phyT] @ pipe  .disabledlegacy-interrupt-controllerS> ?HKmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ ?b biuciuciu-driveciu-sampleр reset.okay5?PdefaultMNOP[QgRmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ ?c biuciuciu-driveciu-sampleр reset .disabledspi@fe300000 ,rockchip,sfc0@ ?exvclk_sfchclk_sfcSdefault .disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 ?{} n6(|zy{}corebusaxiblocktimer .disabledrng@fe388000,rockchip,rk3568-rng8@po coreahb m .disabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ ?4=AFqFq?C9mclk_txmclk_rxhclkWTttx PQ tx-mrx-m .disabled i2s@fe410000,rockchip,rk3568-i2s-tdmA ?5EIFqFqGK:mclk_txmclk_rxhclkWTTtrxtx RS tx-mrx-mdefault0UVWXYZ[\]^_` .disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB ?6MFqOO;mclk_txmclk_rxhclkWTTttxrx Ttx-mdefaultabcd .disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC ?7SW<mclk_txmclk_rxhclkWTTttxrx UV tx-mrx-m .disabledpdm@fe440000,rockchip,rk3568-pdmD ?LZYpdm_clkpdm_hclkWT trxefghijdefault Xpdm-m .disabledspdif@fe460000,rockchip,rk3568-spdifF ?f mclkhclk_\WTttxdefaultk .disableddma-controller@fe530000,arm,pl330arm,primecellS@? ~  apb_pclk dma-controller@fe550000,arm,pl330arm,primecellU@?~  apb_pclkTi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ ?/HG i2cpclkldefault  .disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ ?0JI i2cpclkmdefault .okayeeprom@50 ,atmel,24c08Pdefaultnrtc@6f ,isil,isl1208oirq defaultoi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ ?1LK i2cpclkpdefault  .disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] ?2NM i2cpclkqdefault  .disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ ?3PO i2cpclkrdefault  .disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` ? tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia ?gRQspiclkapb_pclkW  ttxrxdefault stu  .disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib ?hTSspiclkapb_pclkW  ttxrxdefault vwx  .disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic ?iVUspiclkapb_pclkW  ttxrxdefault yz{  .disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid ?jXWspiclkapb_pclkW  ttxrxdefault |}~  .disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ?ubaudclkapb_pclkW  default\i .disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf ?v# baudclkapb_pclkW  default\i.okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg ?w'$baudclkapb_pclkW  default\i .disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth ?x+(baudclkapb_pclkW  default\i .disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti ?y/,baudclkapb_pclkW default\i .disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj ?z30baudclkapb_pclkW default\i .disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk ?{74baudclkapb_pclkW  default\i .disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl ?|;8baudclkapb_pclkW  default\i .disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm ?}?<baudclkapb_pclkW  default\i .disabledthermal-zonescpu-thermaldtripscpu_alert0ppassivecpu_alert1$passivecpu_crits criticalcooling-mapsmap00 gpu-thermaltripsgpu-thresholdppassivegpu-target$passivegpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq ?sf@ `tsadcapb_pclk sdefaultsleep*4 .disabledsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ?]saradcapb_pclk  saradc-apbJ .disabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaults .disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaults .disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaults .disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefaults .disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaults .disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaults .disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaults .disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefaults .disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaults .disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaults .disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaults .disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefaults .disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe" phy\n .disabledphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe% phy\n .disabledphy@fe870000,rockchip,rk3568-csi-dphyypclk apb .disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz apb  .disabledEmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ apb  .disabledFusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m ?.okayhost-port.okayotg-port .disabledusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m ?.okayhost-port.okayotg-port .disabledpinctrl,rockchip,rk3568-pinctrlJ ]gpio@fdd60000,rockchip,gpio-bank ?!.  >Sgpio@fe740000,rockchip,gpio-bankt ?"cd >Sgpio@fe750000,rockchip,gpio-banku ?#ef@ >Sgpio@fe760000,rockchip,gpio-bankv ?$gh` >Sgpio@fe770000,rockchip,gpio-bankw ?%ij >Spcfg-pull-uppcfg-pull-nonepcfg-pull-none-drv-level-1pcfg-pull-none-drv-level-2pcfg-pull-none-drv-level-3pcfg-pull-up-drv-level-1pcfg-pull-up-drv-level-2pcfg-pull-none-smtacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmceth0eth1flashfspifspi-pins` Sgmac0gmac1gpuhdmitxhdmitxm0-cec Ihdmitx-scl Ghdmitx-sda Hi2c0i2c0-xfer   i2c1i2c1-xfer   li2c2i2c2m0-xfer  mi2c3i2c3m0-xfer pi2c4i2c4m0-xfer   qi2c5i2c5m0-xfer   ri2s1i2s1m0-lrckrx Xi2s1m0-lrcktx Wi2s1m0-mclk i2s1m0-sclkrx Vi2s1m0-sclktx Ui2s1m0-sdi0  Yi2s1m0-sdi1  Zi2s1m0-sdi2  [i2s1m0-sdi3 \i2s1m0-sdo0 ]i2s1m0-sdo1 ^i2s1m0-sdo2  _i2s1m0-sdo3  `i2s2i2s2m0-lrcktx bi2s2m0-sclktx ai2s2m0-sdi ci2s2m0-sdo di2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk epdmm0-clk1 fpdmm0-sdi0  gpdmm0-sdi1  hpdmm0-sdi2  ipdmm0-sdi3 jpmicpmic-int-l pmupwm0pwm0m0-pins "pwm1pwm1m0-pins #pwm2pwm2m0-pins $pwm3pwm3-pins %pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ Msdmmc0-clk Nsdmmc0-cmd Osdmmc0-det Psdmmc1sdmmc2spdifspdifm0-tx kspi0spi0m0-pins0  uspi0m0-cs0 sspi0m0-cs1 tspi1spi1m0-pins0  xspi1m0-cs0 vspi1m0-cs1 wspi2spi2m0-pins0 {spi2m0-cs0 yspi2m0-cs1 zspi3spi3m0-pins0   ~spi3m0-cs0 |spi3m0-cs1 }tsadctsadc-shutorg tsadc-pin uart0uart0-xfer !uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2eepromeeprom-wc-n nrtcrtcic-int-l ousbu2-a-vbus-en u3-a-vbus-en opp-table-0,operating-points-v2 opp-408000000 )Q 0 P P0 >@opp-600000000 )#F 0 P P0 >@opp-816000000 )0, 0 P P0 >@ Oopp-1104000000 )Aʹ 0 0 >@opp-1416000000 )Tfr 00 >@opp-1608000000 )_" 00 >@opp-1800000000 )kI 0000 >@opp-table-1,operating-points-v2=opp-200000000 )  0 P PB@opp-300000000 ) 0 P PB@opp-400000000 )ׄ 0 P PB@opp-600000000 )#F 0 B@opp-700000000 ))' 0~~B@opp-800000000 )/ 0B@B@B@chosen [serial2:1500000n8gpio-leds ,gpio-ledsact-led g mmmc1rsv-led g mnoneregulator-3v3-vcc-sys,regulator-fixed vcc3v3_sys2Z2ZLregulator-5v0-vcc-sys,regulator-fixed vcc5v0_sysLK@LK@regulator-5v0-vcc-usb-host,regulator-fixed  gdefaultvcc5v0_usb_hostLK@LK@L interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cells#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grf#sound-dai-cellssystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-off-in-suspendfcs,suspend-voltage-selectorregulator-ramp-delayvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplydma-namesarm,pl330-periph-burst#dma-cellsinterrupts-extendedpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cells#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathgpioslinux,default-triggerenable-active-high