8l( 4 #,linkease,easepi-r1rockchip,rk35687LinkEase EasePi R1aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 psci*7@IVc@u cpu@100cpu,arm,cortex-a55 psci*7@IVc@u cpu@200cpu,arm,cortex-a55 psci*7@IVc@u cpu@300cpu,arm,cortex-a55 psci*7@IVc@u l3-cache,cache,9@Kdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcڂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s(Bokaysimple-audio-card,codecIsimple-audio-card,cpuI pmu,arm,cortex-a55-pmu0S^ psci ,arm,psci-1.0#smcreserved-memory qshmem@10f000,arm,scmi-shmemxtimer,arm,armv8-timer0S   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob S_ sata-phy Bdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob S` sata-phy Bdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Sref_clksuspend_clkbus_clk  peripheral utmi_wide$Bokay usb2-phy= Dhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Sref_clksuspend_clkbus_clk host usb2-phyusb3-phy utmi_wide$Bokayinterrupt-controller@fd400000 ,arm,gic-v3 @F S RgxA(q msi-controller@fd440000,arm,gic-v3-itsDbusb@fd800000 ,generic-ehci Susb Bdisabledusb@fd840000 ,generic-ohci Susb Bdisabledusb@fd880000 ,generic-ehci Susb Bdisabledusb@fd8c0000 ,generic-ohci Susb Bdisabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd`io-domains&,rockchip,rk3568-pmu-io-voltage-domainBokay syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru'clock-controller@fdd20000,rockchip,rk3568-cruxin24m'4 DG Ypi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c S.- i2cpclk default Bokayregulator@1c ,tcs,tcs4525}vdd_cpu 50!regulator-state-mempmic@20,rockchip,rk809 "Sdefault#8P$\$h$t$$$$$$regulatorsDCDC_REG1 vdd_logic pqregulator-state-memDCDC_REG2vdd_gpu pqFregulator-state-memDCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-memDCDC_REG5vcc_1v8w@w@regulator-state-memLDO_REG1vdda0v9_image~~\regulator-state-memLDO_REG2 vdda_0v9  regulator-state-memLDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-memLDO_REG5 vccio_sdw@2Zregulator-state-memLDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-memLDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@]regulator-state-memSWITCH_REG1vcc_3v3regulator-state-memSWITCH_REG2 vcc3v3_sdregulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart St ,baudclkapb_pclk%%&default' Bdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'default1 Bdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default1 Bdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)default1 Bdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk*default1 Bdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller< power-domain@7P+<power-domain@8 P,-.<power-domain@9  P/01<power-domain@10 P234567<power-domain@11 P8<power-domain@13 P9<power-domain@14 P:;<<power-domain@15 P=>?@ABCD<gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$S()' Wjobmmugpugpubus BokayEgFvideo-codec@fdea0400,rockchip,rk3568-vpu SWvdpu aclkhclksG iommu@fdea0800,rockchip,rk3568-iommu@ S aclkiface zGrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga SZaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu S@ aclkhclksH iommu@fdee0800,rockchip,rk3568-iommu@ S? aclkiface zHvideo-capture@fdfe0000,rockchip,rk3568-vicap S4D aclkhclkdclkiclksI(arsthrstdrstprstirstp Bdisabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu S aclkifacez BdisabledImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Sd biuciuciu-driveciu-sampleрreset Bdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aS Wmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethpJKLBokay4YDsY@M "rgmii-iddefaultNOPQRmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22Sdefault+N ; MTMstmmac-axi-configYcsJrx-queues-configKqueue0tx-queues-configLqueue0vop@fe040000 0@vopgamma-lut S(%aclkhclkdclk_vp0dclk_vp1dclk_vp2sU pBokay,rockchip,rk3568-vop4Yports port@0 endpoint@2V^port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? S aclkifacez BokayUdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi SDpclkdphyW apbp Bdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi SEpclkdphyX apbp Bdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  S-((iahbisfrcecrefdefault YZ[ pBokay\]ports port@0endpoint^Vport@1endpoint_qos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon Aqos@fe190300,rockchip,rk3568-qossyscon Bqos@fe190380,rockchip,rk3568-qossyscon Cqos@fe190400,rockchip,rk3568-qossyscon Dqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi# S `pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<SKJIHGWsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpcig`$aaaa2CRapbx pcie-phyTq @pipe Bokay Mc$legacy-interrupt-controllergR SHammc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Sb biuciuciu-driveciu-sampleрreset Bdisabledmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Sc biuciuciu-driveciu-sampleрreset Bdisabledspi@fe300000 ,rockchip,sfc0@ Sexvclk_sfchclk_sfcddefault Bdisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 S4{}D n6(|zy{}corebusaxiblocktimerBokay defaultefghrng@fe388000,rockchip,rk3568-rng8@po coreahbmBokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ S44=ADFqFq?C9mclk_txmclk_rxhclkitxPQ tx-mrx-mpBokay i2s@fe410000,rockchip,rk3568-i2s-tdmA S54EIDFqFqGK:mclk_txmclk_rxhclkiirxtxRS tx-mrx-mpdefault0jklmnopqrstu Bdisabledi2s@fe420000,rockchip,rk3568-i2s-tdmB S64MDFqOO;mclk_txmclk_rxhclkiitxrxTtx-mpdefaultvwxy Bdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC S7SW<mclk_txmclk_rxhclkiitxrxUV tx-mrx-mp Bdisabledpdm@fe440000,rockchip,rk3568-pdmD SLZYpdm_clkpdm_hclki rxz{|}~defaultXpdm-m Bdisabledspdif@fe460000,rockchip,rk3568-spdifF Sf mclkhclk_\itxdefault Bdisableddma-controller@fe530000,arm,pl330arm,primecellS@S   apb_pclk%dma-controller@fe550000,arm,pl330arm,primecellU@S  apb_pclkii2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ S/HG i2cpclkdefault  Bdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ S0JI i2cpclkdefault  Bdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ S1LK i2cpclkdefault  Bdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] S2NM i2cpclkdefault  Bdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ S3PO i2cpclkdefault  Bdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` S tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia SgRQspiclkapb_pclk%%txrxdefault   Bdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib ShTSspiclkapb_pclk%%txrxdefault   Bdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic SiVUspiclkapb_pclk%%txrxdefault   Bdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid SjXWspiclkapb_pclk%%txrxdefault   Bdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Subaudclkapb_pclk%%default' Bdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Sv# baudclkapb_pclk%%default'Bokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Sw'$baudclkapb_pclk%%default' Bdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Sx+(baudclkapb_pclk%% default' Bdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Sy/,baudclkapb_pclk% % default' Bdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Sz30baudclkapb_pclk% % default' Bdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk S{74baudclkapb_pclk%%default' Bdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl S|;8baudclkapb_pclk%%default' Bdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm S}?<baudclkapb_pclk%%default' Bdisabledthermal-zonescpu-thermaldtripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 !0 & gpu-thermaltripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0 ! &tsadc@fe710000,rockchip,rk3568-tsadcq Ss4Df@ `tsadcapb_pclkp 5sdefaultsleep L VBokay l saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr S]saradcapb_pclk saradc-apb Bokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault1 Bdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault1 Bdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault1 Bdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault1 Bdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault1 Bdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault1 Bdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault1 Bdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault1 Bdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault1 Bdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault1 Bdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault1 Bdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault1 Bdisabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe4"Dphy   Bokayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe4%Dphy   Bokayphy@fe870000,rockchip,rk3568-csi-dphyypclk apbp Bdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  apb BdisabledWmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  apb BdisabledXusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m S Bokayhost-port Bokay !otg-port Bokayusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m S  Bdisabledhost-port  Bdisabledotg-port  Bdisabledpinctrl,rockchip,rk3568-pinctrlp` qgpio@fdd60000,rockchip,gpio-bank S!.     &Rg"gpio@fe740000,rockchip,gpio-bankt S"cd    &Rggpio@fe750000,rockchip,gpio-banku S#ef  @  &RgTgpio@fe760000,rockchip,gpio-bankv S$gh  `  &Rgcgpio@fe770000,rockchip,gpio-bankw S%ij    &Rgpcfg-pull-up 2pcfg-pull-none ?pcfg-pull-none-drv-level-1 ? Lpcfg-pull-none-drv-level-2 ? Lpcfg-pull-none-drv-level-3 ? Lpcfg-pull-up-drv-level-1 2 Lpcfg-pull-up-drv-level-2 2 Lpcfg-pull-none-smt ? [acodecaudiopwmbt656bt1120camcan0can0m0-pins p  can1can1m0-pins pcan2can2m0-pins p  cifclk32kclk32k-out0 pcpuebcedpdpemmcemmc-bus8 p  eemmc-clk pfemmc-cmd pgemmc-datastrobe pheth0eth1flashfspifspi-pins` pdgmac0gmac0-miim pgmac0-rx-bus20 pgmac0-tx-bus20 p   gmac0-rgmii-clk pgmac0-rgmii-bus@ peth-phy0-reset-pin pgmac1gmac1m1-miim pNgmac1m1-rx-bus20 p Pgmac1m1-tx-bus20 pOgmac1m1-rgmii-clk pQgmac1m1-rgmii-bus@ pReth-phy1-reset-pin pSgpuhdmitxhdmitxm0-cec p[hdmitx-scl pYhdmitx-sda pZi2c0i2c0-xfer p   i2c1i2c1-xfer p  i2c2i2c2m0-xfer p i2c3i2c3m0-xfer pi2c4i2c4m0-xfer p  i2c5i2c5m0-xfer p  i2s1i2s1m0-lrckrx pmi2s1m0-lrcktx pli2s1m0-sclkrx pki2s1m0-sclktx pji2s1m0-sdi0 p ni2s1m0-sdi1 p oi2s1m0-sdi2 p pi2s1m0-sdi3 pqi2s1m0-sdo0 pri2s1m0-sdo1 psi2s1m0-sdo2 p ti2s1m0-sdo3 p ui2s2i2s2m0-lrcktx pwi2s2m0-sclktx pvi2s2m0-sdi pxi2s2m0-sdo pyi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk pzpdmm0-clk1 p{pdmm0-sdi0 p |pdmm0-sdi1 p }pdmm0-sdi2 p ~pdmm0-sdi3 ppmicpmic-int p#pmupwm0pwm0m0-pins p'pwm1pwm1m0-pins p(pwm2pwm2m0-pins p)pwm3pwm3-pins p*pwm4pwm4-pins ppwm5pwm5-pins ppwm6pwm6-pins ppwm7pwm7-pins ppwm8pwm8m0-pins p pwm9pwm9m0-pins p pwm10pwm10m0-pins p pwm11pwm11m0-pins ppwm12pwm12m0-pins ppwm13pwm13m0-pins ppwm14pwm14m0-pins ppwm15pwm15m0-pins prefclksatasata0sata1sata2scrsdmmc0sdmmc1sdmmc2spdifspdifm0-tx pspi0spi0m0-pins0 p spi0m0-cs0 pspi0m0-cs1 pspi1spi1m0-pins0 p spi1m0-cs0 pspi1m0-cs1 pspi2spi2m0-pins0 pspi2m0-cs0 pspi2m0-cs1 pspi3spi3m0-pins0 p  spi3m0-cs0 pspi3m0-cs1 ptsadctsadc-shutorg ptsadc-pin puart0uart0-xfer p&uart1uart1m0-xfer p  uart2uart2m0-xfer puart3uart3m0-xfer puart4uart4m0-xfer puart5uart5m0-xfer puart6uart6m0-xfer puart7uart7m0-xfer puart8uart8m0-xfer puart9uart9m0-xfer pvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2gpio-ledsstatus-led-pin pnvmevcc3v3-nvme-en ppcie-nicvdd0v95-25glan-en p opp-table-0,operating-points-v2 ~opp-408000000 Q P P0 @opp-600000000 #F P P0 @opp-816000000 0, P P0 @ opp-1104000000 Aʹ 0 @opp-1416000000 Tfr 0 @opp-1608000000 _" 0 @opp-1800000000 kI 000 @opp-1992000000 v 000 @opp-table-1,operating-points-v2Eopp-200000000  P PB@opp-300000000  P PB@opp-400000000 ׄ P PB@opp-600000000 #F B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob S^ sata-phy Bdisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon >qos@fe190100,rockchip,rk3568-qossyscon ?qos@fe190200,rockchip,rk3568-qossyscon @syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclkphy Bokay pcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<SWsyspmcmsglegacyerrg`$2CRapbx pcie-phy0@@'Tq @@@dbiapbconfigpipeBokay Mc$legacy-interrupt-controllerRg Spcie@fe280000,rockchip,rk3568-pcie  /($aclk_mstaclk_slvaclk_dbipclkauxpci<SWsyspmcmsglegacyerrg`$2CRap b x pcie-phy0@(Tq @dbiapbconfigpipeBokay MTlegacy-interrupt-controllerRg Sethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*SWmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethpBokay4YDsY@ "rgmii-iddefaultmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22default+N ; MTstmmac-axi-configYcsrx-queues-configqueue0tx-queues-configqueue0can@fe570000,rockchip,rk3568v2-canfdW SA@ baudpclkUT coreapbdefault Bdisabledcan@fe580000,rockchip,rk3568v2-canfdX SCB baudpclkWV coreapbdefault Bdisabledcan@fe590000,rockchip,rk3568v2-canfdY SED baudpclkYX coreapbdefault Bdisabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe4Dphy    Bdisabledchosen serial2:1500000n8adc-keys ,adc-keys  buttons w@button-recovery Recovery h +gpio-leds ,gpio-ledsdefaultled-status E Kstatus ST Theartbeathdmi-con,hdmi-connectoraportendpoint_regulator-dc-12v,regulator-fixeddc_12vregulator-vcc5v0-sys,regulator-fixed vcc5v0_sysLK@LK@!regulator-vcc3v3-sys,regulator-fixed vcc3v3_sys2Z2Z$regulator-pcie30-avdd0v9,regulator-fixedpcie30_avdd0v9  $regulator-pcie30-avdd1v8,regulator-fixedpcie30_avdd1v8w@w@$regulator-vdd0v95-25glan,regulator-fixed j }c defaultvdd0v95_25glan~~$regulator-vcc3v3-nvme,regulator-fixed j }"default vcc3v3_nvme2Z2Z interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesvpcie3v3-supplybus-widthnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltcolorfunctionlinux,default-triggerenable-active-highgpio