R84(  %,lunzn,fastrhino-r66srockchip,rk35687Lunzn FastRhino R66Saliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci#@5BO@an cpu@100cpu,arm,cortex-a55psci#@5BO@an cpu@200cpu,arm,cortex-a55psci#@5BO@an cpu@300cpu,arm,cortex-a55psci#@5BO@an l3-cache,cache%@7display-subsystem,rockchip,display-subsystem disabledfirmwarescmi ,arm,scmi-smc͂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s disabledsimple-audio-card,codec5simple-audio-card,cpu5 pmu,arm,cortex-a55-pmu0?J psci ,arm,psci-1.0smcreserved-memory ]shmem@10f000,arm,scmi-shmemdtimer,arm,armv8-timer0?   kxin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob ?_ sata-phy disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ?` sata-phy disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ?ref_clksuspend_clkbus_clkhost utmi_wide okay usb2-phyusb3-phy)usb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ?ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide okayinterrupt-controller@fd400000 ,arm,gic-v3 @F ? 0EVA`(k] zmsi-controller@fd440000,arm,gic-v3-itsDzkUusb@fd800000 ,generic-ehci ?usb disabledusb@fd840000 ,generic-ohci ?usb disabledusb@fd880000 ,generic-ehci ?usb disabledusb@fd8c0000 ,generic-ohci ?usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdSio-domains&,rockchip,rk3568-pmu-io-voltage-domainokaysyscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucruclock-controller@fdd20000,rockchip,rk3568-cruxin24m  0G E\i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c ?.- i2cpclk default okayregulator@1c ,tcs,tcs4525ivdd_cpu 50!regulator-state-mem pmic@20,rockchip,rk809 "?default#$<$H$T$`$l$x$$$$regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem DCDC_REG2vdd_gpu pqFregulator-state-mem DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-mem DCDC_REG5vcc_1v8w@w@regulator-state-mem LDO_REG1vdda0v9_image~~regulator-state-mem LDO_REG2 vdda_0v9  regulator-state-mem LDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-mem LDO_REG5 vccio_sdw@2Zregulator-state-mem LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem LDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_image~w@regulator-state-mem ~SWITCH_REG1vcc_3v3regulator-state-mem SWITCH_REG2 vcc3v3_sdZregulator-state-mem serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart ?t ,baudclkapb_pclk%%&default disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'default disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)default disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk*default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller( power-domain@7<+(power-domain@8 <,-.(power-domain@9  </01(power-domain@10 <234567(power-domain@11 <8(power-domain@13 <9(power-domain@14 <:;<(power-domain@15 <=>?@ABCD(gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$?()' CjobmmugpugpubusokayESFvideo-codec@fdea0400,rockchip,rk3568-vpu ?Cvdpu aclkhclk_G iommu@fdea0800,rockchip,rk3568-iommu@ ? aclkiface fGrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ?Zaclkhclksclk &$% scoreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu ?@ aclkhclk_H iommu@fdee0800,rockchip,rk3568-iommu@ ?? aclkiface fHvideo-capture@fdfe0000,rockchip,rk3568-vicap ? 0 aclkhclkdclkiclk_I( sarsthrstdrstprstirst\ disabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu ? aclkifacef disabledImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ ?d biuciuciu-driveciu-sampleр sreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a? Cmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref  sstmmaceth\JKL disabledmdio,snps,dwmac-mdio stmmac-axi-config Jrx-queues-config-Kqueue0tx-queues-configCLqueue0vop@fe040000 0@Yvopgamma-lut ?(%aclkhclkdclk_vp0dclk_vp1dclk_vp2_M \okay,rockchip,rk3568-vop Eports port@0 port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? ? aclkifacef okayMdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi ?DpclkdphyN sapb \ disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi ?EpclkdphyO sapb \ disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  ?-((iahbisfrcecrefdefault PQR \c disabledports port@0port@1qos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon Aqos@fe190300,rockchip,rk3568-qossyscon Bqos@fe190380,rockchip,rk3568-qossyscon Cqos@fe190400,rockchip,rk3568-qossyscon Dqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi# ? tSpcie@fe260000,rockchip,rk3568-pcie0@&Ydbiapbconfig<?KJIHGCsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpciE`TTTTU pcie-phyT] @ spipe  disabledlegacy-interrupt-controllerE0 ?HTmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ ?b biuciuciu-driveciu-sampleр sresetokay)4<CdefaultVWXYPZ\mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ ?c biuciuciu-driveciu-sampleр sreset disabledspi@fe300000 ,rockchip,sfc0@ ?exvclk_sfchclk_sfc[default disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 ? {}0 n6(|zy{}corebusaxiblocktimer disabledrng@fe388000,rockchip,rk3568-rng8@po coreahb mokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ ?4 =A0FqFq?C9mclk_txmclk_rxhclk\itx PQ stx-mrx-m\c disabled i2s@fe410000,rockchip,rk3568-i2s-tdmA ?5 EI0FqFqGK:mclk_txmclk_rxhclk\\irxtx RS stx-mrx-m\default0]^_`abcdefghc disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB ?6 M0FqOO;mclk_txmclk_rxhclk\\itxrx Tstx-m\defaultijklc disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC ?7SW<mclk_txmclk_rxhclk\\itxrx UV stx-mrx-m\c disabledpdm@fe440000,rockchip,rk3568-pdmD ?LZYpdm_clkpdm_hclk\ irxmnopqrdefault Xspdm-mc disabledspdif@fe460000,rockchip,rk3568-spdifF ?f mclkhclk_\\itxdefaultsc disableddma-controller@fe530000,arm,pl330arm,primecellS@? s  apb_pclk%dma-controller@fe550000,arm,pl330arm,primecellU@?s  apb_pclk\i2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ ?/HG i2cpclktdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ ?0JI i2cpclkudefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ ?1LK i2cpclkvdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] ?2NM i2cpclkwdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ ?3PO i2cpclkxdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` ? tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia ?gRQspiclkapb_pclk%%itxrxdefault yz{  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib ?hTSspiclkapb_pclk%%itxrxdefault |}~  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic ?iVUspiclkapb_pclk%%itxrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid ?jXWspiclkapb_pclk%%itxrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ?ubaudclkapb_pclk%%default disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf ?v# baudclkapb_pclk%%defaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg ?w'$baudclkapb_pclk%%default disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth ?x+(baudclkapb_pclk%% default disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti ?y/,baudclkapb_pclk% % default disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj ?z30baudclkapb_pclk% % default disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk ?{74baudclkapb_pclk%%default disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl ?|;8baudclkapb_pclk%%default disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm ?}?<baudclkapb_pclk%%default disabledthermal-zonescpu-thermaldtripscpu_alert0ppassivecpu_alert1$passivecpu_crits criticalcooling-mapsmap00 gpu-thermaltripsgpu-thresholdppassivegpu-target$passivegpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq ?s 0f@ `tsadcapb_pclk \sdefaultsleep  okay + Bsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ?]saradcapb_pclk  ssaradc-apb ]okay opwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe "0 sphy {  okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe %0 sphy {   disabledphy@fe870000,rockchip,rk3568-csi-dphyypclk  sapb\ disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  sapb  disabledNmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  sapb  disabledOusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m ? okayhost-port okay !otg-port okay usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m ?  disabledhost-port  disabledotg-port  disabledpinctrl,rockchip,rk3568-pinctrl\tS ]gpio@fdd60000,rockchip,gpio-bank ?!.    0E"gpio@fe740000,rockchip,gpio-bankt ?"cd   0Egpio@fe750000,rockchip,gpio-banku ?#ef  @  0Egpio@fe760000,rockchip,gpio-bankv ?$gh  `  0Egpio@fe770000,rockchip,gpio-bankw ?%ij   0Epcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can0m0-pins /  can1can1m0-pins /can2can2m0-pins /  cifclk32kclk32k-out0 /cpuebcedpdpemmceth0eth1flashfspifspi-pins` /[gmac0gmac1gpuhdmitxhdmitxm0-cec /Rhdmitx-scl /Phdmitx-sda /Qi2c0i2c0-xfer /   i2c1i2c1-xfer /  ti2c2i2c2m0-xfer / ui2c3i2c3m0-xfer /vi2c4i2c4m0-xfer /  wi2c5i2c5m0-xfer /  xi2s1i2s1m0-lrckrx /`i2s1m0-lrcktx /_i2s1m0-sclkrx /^i2s1m0-sclktx /]i2s1m0-sdi0 / ai2s1m0-sdi1 / bi2s1m0-sdi2 / ci2s1m0-sdi3 /di2s1m0-sdo0 /ei2s1m0-sdo1 /fi2s1m0-sdo2 / gi2s1m0-sdo3 / hi2s2i2s2m0-lrcktx /ji2s2m0-sclktx /ii2s2m0-sdi /ki2s2m0-sdo /li2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk /mpdmm0-clk1 /npdmm0-sdi0 / opdmm0-sdi1 / ppdmm0-sdi2 / qpdmm0-sdi3 /rpmicpmic-int /#pmupwm0pwm0m0-pins /'pwm1pwm1m0-pins /(pwm2pwm2m0-pins /)pwm3pwm3-pins /*pwm4pwm4-pins /pwm5pwm5-pins /pwm6pwm6-pins /pwm7pwm7-pins /pwm8pwm8m0-pins / pwm9pwm9m0-pins / pwm10pwm10m0-pins / pwm11pwm11m0-pins /pwm12pwm12m0-pins /pwm13pwm13m0-pins /pwm14pwm14m0-pins /pwm15pwm15m0-pins /refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ /Vsdmmc0-clk /Wsdmmc0-cmd /Xsdmmc0-det /Ysdmmc1sdmmc2spdifspdifm0-tx /sspi0spi0m0-pins0 / {spi0m0-cs0 /yspi0m0-cs1 /zspi1spi1m0-pins0 / ~spi1m0-cs0 /|spi1m0-cs1 /}spi2spi2m0-pins0 /spi2m0-cs0 /spi2m0-cs1 /spi3spi3m0-pins0 /  spi3m0-cs0 /spi3m0-cs1 /tsadctsadc-shutorg /tsadc-pin /uart0uart0-xfer /&uart1uart1m0-xfer /  uart2uart2m0-xfer /uart3uart3m0-xfer /uart4uart4m0-xfer /uart5uart5m0-xfer /uart6uart6m0-xfer /uart7uart7m0-xfer /uart8uart8m0-xfer /uart9uart9m0-xfer /vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2gpio-ledsstatus-led-pin /rockchip-keyreset-button-pin /usbvcc5v0-usb-otg-en /opp-table-0,operating-points-v2 =opp-408000000 HQ O P P0 ]@opp-600000000 H#F O P P0 ]@opp-816000000 H0, O P P0 ]@ nopp-1104000000 HAʹ O 0 ]@opp-1416000000 HTfr O0 ]@opp-1608000000 H_" O0 ]@opp-1800000000 HkI O000 ]@opp-1992000000 Hv O000 ]@opp-table-1,operating-points-v2Eopp-200000000 H  O P PB@opp-300000000 H O P PB@opp-400000000 Hׄ O P PB@opp-600000000 H#F O B@opp-700000000 H)' O~~B@opp-800000000 H/ OB@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ?^ sata-phy disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon >qos@fe190100,rockchip,rk3568-qossyscon ?qos@fe190200,rockchip,rk3568-qossyscon @syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclk sphy zokay pcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<?CsyspmcmsglegacyerrE`U pcie-phy0@@'T] @@@Ydbiapbconfig spipeokay " legacy-interrupt-controller0E ?pcie@fe280000,rockchip,rk3568-pcie  /($aclk_mstaclk_slvaclk_dbipclkauxpci<?CsyspmcmsglegacyerrE` U  pcie-phy0@(T] @Ydbiapbconfig spipeokay " legacy-interrupt-controller0E ?ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*?Cmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref  sstmmaceth\ disabledmdio,snps,dwmac-mdio stmmac-axi-config rx-queues-config-queue0tx-queues-configCqueue0can@fe570000,rockchip,rk3568v2-canfdW ?A@ baudpclk UT scoreapbdefault disabledcan@fe580000,rockchip,rk3568v2-canfdX ?CB baudpclk WV scoreapbdefault disabledcan@fe590000,rockchip,rk3568v2-canfdY ?ED baudpclk YX scoreapbdefault disabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe 0 sphy {  okaychosen serial2:1500000n8gpio-keys ,gpio-keysdefaultbutton-reset 2 " reset gpio-leds ,gpio-ledsdefaultled-status  status " heartbeatregulator-vcc12v-dcin,regulator-fixed vcc12v_dcinregulator-vcc3v3-pcie,regulator-fixed vcc3v3_pcie2Z2Z!regulator-vcc3v3-sys,regulator-fixed vcc3v3_sys2Z2Z$regulator-vcc5v0-sys,regulator-fixed vcc5v0_sysLK@LK@!regulator-vcc5v0-usb-otg,regulator-fixed  "defaultvcc5v0_usb_otgLK@LK@! interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsstatusarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supplyvccio3-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-names#sound-dai-cellsrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr50vmmc-supplyvqmmc-supplydma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesreset-gpiosvpcie3v3-supplystdout-pathdebounce-intervallabellinux,codecolorfunctionlinux,default-triggerenable-active-highgpio