B8( ^ ,hinlink,h66krockchip,rk3568 7HINLINK H66Kaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55 psci(@:GT@fs cpu@100cpu,arm,cortex-a55 psci(@:GT@fs cpu@200cpu,arm,cortex-a55 psci(@:GT@fs cpu@300cpu,arm,cortex-a55 psci(@:GT@fs l3-cache,cache*@<display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc˂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s3okaysimple-audio-card,codec:simple-audio-card,cpu: pmu,arm,cortex-a55-pmu0DO psci ,arm,psci-1.0smcreserved-memory bshmem@10f000,arm,scmi-shmemitimer,arm,armv8-timer0D   pxin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob D_ sata-phy 3disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob D` sata-phy 3disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Dref_clksuspend_clkbus_clkotg utmi_wide 3disabled usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Dref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide3okayinterrupt-controller@fd400000 ,arm,gic-v3 @F D .CTA^(ib xmsi-controller@fd440000,arm,gic-v3-itsDxiZusb@fd800000 ,generic-ehci Dusb3okayusb@fd840000 ,generic-ohci Dusb3okayusb@fd880000 ,generic-ehci Dusb3okayusb@fd8c0000 ,generic-ohci Dusb3okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdXio-domains&,rockchip,rk3568-pmu-io-voltage-domain3okaysyscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucruclock-controller@fdd20000,rockchip,rk3568-cruxin24m .G CZi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c D.- i2cpclk default 3okayregulator@1c ,tcs,tcs4525gvdd_cpu 50!regulator-state-mem pmic@20,rockchip,rk809 "Ddefault#":H$T$`$l$x$$$$$regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem DCDC_REG2vdd_gpu pqFregulator-state-mem DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-mem DCDC_REG5vcc_1v8w@w@regulator-state-mem LDO_REG1vdda0v9_image  Tregulator-state-mem LDO_REG2 vdda_0v9  regulator-state-mem LDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-mem LDO_REG5 vccio_sdw@2Zregulator-state-mem LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem LDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@Uregulator-state-mem SWITCH_REG1vcc_3v3regulator-state-mem SWITCH_REG2vcc3v3regulator-state-mem serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Dt ,baudclkapb_pclk%%&default 3disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'default3okaypwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default 3disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)default 3disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk*default 3disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller& power-domain@7:+&power-domain@8 :,-.&power-domain@9  :/01&power-domain@10 :234567&power-domain@11 :8&power-domain@13 :9&power-domain@14 ::;<&power-domain@15 :=>?@ABCD&gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$D()' Ajobmmugpugpubus3okayEQFvideo-codec@fdea0400,rockchip,rk3568-vpu DAvdpu aclkhclk]G iommu@fdea0800,rockchip,rk3568-iommu@ D aclkiface dGrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga DZaclkhclksclk&$% qcoreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu D@ aclkhclk]H iommu@fdee0800,rockchip,rk3568-iommu@ D? aclkiface dHvideo-capture@fdfe0000,rockchip,rk3568-vicap D. aclkhclkdclkiclk]I(qarsthrstdrstprstirstZ 3disabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu D aclkifaced} 3disabledImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Dd biuciuciu-driveciu-sampleрqreset 3disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aD Amacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref qstmmacethZJKL 3disabledmdio,snps,dwmac-mdio stmmac-axi-config Jrx-queues-config+Kqueue0tx-queues-configALqueue0vop@fe040000 0@Wvopgamma-lut D(%aclkhclkdclk_vp0dclk_vp1dclk_vp2]M Z3okay,rockchip,rk3568-vopCports port@0 endpoint@2aNVport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? D aclkifaced 3okayMdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DDpclkdphyO qapbZ 3disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DEpclkdphyP qapbZ 3disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  D-((iahbisfrcecrefdefault QRS Zq3okayTUports port@0endpointaVNport@1endpointaWqos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon Aqos@fe190300,rockchip,rk3568-qossyscon Bqos@fe190380,rockchip,rk3568-qossyscon Cqos@fe190400,rockchip,rk3568-qossyscon Dqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi# D Xpcie@fe260000,rockchip,rk3568-pcie0@&Wdbiapbconfig<DKJIHGAsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpciC`YYYY Z  pcie-phyTb @qpipe 3okaydefault[ *\6]legacy-interrupt-controllerC. DHYmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Db biuciuciu-driveciu-sampleрqreset3okayFP a"jdefault^_`aubmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Dc biuciuciu-driveciu-sampleрqreset 3disabledspi@fe300000 ,rockchip,sfc0@ Dexvclk_sfchclk_sfccdefault 3disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 D{}. n6(|zy{}corebusaxiblocktimer3okayF defaultdefgrng@fe388000,rockchip,rk3568-rng8@po coreahbm3okayi2s@fe400000,rockchip,rk3568-i2s-tdm@ D4=A.FqFq?C9mclk_txmclk_rxhclkhtxPQ qtx-mrx-mZq3okay i2s@fe410000,rockchip,rk3568-i2s-tdmA D5EI.FqFqGK:mclk_txmclk_rxhclkhhrxtxRS qtx-mrx-mZdefault0ijklmnopqrstq 3disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB D6M.FqOO;mclk_txmclk_rxhclkhhtxrxTqtx-mZdefaultuvwxq 3disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC D7SW<mclk_txmclk_rxhclkhhtxrxUV qtx-mrx-mZq 3disabledpdm@fe440000,rockchip,rk3568-pdmD DLZYpdm_clkpdm_hclkh rxyz{|}~defaultXqpdm-mq 3disabledspdif@fe460000,rockchip,rk3568-spdifF Df mclkhclk_\htxdefaultq 3disableddma-controller@fe530000,arm,pl330arm,primecellS@D   apb_pclk%dma-controller@fe550000,arm,pl330arm,primecellU@D  apb_pclkhi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ D/HG i2cpclkdefault  3disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ D0JI i2cpclkdefault 3okayi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ D1LK i2cpclkdefault  3disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] D2NM i2cpclkdefault  3disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ D3PO i2cpclkdefault  3disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` D tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia DgRQspiclkapb_pclk%%txrxdefault   3disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib DhTSspiclkapb_pclk%%txrxdefault   3disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic DiVUspiclkapb_pclk%%txrxdefault   3disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid DjXWspiclkapb_pclk%%txrxdefault   3disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Dubaudclkapb_pclk%%default 3disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Dv# baudclkapb_pclk%%default3okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Dw'$baudclkapb_pclk%%default 3disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Dx+(baudclkapb_pclk%% default 3disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Dy/,baudclkapb_pclk% % default 3disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Dz30baudclkapb_pclk% % default 3disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk D{74baudclkapb_pclk%%default 3disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl D|;8baudclkapb_pclk%%default 3disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm D}?<baudclkapb_pclk%%default 3disabledthermal-zonescpu-thermald  tripscpu_alert0 *p 6passivecpu_alert1 *$ 6passivecpu_crit *s 6 criticalcooling-mapsmap0 A0 F gpu-thermal  tripsgpu-threshold *p 6passivegpu-target *$ 6passivegpu-crit *s 6 criticalcooling-mapsmap0 A Ftsadc@fe710000,rockchip,rk3568-tsadcq Ds.f@ `tsadcapb_pclkZ Usdefaultsleep l v3okay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr D]saradcapb_pclk qsaradc-apb 3okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault 3disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault 3disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault 3disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault 3disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault 3disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault 3disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault 3disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault 3disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault 3disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault 3disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault 3disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault 3disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe".qphy   3okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe%.qphy   3okayphy@fe870000,rockchip,rk3568-csi-dphyypclk qapbZ 3disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  qapb 3disabledOmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  qapb 3disabledPusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m D 3okayhost-port 3okay otg-port  3disabledusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m D 3okayhost-port 3okay otg-port 3okay pinctrl,rockchip,rk3568-pinctrlZX bgpio@fdd60000,rockchip,gpio-bank D!.  * :  F.C"gpio@fe740000,rockchip,gpio-bankt D"cd * :  F.Cgpio@fe750000,rockchip,gpio-banku D#ef * :@  F.C\gpio@fe760000,rockchip,gpio-bankv D$gh * :`  F.Cgpio@fe770000,rockchip,gpio-bankw D%ij * :  F.Cpcfg-pull-up Rpcfg-pull-none _pcfg-pull-none-drv-level-1 _ lpcfg-pull-none-drv-level-2 _ lpcfg-pull-none-drv-level-3 _ lpcfg-pull-up-drv-level-1 R lpcfg-pull-up-drv-level-2 R lpcfg-pull-none-smt _ {acodecaudiopwmbt656bt1120camcan0can0m0-pins  can1can1m0-pins can2can2m0-pins   cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-bus8   demmc-clk eemmc-cmd femmc-datastrobe geth0eth1flashfspifspi-pins` cgmac0gmac1gpuhdmitxhdmitxm0-cec Shdmitx-scl Qhdmitx-sda Ri2c0i2c0-xfer   i2c1i2c1-xfer  i2c2i2c2m1-xfer   i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrckrx li2s1m0-lrcktx ki2s1m0-sclkrx ji2s1m0-sclktx ii2s1m0-sdi0  mi2s1m0-sdi1  ni2s1m0-sdi2  oi2s1m0-sdi3 pi2s1m0-sdo0 qi2s1m0-sdo1 ri2s1m0-sdo2  si2s1m0-sdo3  ti2s2i2s2m0-lrcktx vi2s2m0-sclktx ui2s2m0-sdi wi2s2m0-sdo xi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ypdmm0-clk1 zpdmm0-sdi0  {pdmm0-sdi1  |pdmm0-sdi2  }pdmm0-sdi3 ~pmicpmic-int #pmupwm0pwm0m0-pins 'pwm1pwm1m0-pins (pwm2pwm2m0-pins )pwm3pwm3-pins *pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ^sdmmc0-clk _sdmmc0-cmd `sdmmc0-det asdmmc1sdmmc2spdifspdifm0-tx spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer &uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2keysfactory ledsgreen-led red-led work-led irpwm3-ir-m0 mmcsd-pwren pcielan-power-en lan-reseta lan-resetb wifi-perstn [usbusb-power-en opp-table-0,operating-points-v2 opp-408000000 Q P P0 @opp-600000000 #F P P0 @opp-816000000 0, P P0 @ opp-1104000000 Aʹ 0 @opp-1416000000 Tfr 0 @opp-1608000000 _" 0 @opp-1800000000 kI 000 @opp-1992000000 v 000 @opp-table-1,operating-points-v2Eopp-200000000  P PB@opp-300000000  P PB@opp-400000000 ׄ P PB@opp-600000000 #F B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob D^ sata-phy3okaysyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon >qos@fe190100,rockchip,rk3568-qossyscon ?qos@fe190200,rockchip,rk3568-qossyscon @syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclkqphy 3okay pcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<DAsyspmcmsglegacyerrC` Z  pcie-phy0@@'Tb @@@Wdbiapbconfigqpipe3okaydefault *6]legacy-interrupt-controller.C Dpcie@fe280000,rockchip,rk3568-pcie  /($aclk_mstaclk_slvaclk_dbipclkauxpci<DAsyspmcmsglegacyerrC`  Z   pcie-phy0@(Tb @Wdbiapbconfigqpipe3okaydefault *\6]legacy-interrupt-controller.C Dethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*DAmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref qstmmacethZ 3disabledmdio,snps,dwmac-mdio stmmac-axi-config rx-queues-config+queue0tx-queues-configAqueue0can@fe570000,rockchip,rk3568v2-canfdW DA@ baudpclkUT qcoreapbdefault 3disabledcan@fe580000,rockchip,rk3568v2-canfdX DCB baudpclkWV qcoreapbdefault 3disabledcan@fe590000,rockchip,rk3568v2-canfdY DED baudpclkYX qcoreapbdefault 3disabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe.qphy   3okaychosen serial2:1500000n8hdmi-con,hdmi-connectoraportendpointaWir-receiver,gpio-ir-receiver 0"defaultkeys ,gpio-keysdefaultbutton-factory factory  0" 2leds ,gpio-ledsdefault led-0 & ,wan 0 5netdevled-1 & ,disk 0led-2 & ,status 0 5default-onregulator-0v9-vcc-2g5,regulator-fixed vcc0v9_2g5  !regulator-12v-vcc-dcinp,regulator-fixed vcc12v_dcinpregulator-3v3-vcc-pi6c-05,regulator-fixed K 0"defaultvcc3v3_pi6c_052Z2Z!]regulator-3v3-vcc-sd,regulator-fixed K 0"default vcc3v3_sd2Z2Z$bregulator-3v3-vcc-sys,regulator-fixed vcc3v3_sys2Z2Z!$regulator-5v0-vcc-sys,regulator-fixed vcc5v0_sysLK@LK@!regulator-5v0-vcc-usb30-otg0,regulator-fixed K 0"defaultvcc5v0_usb30_otg0LK@LK@! interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50vmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-hs200-1_8vnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesstdout-pathlabellinux,codedebounce-intervalcolorfunctionlinux,default-triggerenable-active-high