{8( _ ',friendlyarm,nanopi-r5srockchip,rk35687FriendlyElec NanoPi R5Saliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe310000/i2c@fe5e0000/rtc@51/ethernet@fe2a0000cpus cpu@0cpu,arm,cortex-a55 psci*7@IVc@u cpu@100cpu,arm,cortex-a55 psci*7@IVc@u cpu@200cpu,arm,cortex-a55 psci*7@IVc@u cpu@300cpu,arm,cortex-a55 psci*7@IVc@u l3-cache,cache,9@Kdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcڂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s(Bokaysimple-audio-card,codecIsimple-audio-card,cpuI pmu,arm,cortex-a55-pmu0S^ psci ,arm,psci-1.0#smcreserved-memory qshmem@10f000,arm,scmi-shmemxtimer,arm,armv8-timer0S   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob S_ sata-phy Bdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob S` sata-phy Bdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Sref_clksuspend_clkbus_clk host utmi_wide$Bokay usb2-phyusb3-phy=usb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Sref_clksuspend_clkbus_clk host usb2-phyusb3-phy utmi_wide$Bokayinterrupt-controller@fd400000 ,arm,gic-v3 @F S DYjAt(q msi-controller@fd440000,arm,gic-v3-itsD[usb@fd800000 ,generic-ehci SusbBokayusb@fd840000 ,generic-ohci SusbBokayusb@fd880000 ,generic-ehci SusbBokayusb@fd8c0000 ,generic-ohci SusbBokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdYio-domains&,rockchip,rk3568-pmu-io-voltage-domainBokay syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucruclock-controller@fdd20000,rockchip,rk3568-cruxin24m& 6G Kb i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c S.- i2cpclk!default Bokayregulator@1c ,tcs,tcs4525ovdd_cpu 50"regulator-state-mempmic@20,rockchip,rk809 #Sdefault$*B%N%Z%f%r%~%%%%regulatorsDCDC_REG1 vdd_logic pqregulator-state-memDCDC_REG2vdd_gpu pqGregulator-state-memDCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-memDCDC_REG5vcc_1v8w@w@regulator-state-memLDO_REG1vdda0v9_image~~Uregulator-state-memLDO_REG2 vdda_0v9  regulator-state-memLDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-memLDO_REG5 vccio_sdw@2Zregulator-state-memLDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-memLDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@Vregulator-state-memSWITCH_REG1vcc_3v3regulator-state-memSWITCH_REG2 vcc3v3_sd\regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart St ,baudclkapb_pclk&&'default  Bdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default# Bdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk)default# Bdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default# Bdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk+default# Bdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller. power-domain@7B,.power-domain@8 B-./.power-domain@9  B012.power-domain@10 B345678.power-domain@11 B9.power-domain@13 B:.power-domain@14 B;<=.power-domain@15 B>?@ABCDE.gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$S()' Ijobmmugpugpubus BokayFYGvideo-codec@fdea0400,rockchip,rk3568-vpu SIvdpu aclkhclkeH iommu@fdea0800,rockchip,rk3568-iommu@ S aclkiface lHrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga SZaclkhclksclk&$% ycoreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu S@ aclkhclkeI iommu@fdee0800,rockchip,rk3568-iommu@ S? aclkiface lIvideo-capture@fdfe0000,rockchip,rk3568-vicap S&6 aclkhclkdclkiclkeJ(yarsthrstdrstprstirstb  Bdisabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu S aclkifacel BdisabledJmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Sd biuciuciu-driveciu-sampleрyreset Bdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aS Imacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref ystmmacethb KLM Bdisabledmdio,snps,dwmac-mdio stmmac-axi-config #Krx-queues-config3Lqueue0tx-queues-configIMqueue0vop@fe040000 0@_vopgamma-lut S(%aclkhclkdclk_vp0dclk_vp1dclk_vp2eN b Bokay,rockchip,rk3568-vop&Kports port@0 endpoint@2iOWport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? S aclkifacel BokayNdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi SDpclkdphyP yapbb  Bdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi SEpclkdphyQ yapbb  Bdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  S-((iahbisfrcecrefdefault RST  b yBokayUVports port@0endpointiWOport@1endpointiXqos@fe128000,rockchip,rk3568-qossyscon ,qos@fe138080,rockchip,rk3568-qossyscon ;qos@fe138100,rockchip,rk3568-qossyscon <qos@fe138180,rockchip,rk3568-qossyscon =qos@fe148000,rockchip,rk3568-qossyscon -qos@fe148080,rockchip,rk3568-qossyscon .qos@fe148100,rockchip,rk3568-qossyscon /qos@fe150000,rockchip,rk3568-qossyscon 9qos@fe158000,rockchip,rk3568-qossyscon 3qos@fe158100,rockchip,rk3568-qossyscon 4qos@fe158180,rockchip,rk3568-qossyscon 5qos@fe158200,rockchip,rk3568-qossyscon 6qos@fe158280,rockchip,rk3568-qossyscon 7qos@fe158300,rockchip,rk3568-qossyscon 8qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon >qos@fe190280,rockchip,rk3568-qossyscon Bqos@fe190300,rockchip,rk3568-qossyscon Cqos@fe190380,rockchip,rk3568-qossyscon Dqos@fe190400,rockchip,rk3568-qossyscon Eqos@fe198000,rockchip,rk3568-qossyscon :qos@fe1a8000,rockchip,rk3568-qossyscon 0qos@fe1a8080,rockchip,rk3568-qossyscon 1qos@fe1a8100,rockchip,rk3568-qossyscon 2dfi@fe230000,rockchip,rk3568-dfi# S Ypcie@fe260000,rockchip,rk3568-pcie0@&_dbiapbconfig<SKJIHGIsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpciY`ZZZZ [( pcie-phyTq @ypipe Bokay 2#legacy-interrupt-controllerYD SHZmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Sb biuciuciu-driveciu-sampleрyresetBokay>FMWiz\default]^_`mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Sc biuciuciu-driveciu-sampleрyreset Bdisabledspi@fe300000 ,rockchip,sfc0@ Sexvclk_sfchclk_sfcadefault Bdisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 S&{}6 n6(|zy{}corebusaxiblocktimerBokayM defaultbcderng@fe388000,rockchip,rk3568-rng8@po coreahbmBokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ S4&=A6FqFq?C9mclk_txmclk_rxhclkftxPQ ytx-mrx-mb yBokay i2s@fe410000,rockchip,rk3568-i2s-tdmA S5&EI6FqFqGK:mclk_txmclk_rxhclkffrxtxRS ytx-mrx-mb default0ghijklmnopqry Bdisabledi2s@fe420000,rockchip,rk3568-i2s-tdmB S6&M6FqOO;mclk_txmclk_rxhclkfftxrxTytx-mb defaultstuvy Bdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC S7SW<mclk_txmclk_rxhclkfftxrxUV ytx-mrx-mb y Bdisabledpdm@fe440000,rockchip,rk3568-pdmD SLZYpdm_clkpdm_hclkf rxwxyz{|defaultXypdm-my Bdisabledspdif@fe460000,rockchip,rk3568-spdifF Sf mclkhclk_\ftxdefault}y Bdisableddma-controller@fe530000,arm,pl330arm,primecellS@S   apb_pclk&dma-controller@fe550000,arm,pl330arm,primecellU@S  apb_pclkfi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ S/HG i2cpclk~default  Bdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ S0JI i2cpclkdefault  Bdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ S1LK i2cpclkdefault  Bdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] S2NM i2cpclkdefault  Bdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ S3PO i2cpclkdefault Bokayrtc@51,haoyu,hym8563Q#S rtcic_32koutdefaultwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` S tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia SgRQspiclkapb_pclk&&txrxdefault   Bdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib ShTSspiclkapb_pclk&&txrxdefault   Bdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic SiVUspiclkapb_pclk&&txrxdefault   Bdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid SjXWspiclkapb_pclk&&txrxdefault   Bdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Subaudclkapb_pclk&&default  Bdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Sv# baudclkapb_pclk&&default Bokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Sw'$baudclkapb_pclk&&default  Bdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Sx+(baudclkapb_pclk&& default  Bdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Sy/,baudclkapb_pclk& & default  Bdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Sz30baudclkapb_pclk& & default  Bdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk S{74baudclkapb_pclk&&default  Bdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl S|;8baudclkapb_pclk&&default  Bdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm S}?<baudclkapb_pclk&&default  Bdisabledthermal-zonescpu-thermald tripscpu_alert0 p 'passivecpu_alert1 $ 'passivecpu_crit s ' criticalcooling-mapsmap0 20 7 gpu-thermal tripsgpu-threshold p 'passivegpu-target $ 'passivegpu-crit s ' criticalcooling-mapsmap0 2 7tsadc@fe710000,rockchip,rk3568-tsadcq Ss&6f@ `tsadcapb_pclkb  Fsdefaultsleep ] gBokay } saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr S]saradcapb_pclk ysaradc-apb Bokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault# Bdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault# Bdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault# Bdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault# Bdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault# Bdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault# Bdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault# Bdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault# Bdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault# Bdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault# Bdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault# Bdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault# Bdisabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe&"6yphy   Bokayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe&%6yphy   Bokayphy@fe870000,rockchip,rk3568-csi-dphyypclk yapbb  Bdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  yapb BdisabledPmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  yapb BdisabledQusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m S Bokayhost-port Bokay otg-port Bokayusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m S Bokayhost-port Bokay otg-port Bokaypinctrl,rockchip,rk3568-pinctrlb Y qgpio@fdd60000,rockchip,gpio-bank S!.   +  7DY#gpio@fe740000,rockchip,gpio-bankt S"cd  +  7DYgpio@fe750000,rockchip,gpio-banku S#ef  +@  7DYgpio@fe760000,rockchip,gpio-bankv S$gh  +`  7DYgpio@fe770000,rockchip,gpio-bankw S%ij  +  7DYpcfg-pull-up Cpcfg-pull-none Ppcfg-pull-none-drv-level-1 P ]pcfg-pull-none-drv-level-2 P ]pcfg-pull-none-drv-level-3 P ]pcfg-pull-up-drv-level-1 C ]pcfg-pull-up-drv-level-2 C ]pcfg-pull-none-smt P lacodecaudiopwmbt656bt1120camcan0can0m0-pins  can1can1m0-pins can2can2m0-pins   cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-bus8   bemmc-clk cemmc-cmd demmc-datastrobe eeth0eth1flashfspifspi-pins` agmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20    gmac0-rgmii-clk gmac0-rgmii-bus@ eth-phy0-reset-pin gmac1gpuhdmitxhdmitxm0-cec Thdmitx-scl Rhdmitx-sda Si2c0i2c0-xfer  !i2c1i2c1-xfer  ~i2c2i2c2m0-xfer i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrckrx ji2s1m0-lrcktx ii2s1m0-sclkrx hi2s1m0-sclktx gi2s1m0-sdi0  ki2s1m0-sdi1  li2s1m0-sdi2  mi2s1m0-sdi3 ni2s1m0-sdo0 oi2s1m0-sdo1 pi2s1m0-sdo2  qi2s1m0-sdo3  ri2s2i2s2m0-lrcktx ti2s2m0-sclktx si2s2m0-sdi ui2s2m0-sdo vi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk wpdmm0-clk1 xpdmm0-sdi0  ypdmm0-sdi1  zpdmm0-sdi2  {pdmm0-sdi3 |pmicpmic-int $pmupwm0pwm0m0-pins (pwm1pwm1m0-pins )pwm2pwm2m0-pins *pwm3pwm3-pins +pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ]sdmmc0-clk ^sdmmc0-cmd _sdmmc0-det `sdmmc1sdmmc2spdifspdifm0-tx }spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer 'uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2hym8563hym8563-int usbvcc5v0-usb-host-en vcc5v0-usb-otg-en gpio-keysgpio4-a0-k1-pin gpio-ledslan1-led-pin lan2-led-pin sys-led-pin wan-led-pin opp-table-0,operating-points-v2 opp-408000000 Q P P0 @opp-600000000 #F P P0 @opp-816000000 0, P P0 @ opp-1104000000 Aʹ 0 @opp-1416000000 Tfr 0 @opp-1608000000 _" 0 @opp-1800000000 kI 000 @opp-1992000000 v 000 @opp-table-1,operating-points-v2Fopp-200000000  P PB@opp-300000000  P PB@opp-400000000 ׄ P PB@opp-600000000 #F B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob S^ sata-phy Bdisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon ?qos@fe190100,rockchip,rk3568-qossyscon @qos@fe190200,rockchip,rk3568-qossyscon Asyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclkyphy Bokay pcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<SIsyspmcmsglegacyerrY` [( pcie-phy0@@'Tq @@@_dbiapbconfigypipeBokay 2# legacy-interrupt-controllerDY Spcie@fe280000,rockchip,rk3568-pcie  /($aclk_mstaclk_slvaclk_dbipclkauxpci<SIsyspmcmsglegacyerrY` [ ( pcie-phy0@(Tq @_dbiapbconfigypipeBokay 2 legacy-interrupt-controllerDY Sethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*SImacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref ystmmacethb Bokay&K6sY@ output  rgmii default # ) ?:P T< ]/mdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22defaultstmmac-axi-config #rx-queues-config3queue0tx-queues-configIqueue0can@fe570000,rockchip,rk3568v2-canfdW SA@ baudpclkUT ycoreapbdefault Bdisabledcan@fe580000,rockchip,rk3568v2-canfdX SCB baudpclkWV ycoreapbdefault Bdisabledcan@fe590000,rockchip,rk3568v2-canfdY SED baudpclkYX ycoreapbdefault Bdisabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe&6yphy   Bokaychosen fserial2:1500000n8adc-keys ,adc-keys r ~buttons w@ dbutton-maskrom MASKROM  hdmi-con,hdmi-connectoraportendpointiXregulator-vdd-usbc,regulator-fixed vdd_usbcLK@LK@regulator-vcc3v3-sys,regulator-fixed vcc3v3_sys2Z2Z%regulator-vcc5v0-sys,regulator-fixed vcc5v0_sysLK@LK@"regulator-vcc3v3-pcie,regulator-fixed vcc3v3_pcie2Z2Z  8#  @"regulator-vcc5v0-usb,regulator-fixed vcc5v0_usbLK@LK@regulator-vcc5v0-usb-host,regulator-fixed  $#defaultvcc5v0_usb_hostLK@LK@regulator-vcc5v0-usb-otg,regulator-fixed  $#defaultvcc5v0_usb_otgLK@LK@regulator-pcie30-avdd0v9,regulator-fixedpcie30_avdd0v9  %regulator-pcie30-avdd1v8,regulator-fixedpcie30_avdd1v8w@w@%gpio-keys ,gpio-keysdefaultbutton-reset 2 8 RESET gpio-leds ,gpio-ledsdefaultled-lan1  off ,lan 5 8 LAN-1led-lan2  off ,lan 5 8 LAN-2led-sys  ,power 8 SYS Iheartbeatled-wan  off ,wan 8 WAN interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1rtc0ethernet0device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosno-sdiono-mmcbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesvpcie3v3-supplyclock_in_outphy-handlephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaystdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-active-highstartup-delay-usdebounce-intervalcolordefault-statefunctionfunction-enumeratorlinux,default-trigger