8( :P %,hardkernel,odroid-m1rockchip,rk35687Hardkernel ODROID-M1aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fe5c0000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fdd40000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fe650000/serial@fdd50000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/mmc@fe310000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci%2@DQ^@p} cpu@100cpu,arm,cortex-a55psci%2@DQ^@p} cpu@200cpu,arm,cortex-a55psci%2@DQ^@p} cpu@300cpu,arm,cortex-a55psci%2@DQ^@p} l3-cache,cache'4@Fdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcՂ protocol@14hdmi-sound,simple-audio-cardHDMI i2s#=okaysimple-audio-card,codecDsimple-audio-card,cpuD pmu,arm,cortex-a55-pmu0NY psci ,arm,psci-1.0smcreserved-memory lshmem@10f000,arm,scmi-shmemstimer,arm,armv8-timer0N   zxin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob N_ sata-phy =disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob N` sata-phy=okayusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Nref_clksuspend_clkbus_clkhost utmi_wide=okay usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Nref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide=okayinterrupt-controller@fd400000 ,arm,gic-v3 @F N 8M^Ah(sl msi-controller@fd440000,arm,gic-v3-itsDsZusb@fd800000 ,generic-ehci Nusb=okayusb@fd840000 ,generic-ohci Nusb=okayusb@fd880000 ,generic-ehci Nusb=okayusb@fd8c0000 ,generic-ohci Nusb=okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdXio-domains&,rockchip,rk3568-pmu-io-voltage-domain=okay syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucruclock-controller@fdd20000,rockchip,rk3568-cruxin24m( 8G Mdi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c N.- i2cpclk default =okayregulator@1c ,tcs,tcs4525qvdd_cpu 50!regulator-state-mempmic@20,rockchip,rk809 "N(HMmclkHdefault#$,DU!a!m!y!!!!!!regulatorsDCDC_REG1 vdd_logic pqregulator-state-memDCDC_REG2vdd_gpu pqFregulator-state-memDCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-memDCDC_REG5vcc_1v8w@w@regulator-state-memLDO_REG1vdda0v9_image  Tregulator-state-memLDO_REG2 vdda_0v9  regulator-state-memLDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-memLDO_REG5 vccio_sdw@2Zregulator-state-memLDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-memLDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@Uregulator-state-memSWITCH_REG1vcc_3v3regulator-state-memSWITCH_REG2 vcc3v3_sd_regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Nt ,baudclkapb_pclk%%&default, =disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'default6 =disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default6 =disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)default6 =disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk*default6 =disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllerA power-domain@7U+Apower-domain@8 U,-.Apower-domain@9  U/01Apower-domain@10 U234567Apower-domain@11 U8Apower-domain@13 U9Apower-domain@14 U:;<Apower-domain@15 U=>?@ABCDAgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$N()' \jobmmugpugpubus=okayElFvideo-codec@fdea0400,rockchip,rk3568-vpu N\vdpu aclkhclkxG iommu@fdea0800,rockchip,rk3568-iommu@ N aclkiface Grga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga NZaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu N@ aclkhclkxH iommu@fdee0800,rockchip,rk3568-iommu@ N? aclkiface Hvideo-capture@fdfe0000,rockchip,rk3568-vicap N(8 aclkhclkdclkiclkxI(arsthrstdrstprstirstd =disabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu N aclkiface =disabledImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Nd biuciuciu-driveciu-sampleрreset =disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aN \macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethdJKL =disabledmdio,snps,dwmac-mdio stmmac-axi-config&6Jrx-queues-configFKqueue0tx-queues-config\Lqueue0vop@fe040000 0@rvopgamma-lut N(%aclkhclkdclk_vp0dclk_vp1dclk_vp2xM d=okay,rockchip,rk3568-vop(Mports port@0 endpoint@2|NVport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? N aclkiface =okayMdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi NDpclkdphyO apbd =disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi NEpclkdphyP apbd =disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  N-((iahbisfrcecrefdefault QRS dD=okayTUports port@0endpoint|VNport@1endpoint|Wqos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon Aqos@fe190300,rockchip,rk3568-qossyscon Bqos@fe190380,rockchip,rk3568-qossyscon Cqos@fe190400,rockchip,rk3568-qossyscon Dqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi# N Xpcie@fe260000,rockchip,rk3568-pcie0@&rdbiapbconfig<NKJIHG\syspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpciM`YYYY"Z* pcie-phyTl @pipe  =disabledlegacy-interrupt-controllerM8 NHYmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Nb biuciuciu-driveciu-sampleрreset=okay4> O"Xdefault[\]^cp_|mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Nc biuciuciu-driveciu-sampleрreset =disabledspi@fe300000 ,rockchip,sfc0@ Nexvclk_sfchclk_sfc`default=okay flash@0,jedec,spi-norpartitions,fixed-partitions partition@0SPLpartition@e0000 U-Boot Envpartition@100000U-Boot partition@300000splash0partition@400000 Filesystem@mmc@fe310000,rockchip,rk3568-dwcmshc1 N({}8 n6(|zy{}corebusaxiblocktimer=okay4 defaultabcdep|rng@fe388000,rockchip,rk3568-rng8@po coreahbm=okayi2s@fe400000,rockchip,rk3568-i2s-tdm@ N4(=A8FqFq?C9mclk_txmclk_rxhclkftxPQ tx-mrx-mdD=okay i2s@fe410000,rockchip,rk3568-i2s-tdmA N5(EI8FqFqGK:mclk_txmclk_rxhclkffrxtxRS tx-mrx-mddefaultghijD=okayi2s@fe420000,rockchip,rk3568-i2s-tdmB N6(M8FqOO;mclk_txmclk_rxhclkfftxrxTtx-mddefaultklmnD =disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC N7SW<mclk_txmclk_rxhclkfftxrxUV tx-mrx-mdD =disabledpdm@fe440000,rockchip,rk3568-pdmD NLZYpdm_clkpdm_hclkf rxopqrstdefaultXpdm-mD =disabledspdif@fe460000,rockchip,rk3568-spdifF Nf mclkhclk_\ftxdefaultuD =disableddma-controller@fe530000,arm,pl330arm,primecellS@N   apb_pclk %dma-controller@fe550000,arm,pl330arm,primecellU@N  apb_pclk fi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ N/HG i2cpclkvdefault  =disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ N0JI i2cpclkwdefault  =disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ N1LK i2cpclkxdefault  =disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] N2NM i2cpclkydefault  =disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ N3PO i2cpclkzdefault  =disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` N tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia NgRQspiclkapb_pclk%%txrxdefault {|}  =disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib NhTSspiclkapb_pclk%%txrxdefault ~  =disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic NiVUspiclkapb_pclk%%txrxdefault   =disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid NjXWspiclkapb_pclk%%txrxdefault   =disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Nubaudclkapb_pclk%%default, =disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Nv# baudclkapb_pclk%%default,=okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Nw'$baudclkapb_pclk%%default, =disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Nx+(baudclkapb_pclk%% default, =disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Ny/,baudclkapb_pclk% % default, =disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Nz30baudclkapb_pclk% % default, =disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk N{74baudclkapb_pclk%%default, =disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl N|;8baudclkapb_pclk%%default, =disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm N}?<baudclkapb_pclk%%default, =disabledthermal-zonescpu-thermal d . <tripscpu_alert0 Lp Xpassivecpu_alert1 L$ Xpassivecpu_crit Ls X criticalcooling-mapsmap0 c0 h gpu-thermal  . <tripsgpu-threshold Lp Xpassivegpu-target L$ Xpassivegpu-crit Ls X criticalcooling-mapsmap0 c htsadc@fe710000,rockchip,rk3568-tsadcq Ns(8f@ `tsadcapb_pclkd wsdefaultsleep  =okay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr N]saradcapb_pclk saradc-apb =okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault6 =disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault6 =disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault6 =disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault6 =disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault6 =disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault6 =disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault6 =disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault6 =disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault6 =disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault6 =disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault6 =disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault6 =disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe("8phy   &=okay 1phy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe(%8phy   &=okayphy@fe870000,rockchip,rk3568-csi-dphyypclk &apbd =disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz & apb =disabledOmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ & apb =disabledPusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m N <=okayhost-port &=okay 1otg-port &=okay 1usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m N <=okayhost-port &=okay 1otg-port &=okay 1pinctrl,rockchip,rk3568-pinctrldX lgpio@fdd60000,rockchip,gpio-bank N!.  L \  h8M"gpio@fe740000,rockchip,gpio-bankt N"cd L \  h8Mgpio@fe750000,rockchip,gpio-banku N#ef L \@  h8Mgpio@fe760000,rockchip,gpio-bankv N$gh L \`  h8Mgpio@fe770000,rockchip,gpio-bankw N%ij L \  h8Mpcfg-pull-up tpcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1 t pcfg-pull-up-drv-level-2 t pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can0m0-pins  can1can1m0-pins can2can2m0-pins   cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-rstnout eemmc-bus8   aemmc-clk bemmc-cmd cemmc-datastrobe deth0eth1flashfspifspi-dual-io-pins@ `gmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20    gmac0-rgmii-clk gmac0-rgmii-bus@ gmac1gpuhdmitxhdmitxm0-cec Shdmitx-scl Qhdmitx-sda Ri2c0i2c0-xfer   i2c1i2c1-xfer  vi2c2i2c2m0-xfer wi2c3i2c3m0-xfer xi2c4i2c4m0-xfer   yi2c5i2c5m0-xfer   zi2s1i2s1m0-lrcktx hi2s1m0-mclk $i2s1m0-sclktx gi2s1m0-sdi0  ii2s1m0-sdo0 ji2s2i2s2m0-lrcktx li2s2m0-sclktx ki2s2m0-sdi mi2s2m0-sdo ni2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk opdmm0-clk1 ppdmm0-sdi0  qpdmm0-sdi1  rpdmm0-sdi2  spdmm0-sdi3 tpmicpmic-int-l #pmupwm0pwm0m0-pins 'pwm1pwm1m0-pins (pwm2pwm2m0-pins )pwm3pwm3-pins *pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ [sdmmc0-clk \sdmmc0-cmd ]sdmmc0-det ^sdmmc1sdmmc2spdifspdifm0-tx uspi0spi0m0-pins0 }spi0m0-cs0 {spi0m0-cs1 |spi1spi1m0-pins0  spi1m0-cs0 ~spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer &uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ir-receiverir-receiver-pin ledsled-power-pin led-work-pin pciepcie-reset-pin vcc3v3-pcie-en-pin rk809hp-det-pin usbvcc5v0-usb-host-en-pin vcc5v0-usb-dr-en-pin opp-table-0,operating-points-v2 opp-408000000 Q P P0 @opp-600000000 #F P P0 @opp-816000000 0, P P0 @ opp-1104000000 Aʹ 0 @opp-1416000000 Tfr 0 @opp-1608000000 _" 0 @opp-1800000000 kI 000 @opp-1992000000 v 000 @opp-table-1,operating-points-v2Eopp-200000000  P PB@opp-300000000  P PB@opp-400000000 ׄ P PB@opp-600000000 #F B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob N^ sata-phy =disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon >qos@fe190100,rockchip,rk3568-qossyscon ?qos@fe190200,rockchip,rk3568-qossyscon @syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &&'wrefclk_mrefclk_npclkphy =okaypcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<N\syspmcmsglegacyerrM`"Z* pcie-phy0@@'Tl @@@rdbiapbconfigpipe =disabledlegacy-interrupt-controller8M Npcie@fe280000,rockchip,rk3568-pcie  /($aclk_mstaclk_slvaclk_dbipclkauxpci<N\syspmcmsglegacyerrM`" Z * pcie-phy0@(Tl @rdbiapbconfigpipe=okaydefault  legacy-interrupt-controller8M Nethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*N\macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethd=okay(M8sY@ *output 7 Brgmii 1!default KO T-mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22 ]N  m stmmac-axi-config&6rx-queues-configFqueue0tx-queues-config\queue0can@fe570000,rockchip,rk3568v2-canfdW NA@ baudpclkUT coreapbdefault =disabledcan@fe580000,rockchip,rk3568v2-canfdX NCB baudpclkWV coreapbdefault =disabledcan@fe590000,rockchip,rk3568v2-canfdY NED baudpclkYX coreapbdefault =disabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe(8phy   &=okay 1chosen serial2:1500000n8regulator-dc-12v,regulator-fixeddc_12vhdmi-con,hdmi-connectoraportendpoint|Wir-receiver,gpio-ir-receiver R"defaultleds ,gpio-ledsled-0 R" power  keep default-ondefaultled-1 R" heartbeat  heartbeatdefaultrk809-sound,simple-audio-carddefault Analog RK817 i2s "#% HeadphoneHeadphonesSpeakerSpeaker- HeadphonesHPOLHeadphonesHPORSpeakerSPKOsimple-audio-card,cpuDsimple-audio-card,codecDregulator-vcc3v3-pcie,regulator-fixed vcc3v3_pcie  $default2Z2Z )!regulator-vcc3v3-sys,regulator-fixed vcc3v3_sys2Z2Z!regulator-vcc5v0-sys,regulator-fixed vcc5v0_sysLK@LK@regulator-vcc5v0-usb-host,regulator-fixedvcc5v0_usb_host  $"defaultLK@LK@regulator-vcc5v0-usb-otg,regulator-fixedvcc5v0_usb_otg  $"defaultLK@LK@ interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50vmmc-supplyvqmmc-supplyspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthlabelnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsphy-supplyrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfreset-gpiosvpcie3v3-supplyclock_in_outphy-handlephy-modetx_delayrx_delayreset-assert-usreset-deassert-usstdout-pathfunctioncolordefault-statelinux,default-triggersimple-audio-card,hp-det-gpiossimple-audio-card,widgetssimple-audio-card,routingenable-active-highgpiostartup-delay-us