z8h((hlgameforce,acerockchip,rk3588s +7Gameforce Ace=handsetaliasesJ/pinctrl/gpio@fd8a0000P/pinctrl/gpio@fec20000V/pinctrl/gpio@fec30000\/pinctrl/gpio@fec40000b/pinctrl/gpio@fec50000h/i2c@fd880000m/i2c@fea90000r/i2c@feaa0000w/i2c@feab0000|/i2c@feac0000/i2c@fead0000/i2c@fec80000/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000/mmc@fe2d0000cpus+cpu-mapcluster0core0 core1 core2 core3 cluster1core0 core1 cluster2core0 core1 cpu@0cpuarm,cortex-a55!psci/B I Yf@x@   cpu@100cpuarm,cortex-a55!psci/B I Yf@x@  cpu@200cpuarm,cortex-a55!psci/B I Yf@x@  cpu@300cpuarm,cortex-a55!psci/B I Yf@x@  cpu@400cpuarm,cortex-a76!psci/B I Yf@x@ cpu@500cpuarm,cortex-a76!psci/B I Yf@x@ cpu@600cpuarm,cortex-a76!psci/B I Yf@x@ cpu@700cpuarm,cortex-a76!psci/B I Yf@x@ idle-statespscicpu-sleeparm,idle-state0GdXxh l2-cache-l0cache[h@zy l2-cache-l1cache[h@zy l2-cache-l2cache[h@zy l2-cache-l3cache[h@zy l2-cache-b0cache[h@zy l2-cache-b1cache[h@zy l2-cache-b2cache[h@zy l2-cache-b3cache[h@zy l3-cachecache[0h@zy display-subsystemrockchip,display-subsystemfirmwarescmi arm,scmi-smc+protocol@14 protocol@16 hdmi0-soundsimple-audio-cardi2shdmi0okaysimple-audio-card,codecsimple-audio-card,cpupmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmu psci arm,psci-1.0(smcclock-0 fixed-clock*)׫:splltimerarm,armv8-timerP    %Msec-physphysvirthyp-physhyp-virtclock-1 fixed-clock*n6:xin24mclock-2 fixed-clock*:xin32kreserved-memory+]shmem@10f000arm,scmi-shmemd gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf k { B!!!corecoregroupstacks 0\]^ Mjobmmugpu" okay#$ usb@fc000000rockchip,rk3588-dwc3snps,dwc3@B!!!ref_clksuspend_clkbus_clkotg %&usb2-phyusb3-phy utmi_wide"!R %Fgokayport+endpoint@0' usb@fc800000"rockchip,rk3588-ehcigeneric-ehciB!!!()usb" disabledusb@fc840000"rockchip,rk3588-ohcigeneric-ohciB!!!()usb" disabledusb@fc880000"rockchip,rk3588-ehcigeneric-ehciB!!!*+usb" disabledusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohciB!!!*+usb" disabledusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(B!j!i!h!k!r&ref_clksuspend_clkbus_clkutmipipehost, usb3-phy utmi_wide!4%Fg disablediommu@fc900000 arm,smmu-v3 @qsvoMeventqgerrorpriqcmdq-sync iommu@fcb00000 arm,smmu-v3 @}{Meventqgerrorpriqcmdq-sync disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX syscon@fd58c000rockchip,rk3588-sys-grfsysconX tsyscon@fd5e8000!rockchip,rk3588-dcphy-grfsyscon^@ syscon@fd5ec000!rockchip,rk3588-dcphy-grfsyscon^@ syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@  usyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` B! syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@B! vsyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@ syscon@fd5b0000rockchip,rk3588-php-grfsyscon[ -syscon@fd5b4000#rockchip,rk3588-csidphy-grfsyscon[@ syscon@fd5b5000#rockchip,rk3588-csidphy-grfsyscon[P syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[ syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@  syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@ syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+ usb2phy@0rockchip,rk3588-usb2phyB!phyclk :usb480m_phy0!m!phyapbokay otg-portokay %syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phyB!phyclk :usb480m_phy2!o!phyapb disabled (host-port disabled )syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phyB!phyclk :usb480m_phy3!p! phyapb disabled *host-port disabled +syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^ syscon@fd5f0000rockchip,rk3588-iocsyscon_ !sram@fd600000 mmio-sram`]`+clock-controller@fd7c0000rockchip,rk3588-cru|k!!!!!!!!!!!!!]!q!!@{A.2Fq)׫ׄe/ׄ eZ р - !i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=B!t!s i2cpclk.default+okayregulator@42rockchip,rk8602B )AdpYvdd_cpu_big0_s0h}/ regulator-state-memregulator@43 rockchip,rk8603rockchip,rk8602C )AdpYvdd_cpu_big1_s0h}/ regulator-state-memserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartKB!!baudclkapb_pclk00txrx1default disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwmB!! pwmpclk2default disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwmB!! pwmpclk3default disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm B!! pwmpclk4default disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0B!! pwmpclk5default disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd wpower-controller!rockchip,rk3588-power-controller+okay "power-domain@8+6power-domain@9  B!!!#!"! 789+power-domain@10 B!!!#!":power-domain@11 B!!!#!";power-domain@12 B!!!<=>?$power-domain@13 +power-domain@14(B!!!!!@power-domain@15 B!!!!Apower-domain@16B!! BCD+power-domain@17 B!!!! EFGpower-domain@21B!!!!!!!!!!!!!!!!!! HIJKLMNO+power-domain@23B!C!A!Ppower-domain@14 B!!!!@power-domain@15B!!!Apower-domain@22B!!Qpower-domain@24B![!Z!]RS+power-domain@258B!!!!!!!ZTpower-domain@268B!!!!!!!QUVpower-domain@270B!!!!!!WXYZ+power-domain@28 B!!!![\power-domain@29(B!!!!!]^power-domain@30B!z!{_power-domain@31@B!W!!!!!!!`abcpower-domain@33!B!W!Z![power-domain@34"B!W!Z![power-domain@37%B!!2dpower-domain@38&B!4!5power-domain@40(enpu@fdab0000rockchip,rk3588-rknn-core00 pccnacoren B!! !#aclkhclknpupclkk { !!srst_asrst_h" fokay 66iommu@fdab9000,rockchip,rk3588-iommurockchip,rk3568-iommu nB!!  aclkiface" okay fnpu@fdac0000rockchip,rk3588-rknn-core00 pccnacoreo B!! !#aclkhclknpupclkk { !!srst_asrst_h" gokay 66iommu@fdaca000,rockchip,rk3588-iommurockchip,rk3568-iommuoB!! aclkiface" okay gnpu@fdad0000rockchip,rk3588-rknn-core00 pccnacorep B!! !#aclkhclknpupclkk { !!srst_asrst_h" hokay 66iommu@fdada000,rockchip,rk3588-iommurockchip,rk3568-iommupB!! aclkiface" okay hvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuwMvdpuB!! aclkhclki"iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v aclkifaceB!!" irga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgatB!!!aclkhclksclk!r!q!p coreaxiahb"video-codec@fdba0000rockchip,rk3588-vepu121zB!! aclkhclkj"iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu@yB!! aclkiface" jvideo-codec@fdba4000rockchip,rk3588-vepu121@|B!! aclkhclkk"iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuH@{B!! aclkiface" kvideo-codec@fdba8000rockchip,rk3588-vepu121~B!! aclkhclkl"iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu@}B!! aclkiface" lvideo-codec@fdbac000rockchip,rk3588-vepu121B!! aclkhclkm"iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu@B!! aclkiface" mvideo-codec@fdc38000rockchip,rk3588-vdec0ÁÀÆfunctionlinkcache_(B!!!!!axiahbcabaccorehevc_cabac k!!!!{/#F#F;n"(!C!B!F!H!Gaxiahbcabaccorehevc_cabac#oiommu@fdc38700,rockchip,rk3588-iommurockchip,rk3568-iommu Ç@Ç@@`B!! aclkiface" nvideo-codec@fdc40000rockchip,rk3588-vdec0functionlinkcachea(B!!!!!axiahbcabaccorehevc_cabac k!!!!{/#F#F;p"(!J!I!M!O!Naxiahbcabaccorehevc_cabac#qiommu@fdc40700,rockchip,rk3588-iommurockchip,rk3568-iommu @@@bB!! aclkiface" pvideo-codec@fdc70000rockchip,rk3588-av1-vpulMvdpuk!A!C{ׄׄB!A!C aclkhclk" !!!!vop@fdd90000rockchip,rk3588-vop BPvopgamma-lut<B!]!\!a!b!c!d![rDaclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voppll_hdmiphy0s"t(u9vJwokayports+ port@0+endpoint@2x port@1+port@2+port@3+endpoint@4y }iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~B!]!\ aclkiface"okay sspdif-tx@fddb0000,rockchip,rk3588-spdifrockchip,rk3568-spdifW!k! mclkhclkB!!txz"n disabledi2s@fddc0000rockchip,rk3588-i2s-tdmB!!!mclk_txmclk_rxhclkk!W!{tx"!tx-mn disabledspdif-tx@fdde0000,rockchip,rk3588-spdifrockchip,rk3568-spdifW!k!A mclkhclkB!D!@txz"n disabledi2s@fddf0000rockchip,rk3588-i2s-tdmB!4!4!5mclk_txmclk_rxhclkk!1W!{tx"!tx-mnokay i2s@fddfc000rockchip,rk3588-i2s-tdmB!0!0!,mclk_txmclk_rxhclkk!-W!{rx"!rx-mn disableddsi@fde20000rockchip,rk3588-mipi-dsi2B!e!g pclksys!apb"| dcphyuokay+ports+port@0endpoint} yport@1endpoint~ panel@0$huiling,hl055fhav028chimax,hx8399cdefault Zportendpoint ~dsi@fde30000rockchip,rk3588-mipi-dsi2B!f!h pclksys!apb" dcphyu disabledports+port@0port@1dp@fde50000rockchip,rk3588-dp@k!{$(B!!!!!apbauxhdcpi2sspdif&"!n disabledports+port@0port@1hdmi@fde80000rockchip,rk3588-dw-hdmi-qp0B!!!!4!R!pclkearcrefaudhdphclk_vo1PhMavpcecearcmainhpdrdefault "!!0refhdptvnokay ports+port@0endpoint xport@1endpoint :edp@fdec0000rockchip,rk3588-edpB!!dppclkrdp"!!dpapbv disabledports+port@0port@1qos@fdf35000rockchip,rk3588-qossysconP  <qos@fdf35200rockchip,rk3588-qossysconR  =qos@fdf35400rockchip,rk3588-qossysconT  >qos@fdf35600rockchip,rk3588-qossysconV  ?qos@fdf36000rockchip,rk3588-qossyscon`  _qos@fdf39000rockchip,rk3588-qossyscon  dqos@fdf3d800rockchip,rk3588-qossyscon  eqos@fdf3e000rockchip,rk3588-qossyscon  aqos@fdf3e200rockchip,rk3588-qossyscon  `qos@fdf3e400rockchip,rk3588-qossyscon  bqos@fdf3e600rockchip,rk3588-qossyscon  cqos@fdf40000rockchip,rk3588-qossyscon  ]qos@fdf40200rockchip,rk3588-qossyscon  ^qos@fdf40400rockchip,rk3588-qossyscon  Wqos@fdf40500rockchip,rk3588-qossyscon  Xqos@fdf40600rockchip,rk3588-qossyscon  Yqos@fdf40800rockchip,rk3588-qossyscon  Zqos@fdf41000rockchip,rk3588-qossyscon  [qos@fdf41100rockchip,rk3588-qossyscon  \qos@fdf60000rockchip,rk3588-qossyscon  Bqos@fdf60200rockchip,rk3588-qossyscon  Cqos@fdf60400rockchip,rk3588-qossyscon  Dqos@fdf61000rockchip,rk3588-qossyscon  Eqos@fdf61200rockchip,rk3588-qossyscon  Fqos@fdf61400rockchip,rk3588-qossyscon  Gqos@fdf62000rockchip,rk3588-qossyscon  @qos@fdf63000rockchip,rk3588-qossyscon0  Aqos@fdf64000rockchip,rk3588-qossyscon@  Pqos@fdf66000rockchip,rk3588-qossyscon`  Hqos@fdf66200rockchip,rk3588-qossysconb  Iqos@fdf66400rockchip,rk3588-qossyscond  Jqos@fdf66600rockchip,rk3588-qossysconf  Kqos@fdf66800rockchip,rk3588-qossysconh  Lqos@fdf66a00rockchip,rk3588-qossysconj  Mqos@fdf66c00rockchip,rk3588-qossysconl  Nqos@fdf66e00rockchip,rk3588-qossysconn  Oqos@fdf67000rockchip,rk3588-qossysconp  Qqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon  :qos@fdf71000rockchip,rk3588-qossyscon  ;qos@fdf72000rockchip,rk3588-qossyscon  7qos@fdf72200rockchip,rk3588-qossyscon"  8qos@fdf72400rockchip,rk3588-qossyscon$  9qos@fdf80000rockchip,rk3588-qossyscon  Tqos@fdf81000rockchip,rk3588-qossyscon  Uqos@fdf81200rockchip,rk3588-qossyscon  Vqos@fdf82000rockchip,rk3588-qossyscon  Rqos@fdf82200rockchip,rk3588-qossyscon"  Sdfi@fe060000rockchip,rk3588-dfi@&0:Jpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?0B!C!H!>!M!R!)aclk_mstaclk_slvaclk_dbipclkauxpipepciPMsyspmcmsglegacyerr`00&000, pcie-phy""T]  @0 @@dbiapbconfig!)!. pwrpipe+okaydefault legacy-interrupt-controller:  pcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O0B!D!I!?!N!S!s)aclk_mstaclk_slvaclk_dbipclkauxpipepciPMsyspmcmsglegacyerr`@@&@@0 pcie-phy""T]  @0 A@dbiapbconfig!*!/ pwrpipe+ disabledlegacy-interrupt-controller:  ethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a Mmacirqeth_wake_irq(B!6!7!Y!^!50stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!$ stmmacethtO-`p disabledmdiosnps,dwmac-mdio+stmmac-axi-config rx-queues-config queue0queue1tx-queues-config queue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(B!b!_!e!T!osatapmaliverxoobrefasic+ disabledsata-port@0@ sata-phy% 4 sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(B!d!a!g!V!qsatapmaliverxoobrefasic+ disabledsata-port@0@, sata-phy% 4 spi@fe2b0000 rockchip,sfc+@B!/!0clk_sfchclk_sfc+ disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ B  !!biuciuciu-driveciu-sampleCNрdefault"(okay\fxmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ B!!!!biuciuciu-driveciu-sampleCNрdefault"%okay\x+wifi@1%brcm,bcm43456-fmacbrcm,bcm4329-fmac  Mhost-wakedefaultmmc@fe2e0000rockchip,rk3588-dwcmshc.k!-!.!, { n6 (B!,!*!+!-!.corebusaxiblocktimerN default(!!!!!corebusaxiblocktimerokay\   4rng@fe378000rockchip,rk3588-rng7B 0i2s@fe470000rockchip,rk3588-i2s-tdmGB!+!/!(mclk_txmclk_rxhclkk!)!-W!!00txrx"&!*!+ tx-mrx-m Bdefaultnokay 3i2s@fe480000rockchip,rk3588-i2s-tdmHB!y!}!umclk_txmclk_rxhclk00txrx!^!_ tx-mrx-m Bdefault(n disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sIB!!i2s_clki2s_hclkk!W!zztxrx"&defaultn disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJB!%!i2s_clki2s_hclkk!"W!zztxrx"&defaultn disabledspdif-tx@fe4e0000,rockchip,rk3588-spdifrockchip,rk3568-spdifNW!k!7 mclkhclkB!9!6tx0default"&n disabledspdif-tx@fe4f0000,rockchip,rk3588-spdifrockchip,rk3568-spdifOW!k!= mclkhclkB!?!<txzdefault"&n disabledinterrupt-controller@fe600000 arm,gic-v3 `h : ] ma w8 ]+ msi-controller@fe640000arm,gic-v3-itsd ]   msi-controller@fe660000arm,gic-v3-itsf ]  ppi-partitionsinterrupt-partition-0  interrupt-partition-1   dma-controller@fea10000arm,pl330arm,primecell@ VW B!n apb_pclk  0dma-controller@fea30000arm,pl330arm,primecell@ XY B!o apb_pclk  zi2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2cB!!{ i2cpclk>default+ disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!!| i2cpclk?default+okayregulator@42rockchip,rk8602B )~Adp Yvdd_npu_s0h}/ 6regulator-state-memi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!!} i2cpclk@default+okaytouchscreen@14 goodix,gt911  default   8  i2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!!~ i2cpclkAdefault+okayadc@48 ti,ads1015H &+ -channel@4channel@5channel@6channel@7imu@68invensense,mpu6880h i2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!! i2cpclkBdefault+ disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !B!T!W pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdtB!d!c tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiFB!!spiclkapb_pclk00txrx 8 default+ disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiGB!!spiclkapb_pclk00txrx 8 default+ disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiHB!!spiclkapb_pclkzztxrx 8default+okayk!{ pmic@0rockchip,rk806 ? K default [B@ m / / / / / / / / / /  /  % 2/dvs1-null-pins >gpio_pwrctrl1 Cpin_fun0 dvs2-null-pins >gpio_pwrctrl2 Cpin_fun0 dvs3-null-pins >gpio_pwrctrl3 Cpin_fun0 regulatorsdcdc-reg1 L ^)~Adp Yvdd_gpu_s0h0 $regulator-state-memdcdc-reg2 z L)~Adph0Yvdd_cpu_lit_s0 regulator-state-memdcdc-reg3 z L) qA L Yvdd_logic_s0h0regulator-state-mem  qdcdc-reg4 z L)~Adp Yvdd_vdenc_s0h0regulator-state-memdcdc-reg5 z LA L) h0 Yvdd_ddr_s0regulator-state-mem Pdcdc-reg6 z L Yvdd2_ddr_s3regulator-state-mem dcdc-reg7 z L)AYvdd_2v0_pldo_s3 regulator-state-mem  dcdc-reg8 z L)2ZA2Z Yvcc_3v3_s3  regulator-state-mem  2Zdcdc-reg9 z L Yvddq_ddr_s0regulator-state-memdcdc-reg10 z L)w@Aw@ Yvcc_1v8_s3  regulator-state-mem  w@pldo-reg1 z L)w@Aw@ Yavcc_1v8_s0regulator-state-mempldo-reg2 z L)w@Aw@ Yvcc_1v8_s0 regulator-state-mem w@pldo-reg3 z L)OAO Yavdd_1v2_s0regulator-state-mempldo-reg4 z L)2ZA2Z Yvcc_3v3_s0regulator-state-mempldo-reg5 z L)2ZAw@ Yvccio_sd_s0 regulator-state-mempldo-reg6 z L)w@Aw@Yvcc_1v8_s3_pldo6regulator-state-mem  w@nldo-reg1 z L) qA q Yvdd_0v75_s3regulator-state-mem  qnldo-reg2 z L) PA PYvdd_ddr_pll_s0regulator-state-mem Pnldo-reg3 z L) |A | Yavdd_0v75_s0regulator-state-memnldo-reg4 z LA P) P Yvdd_0v85_s0regulator-state-memnldo-reg5 z LA q) q Yvdd_0v75_s0regulator-state-memspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiIB!!spiclkapb_pclkzztxrx 8 default+ disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartLB!!baudclkapb_pclk00 txrxdefault disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartMB!!baudclkapb_pclk0 0 txrxdefaultokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartNB!!baudclkapb_pclk0 0 txrxdefault disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartOB!!baudclkapb_pclkz z txrxdefault disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartPB!!baudclkapb_pclkz z txrxdefault disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQB!!baudclkapb_pclkz ztxrxdefault disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartRB!!baudclkapb_pclk{{txrxdefault disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartSB!!baudclkapb_pclk{ { txrxdefault disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartTB!!baudclkapb_pclk{ { txrx defaultokay bluetoothbrcm,bcm4345c5Blpo   default pwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmB!L!K pwmpclkdefault disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmB!L!K pwmpclkdefault disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm B!L!K pwmpclkdefault disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0B!L!K pwmpclkdefault disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmB!O!N pwmpclkdefault disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmB!O!N pwmpclkdefault disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm B!O!N pwmpclkdefault disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0B!O!N pwmpclkdefault disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmB!R!Q pwmpclkdefaultokay <pwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmB!R!Q pwmpclkdefaultokay 5pwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm B!R!Q pwmpclkdefault disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0B!R!Q pwmpclkdefault disabledthermal-zonespackage-thermal   tripspackage-crit )8 5 Ecriticalpackage-fan0 ) 5Eactive package-fan1 ) 5Eactive cooling-mapsmap1 @ Emap2 @ Ebigcore0-thermal d  tripsbigcore0-alert )L 5Epassive bigcore0-crit )8 5 Ecriticalcooling-mapsmap0 @ Ebigcore2-thermal d  tripsbigcore2-alert )L 5Epassive bigcore2-crit )8 5 Ecriticalcooling-mapsmap0 @ E littlecore-thermal d  tripslittlecore-alert )L 5Epassive littlecore-crit )8 5 Ecriticalcooling-mapsmap0 @0 Ecenter-thermal   tripscenter-crit )8 5 Ecriticalgpu-thermal d  tripsgpu-alert )L 5Epassive gpu-crit )8 5 Ecriticalcooling-mapsmap0 @ Enpu-thermal   tripsnpu-crit )8 5 Ecriticaltsadc@fec00000rockchip,rk3588-tsadcB!!tsadcapb_pclkk!{!V!Wtsadc-apbtsadc T k  defaultsleep okay adc@fec10000rockchip,rk3588-saradc &B!!saradcapb_pclk!U saradc-apbokay  ,i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cB!! i2cpclkCdefault+okaytypec@22 fcs,fusb302" default  connectorusb-c-connector dual USB-C B@ dual  ,,, , %sinkports+port@0endpoint port@1endpoint 'port@2endpoint rtc@51haoyu,hym8563Q:hym8563 default 4 battery@62cellwise,cw2015b@ B vjjjhfb^ZX_YF=5-(!)8DP(HVfffj>l= 8I{;w/dI [ x okaycharger@6b ti,bq25703ak LK@  xdefault  regulatorsvbus   default )M AL, Yusb_otg_vbus i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cB!! i2cpclkD default+okayaudio-codec@11everest,es8388everest,es8328{k!1  B!1      n 2i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!! i2cpclkEdefault+ disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJB!!spiclkapb_pclk{ {txrx 8 default+ disabledefuse@fecc0000rockchip,rk3588-otp B!!!!otpapb_pclkphyarb!!! otpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1cnpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[ B!p apb_pclk  {phy@fed60000rockchip,rk3588-hdptx-phy B!!Trefapb8!#!!c!d!e!!!""phyapbinitcmnlaneroplllcpllokay rphy@fed80000rockchip,rk3588-usbdp-phyB!!l!Vrefclkimmortalpclkutmi(! ! ! !!initcmnlanepcs_apbpma_apb.?okayUadefault t    &port+endpoint@0 endpoint@1 phy@feda0000rockchip,rk3588-mipi-dcphyB!! pclkref !i!!!jm_phyapbgrfs_phyokay |phy@fedb0000rockchip,rk3588-mipi-dcphyB!! pclkref !k!!!lm_phyapbgrfs_phy disabled phy@fedc0000rockchip,rk3588-csi-dphyB!pclk!!apbphy disabledphy@fedc8000rockchip,rk3588-csi-dphy܀B!pclk!!apbphy disabledphy@fee00000rockchip,rk3588-naneng-combphyB!!v!W refapbpipek!{!<!Cphyapb- disabled phy@fee20000rockchip,rk3588-naneng-combphyB!!x!W refapbpipek!{!>!Ephyapb- okay ,sram@ff001000 mmio-sram]+codec-sram@0 ocodec-sram@78000p qpinctrlrockchip,rk3588-pinctrl]!+ "gpio@fd8a0000rockchip,gpio-bankB!q!r K" : ? gpio@fec20000rockchip,gpio-bankB!s!t K" : ? gpio@fec30000rockchip,gpio-bankB!u!v K"@ : ?gpio@fec40000rockchip,gpio-bankB!w!x K"` : ? gpio@fec50000rockchip,gpio-bankB!y!z K" : ?  pcfg-pull-up )pcfg-pull-down %pcfg-pull-none #pcfg-pull-none-drv-level-2 +pcfg-pull-up-drv-level-1 *pcfg-pull-up-drv-level-2 $pcfg-pull-none-smt (pcfg-pull-none-drv-level-1-smt 'pcfg-pull-none-drv-level-5-smt &auddsmbt1120can0can1can2cifclk32kclk32k-in+ # cpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout+# emmc-bus8+$$$$$$$$ emmc-clk+$ emmc-cmd+$ emmc-data-strobe+% eth1fspigmac1gpuhdmihdmim0-tx0-cec+# hdmim0-tx0-scl+& hdmim0-tx0-sda+' hdmi0-en+ # 9i2c0i2c0m2-xfer +(( .i2c1i2c1m0-xfer + ( ( i2c2i2c2m0-xfer + ( ( i2c3i2c3m0-xfer + ( ( i2c4i2c4m2-xfer + ( ( i2c5i2c5m0-xfer + ( ( i2c6i2c6m3-xfer + ( ( i2c7i2c7m0-xfer + ( (  i2c8i2c8m0-xfer + ( ( i2s0i2s0-lrck+# i2s0-mclk+# i2s0-sclk+# i2s0-sdi0+# i2s0-sdo0+# i2s1i2s1m0-lrck+# i2s1m0-sclk+# i2s1m0-sdi0+# i2s1m0-sdi1+# i2s1m0-sdi2+# i2s1m0-sdi3+# i2s1m0-sdo0+ # i2s1m0-sdo1+ # i2s1m0-sdo2+ # i2s1m0-sdo3+ # i2s2i2s2m1-lrck+# i2s2m1-sclk+ # i2s2m1-sdi+ # i2s2m1-sdo+ # i2s3i2s3-lrck+# i2s3-sclk+# i2s3-sdi+# i2s3-sdo+# jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp+)###### pmupwm0pwm0m0-pins+# 2pwm1pwm1m0-pins+# 3pwm2pwm2m0-pins+# 4pwm3pwm3m0-pins+# 5pwm4pwm4m0-pins+ # pwm5pwm5m0-pins+ # pwm6pwm6m0-pins+ # pwm7pwm7m0-pins+ # pwm8pwm8m0-pins+ # pwm9pwm9m0-pins+ # pwm10pwm10m0-pins+ # pwm11pwm11m0-pins+ # pwm12pwm12m1-pins+ # pwm13pwm13m1-pins+ # pwm14pwm14m0-pins+ # pwm15pwm15m0-pins+ # refclksatasata0sata1sata2sdiosdiom1-pins`+#))))) sdmmcsdmmc-bus4@+$$$$ sdmmc-clk+$ sdmmc-cmd+$ sdmmc-det+) spdif0spdif0m0-tx+# spdif1spdif1m0-tx+# spi0spi0m0-pins0+*** spi0m0-cs0+* spi0m0-cs1+* spi1spi1m1-pins0+*** spi1m1-cs0+* spi1m1-cs1+* spi2spi2m2-pins0+* ** spi2m2-cs0+ * spi3spi3m1-pins0+* ** spi3m1-cs0+* spi3m1-cs1+* spi4spi4m0-pins0+*** spi4m0-cs0+* spi4m0-cs1+* tsadctsadc-shut-org+# uart0uart0m1-xfer +) ) 1uart1uart1m1-xfer + ) ) uart2uart2m0-xfer + ) ) uart3uart3m1-xfer + ) ) uart4uart4m1-xfer + ) ) uart5uart5m1-xfer + ) ) uart6uart6m1-xfer + ) ) uart7uart7m1-xfer + ) ) uart8uart8m1-xfer + ) ) uart9uart9m2-xfer + ) ) uart9m2-ctsn+ # uart9m2-rtsn+ # vopbt656gpio-functsadc-gpio-func+# audio-amplifierheadphone-amplifier-en+# 8headphone-detect+# .speaker-amplifier-en+# @btbt-enable-h+# bt-host-wake-l+% bt-wake-l+ ) chargerboost-enable-h+#  charger-int-h+) hym8563hym8563-int+) gpio-btnsbtn-pins-ctrl+)))))) ) ) ) ) )))))) 6gpio-ledsled-pins +)) 7lcdlcd-bl-en+# 4lcd-rst+# pcie-pinspcie-rst+) sd-pwrsd-s0-pwr+ ) Bspk-pwrvcc5v0-spk-pwr+) Ctouchtouch-int+) touch-rst+) usb-typecusbc0-int+) usbc-sbu-dc +## vcc3v3-lcdvcc-lcd-h+) Avibratorvib-left-h+% >vib-right-h+% =wifiwifi-enable-h+ ) ?wifi-host-wake-irq+% opp-table-cluster0operating-points-v29 opp-1008000000D< K L L~Y@opp-1200000000DG K 4 4~Y@opp-1416000000DTfr K ~Y@jopp-1608000000D_" K P P~Y@opp-1800000000DkI K~~~Y@opp-table-cluster1operating-points-v29 opp-1200000000DG K L LB@Y@opp-1416000000DTfr K  B@Y@opp-1608000000D_" K B@Y@opp-1800000000DkI K P PB@Y@opp-2016000000Dx) KHHB@Y@opp-2208000000Dh KllB@Y@opp-2400000000D  KB@B@B@Y@opp-table-cluster2operating-points-v29 opp-1200000000DG K L LB@Y@opp-1416000000DTfr K  B@Y@opp-1608000000D_" K B@Y@opp-1800000000DkI K P PB@Y@opp-2016000000Dx) KHHB@Y@opp-2208000000Dh KllB@Y@opp-2400000000D  KB@B@B@Y@opp-table-gpuoperating-points-v2 #opp-300000000D K L L Popp-400000000Dׄ K L L Popp-500000000De K L L Popp-600000000D#F K L L Popp-700000000D)' K ` ` Popp-800000000D/ K q q Popp-900000000D5 K 5 5 Popp-1000000000D; K P P Pchosenvserial2:1500000n8adc-keys adc-keys,buttonsw@<button-vol-up VOLUMEUPsBhbutton-vol-down VOLUMEDOWNr\adc-joystick adc-joystick ,,,,<+axis@0(axis@1(axis@2(axis@3(adc-trigger adc-joystick--<+axis@0zaxis@1analog-soundsimple-audio-card.default/0#1i2sE1 drockchip,es8388-codecHeadphonesSpeakerdSpeaker Amplifier INLLOUT2Speaker Amplifier INRROUT2SpeakerSpeaker Amplifier OUTLSpeakerSpeaker Amplifier OUTRHeadphones Amplifier INLLOUT1Headphones Amplifier INRROUT1HeadphonesHeadphones Amplifier OUTLHeadphonesHeadphones Amplifier OUTRLINPUT1Microphone JackRINPUT1Microphone JackLINPUT2Onboard MicrophoneRINPUT2Onboard Microphone^MicrophoneMicrophone JackMicrophoneOnboard MicrophoneHeadphoneHeadphonesSpeakerSpeakersimple-audio-card,codec2 1simple-audio-card,cpu3backlightpwm-backlight 4default5a batterysimple-battery8u &%9_p@ gpio-keys gpio-keys6defaultbutton-a  EAST1button-b  SOUTH0button-down   DPAD-DOWN!button-home  FUNCTION<button-l1   L16button-left  DPAD-LEFT"button-menu  HOMEfbutton-r1   R17button-right  DPAD-RIGHT#button-select  SELECT:button-start  START;button-thumbl  THUMBL=button-thumbr  THUMBR>button-up  DPAD-UP button-x   NORTH3button-y   WEST4gpio-leds gpio-ledsdefault7led-0|  Cstatusled-1|  Cchargingheadphone-amplifiersimple-audio-amplifier 8defaultHeadphones Amplifier /hdmi0-conhdmi-connector  9defaultEdportendpoint: pwm-fanpwm-fanx;   <P pwm-33 pwm-gpio =default Epwm-132 pwm-gpio  >default Dsdio-pwrseqmmc-pwrseq-simple ext_clockB?defaultLK@   speaker-amplifiersimple-audio-amplifier  @defaultSpeaker Amplifier; 0regulator-vcc-1v1-nldo-s3regulator-fixed z L)AYvcc_1v1_nldo_s3}/ regulator-vcc3v3-lcd0-nregulator-fixed  Adefault)2ZA2ZYvcc3v3_lcd0_n}  regulator-state-memregulator-vcc-3v3-sd-s0regulator-fixed  Bdefault)-A-Yvcc_3v3_sd_s0}  regulator-vcc5v0-spkregulator-fixed  Cdefault)LK@ALK@ Yvcc5v0_spk}/ ;regulator-state-memregulator-vcc5v0-sysregulator-fixed z L)LK@ALK@ Yvcc5v0_sys /vibrator-l pwm-vibratorenableD1-vibrator-r pwm-vibratorenableE1- compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typegpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclockscpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapassigned-clocksassigned-clock-ratesclock-namespower-domainsmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellsdomain-supplypm_qosreg-namesiommusnpu-supplysram-supplysramrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbacklightiovcc-supplyreset-gpiosrotationrockchip,vo-grfno-hpdbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapiommu-mapnum-lanesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-sdsupports-cqemmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removablerockchip,trcm-sync-tx-onlydma-noncoherentmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsirq-gpiostouchscreen-inverted-xtouchscreen-size-xtouchscreen-size-ytouchscreen-swapped-x-y#io-channel-cellsnum-cs#gpio-cellsgpio-controllerspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-boot-onregulator-enable-ramp-delayregulator-always-onregulator-on-in-suspendregulator-suspend-microvoltuart-has-rtsctsdevice-wakeup-gpiosshutdown-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cellsvref-supplyvbus-supplydata-rolelabelop-sink-microwattpower-roleself-poweredsink-pdossource-pdostry-power-rolewakeup-sourcecellwise,battery-profilecellwise,monitor-interval-msmonitored-batterypower-suppliesinput-current-limit-microampenable-gpiosregulator-max-microampregulator-min-microampAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,dp-lane-muxrockchip,pipe-grfrockchip,pipe-phy-grfpoolgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltabs-flatabs-fuzzabs-rangesimple-audio-card,aux-devssimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,hp-det-gpiossimple-audio-card,pin-switchessimple-audio-card,routingsimple-audio-card,widgetssystem-clock-frequencypwmscharge-full-design-microamp-hoursconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltvoltage-min-design-microvoltcolorsound-name-prefixddc-en-gpioscooling-levelsfan-supplypulses-per-revolutionpost-power-on-delay-mspower-off-delay-usVCC-supplyenable-active-highgpiopwm-names