]8N(!N\!indiedroid,novarockchip,rk3588s +7Indiedroid Nova =embeddedaliasesJ/pinctrl/gpio@fd8a0000P/pinctrl/gpio@fec20000V/pinctrl/gpio@fec30000\/pinctrl/gpio@fec40000b/pinctrl/gpio@fec50000h/i2c@fd880000m/i2c@fea90000r/i2c@feaa0000w/i2c@feab0000|/i2c@feac0000/i2c@fead0000/i2c@fec80000/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000/mmc@fe2d0000cpus+cpu-mapcluster0core0 core1 core2 core3 cluster1core0 core1 cluster2core0 core1 cpu@0cpuarm,cortex-a55!psci/B I Yf@x@   cpu@100cpuarm,cortex-a55!psci/B I Yf@x@  cpu@200cpuarm,cortex-a55!psci/B I Yf@x@  cpu@300cpuarm,cortex-a55!psci/B I Yf@x@  cpu@400cpuarm,cortex-a76!psci/B I Yf@x@ cpu@500cpuarm,cortex-a76!psci/B I Yf@x@ cpu@600cpuarm,cortex-a76!psci/B I Yf@x@ cpu@700cpuarm,cortex-a76!psci/B I Yf@x@ idle-statespscicpu-sleeparm,idle-state0GdXxh l2-cache-l0cache[h@zy l2-cache-l1cache[h@zy l2-cache-l2cache[h@zy l2-cache-l3cache[h@zy l2-cache-b0cache[h@zy l2-cache-b1cache[h@zy l2-cache-b2cache[h@zy l2-cache-b3cache[h@zy l3-cachecache[0h@zy display-subsystemrockchip,display-subsystemfirmwarescmi arm,scmi-smc+protocol@14 protocol@16 hdmi0-soundsimple-audio-cardi2shdmi0okaysimple-audio-card,codecsimple-audio-card,cpupmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmu psci arm,psci-1.0(smcclock-0 fixed-clock*)׫:splltimerarm,armv8-timerP    %Msec-physphysvirthyp-physhyp-virtclock-1 fixed-clock*n6:xin24mclock-2 fixed-clock*:xin32kreserved-memory+]shmem@10f000arm,scmi-shmemd gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf k { B!!!corecoregroupstacks 0\]^ Mjobmmugpu" okay#$ usb@fc000000rockchip,rk3588-dwc3snps,dwc3@B!!!ref_clksuspend_clkbus_clkotg %&usb2-phyusb3-phy utmi_wide"!R %Fgokayports+port@0endpoint' port@1endpoint( usb@fc800000"rockchip,rk3588-ehcigeneric-ehciB!!!)*usb"okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohciB!!!)*usb"okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehciB!!!+,usb"okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohciB!!!+,usb"okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(B!j!i!h!k!r&ref_clksuspend_clkbus_clkutmipipehost- usb3-phy utmi_wide!4%Fgokayiommu@fc900000 arm,smmu-v3 @qsvoMeventqgerrorpriqcmdq-sync iommu@fcb00000 arm,smmu-v3 @}{Meventqgerrorpriqcmdq-sync disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX syscon@fd58c000rockchip,rk3588-sys-grfsysconX vsyscon@fd5e8000!rockchip,rk3588-dcphy-grfsyscon^@ syscon@fd5ec000!rockchip,rk3588-dcphy-grfsyscon^@ syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@  wsyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` B!  syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@B! xsyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@  syscon@fd5b0000rockchip,rk3588-php-grfsyscon[ /syscon@fd5b4000#rockchip,rk3588-csidphy-grfsyscon[@ syscon@fd5b5000#rockchip,rk3588-csidphy-grfsyscon[P syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[ syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@ syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@  syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+  usb2phy@0rockchip,rk3588-usb2phyB!phyclk :usb480m_phy0!m!phyapbokay  otg-portokay %syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phyB!phyclk :usb480m_phy2!o!phyapbokay )host-portokay. *syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phyB!phyclk :usb480m_phy3!p! phyapbokay +host-portokay. ,syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^ syscon@fd5f0000rockchip,rk3588-iocsyscon_ sram@fd600000 mmio-sram`]`+clock-controller@fd7c0000rockchip,rk3588-cru|k!!!!!!!!!!!!!]!q!!@{A.2Fq)׫ׄe/ׄ eZ р / !i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=B!t!s i2cpclk0 default+okayregulator@42rockchip,rk8602B+=Udpmvdd_cpu_big0_s0|1 regulator-state-memregulator@43 rockchip,rk8603rockchip,rk8602C+=Udpmvdd_cpu_big1_s0|1 regulator-state-memserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartKB!!baudclkapb_pclk22txrx3 default disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwmB!! pwmpclk4 default disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwmB!! pwmpclk5 default disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm B!! pwmpclk6 default disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0B!! pwmpclk7 default disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd ypower-controller!rockchip,rk3588-power-controller+okay "power-domain@8+8power-domain@9  B!!!#!"! %9:;+power-domain@10 B!!!#!"%<power-domain@11 B!!!#!"%=power-domain@12 B!!!%>?@A$power-domain@13 +power-domain@14(B!!!!!%Bpower-domain@15 B!!!!%Cpower-domain@16B!! %DEF+power-domain@17 B!!!! %GHIpower-domain@21B!!!!!!!!!!!!!!!!!! %JKLMNOPQ+power-domain@23B!C!A!%Rpower-domain@14 B!!!!%Bpower-domain@15B!!!%Cpower-domain@22B!!%Spower-domain@24B![!Z!]%TU+power-domain@258B!!!!!!!Z%Vpower-domain@268B!!!!!!!Q%WXpower-domain@270B!!!!!!%YZ[\+power-domain@28 B!!!!%]^power-domain@29(B!!!!!%_`power-domain@30B!z!{%apower-domain@31@B!W!!!!!!!%bcdepower-domain@33!B!W!Z![power-domain@34"B!W!Z![power-domain@37%B!!2%fpower-domain@38&B!4!5power-domain@40(%gnpu@fdab0000rockchip,rk3588-rknn-core00 ,pccnacoren B!! !#aclkhclknpupclkk { !!srst_asrst_h" 6hokay=8H8iommu@fdab9000,rockchip,rk3588-iommurockchip,rk3568-iommu nB!!  aclkiface" okay hnpu@fdac0000rockchip,rk3588-rknn-core00 ,pccnacoreo B!! !#aclkhclknpupclkk { !!srst_asrst_h" 6iokay=8H8iommu@fdaca000,rockchip,rk3588-iommurockchip,rk3568-iommuoB!! aclkiface" okay inpu@fdad0000rockchip,rk3588-rknn-core00 ,pccnacorep B!! !#aclkhclknpupclkk { !!srst_asrst_h" 6jokay=8H8iommu@fdada000,rockchip,rk3588-iommurockchip,rk3568-iommupB!! aclkiface" okay jvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuwMvdpuB!! aclkhclk6k"iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v aclkifaceB!!" krga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgatB!!!aclkhclksclk!r!q!p coreaxiahb"video-codec@fdba0000rockchip,rk3588-vepu121zB!! aclkhclk6l"iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu@yB!! aclkiface" lvideo-codec@fdba4000rockchip,rk3588-vepu121@|B!! aclkhclk6m"iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuH@{B!! aclkiface" mvideo-codec@fdba8000rockchip,rk3588-vepu121~B!! aclkhclk6n"iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu@}B!! aclkiface" nvideo-codec@fdbac000rockchip,rk3588-vepu121B!! aclkhclk6o"iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu@B!! aclkiface" ovideo-codec@fdc38000rockchip,rk3588-vdec0ÁÀÆ,functionlinkcache_(B!!!!!axiahbcabaccorehevc_cabac k!!!!{/#F#F;6p"(!C!B!F!H!Gaxiahbcabaccorehevc_cabacTqiommu@fdc38700,rockchip,rk3588-iommurockchip,rk3568-iommu Ç@Ç@@`B!! aclkiface" pvideo-codec@fdc40000rockchip,rk3588-vdec0,functionlinkcachea(B!!!!!axiahbcabaccorehevc_cabac k!!!!{/#F#F;6r"(!J!I!M!O!Naxiahbcabaccorehevc_cabacTsiommu@fdc40700,rockchip,rk3588-iommurockchip,rk3568-iommu @@@bB!! aclkiface" rvideo-codec@fdc70000rockchip,rk3588-av1-vpulMvdpuk!A!C{ׄׄB!A!C aclkhclk" !!!!vop@fdd90000rockchip,rk3588-vop BP,vopgamma-lut<B!]!\!a!b!c!d![tDaclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voppll_hdmiphy06u"vYwjx{yokayports+ port@0+endpoint@2z port@1+endpoint@a { port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~B!]!\ aclkiface"okay uspdif-tx@fddb0000,rockchip,rk3588-spdifrockchip,rk3568-spdif!k! mclkhclkB!!tx|" disabledi2s@fddc0000rockchip,rk3588-i2s-tdmB!!!mclk_txmclk_rxhclkk!!}tx"!tx-m disabledspdif-tx@fdde0000,rockchip,rk3588-spdifrockchip,rk3568-spdif!k!A mclkhclkB!D!@tx|" disabledi2s@fddf0000rockchip,rk3588-i2s-tdmB!4!4!5mclk_txmclk_rxhclkk!1!}tx"!tx-mokay i2s@fddfc000rockchip,rk3588-i2s-tdmB!0!0!,mclk_txmclk_rxhclkk!-!}rx"!rx-m disableddsi@fde20000rockchip,rk3588-mipi-dsi2B!e!g pclksys!apb"~ dcphyw disabledports+port@0port@1dsi@fde30000rockchip,rk3588-mipi-dsi2B!f!h pclksys!apb" dcphyw disabledports+port@0port@1dp@fde50000rockchip,rk3588-dp@k!{$(B!!!!!apbauxhdcpi2sspdif&"!okayports+port@0endpoint {port@1endpoint hdmi@fde80000rockchip,rk3588-dw-hdmi-qp0B!!!!4!R!pclkearcrefaudhdphclk_vo1PhMavpcecearcmainhpdt default"!!0refhdpvxokay ports+port@0endpoint zport@1endpoint %edp@fdec0000rockchip,rk3588-edpB!!dppclktdp"!!dpapbx disabledports+port@0port@1qos@fdf35000rockchip,rk3588-qossysconP  >qos@fdf35200rockchip,rk3588-qossysconR  ?qos@fdf35400rockchip,rk3588-qossysconT  @qos@fdf35600rockchip,rk3588-qossysconV  Aqos@fdf36000rockchip,rk3588-qossyscon`  aqos@fdf39000rockchip,rk3588-qossyscon  fqos@fdf3d800rockchip,rk3588-qossyscon  gqos@fdf3e000rockchip,rk3588-qossyscon  cqos@fdf3e200rockchip,rk3588-qossyscon  bqos@fdf3e400rockchip,rk3588-qossyscon  dqos@fdf3e600rockchip,rk3588-qossyscon  eqos@fdf40000rockchip,rk3588-qossyscon  _qos@fdf40200rockchip,rk3588-qossyscon  `qos@fdf40400rockchip,rk3588-qossyscon  Yqos@fdf40500rockchip,rk3588-qossyscon  Zqos@fdf40600rockchip,rk3588-qossyscon  [qos@fdf40800rockchip,rk3588-qossyscon  \qos@fdf41000rockchip,rk3588-qossyscon  ]qos@fdf41100rockchip,rk3588-qossyscon  ^qos@fdf60000rockchip,rk3588-qossyscon  Dqos@fdf60200rockchip,rk3588-qossyscon  Eqos@fdf60400rockchip,rk3588-qossyscon  Fqos@fdf61000rockchip,rk3588-qossyscon  Gqos@fdf61200rockchip,rk3588-qossyscon  Hqos@fdf61400rockchip,rk3588-qossyscon  Iqos@fdf62000rockchip,rk3588-qossyscon  Bqos@fdf63000rockchip,rk3588-qossyscon0  Cqos@fdf64000rockchip,rk3588-qossyscon@  Rqos@fdf66000rockchip,rk3588-qossyscon`  Jqos@fdf66200rockchip,rk3588-qossysconb  Kqos@fdf66400rockchip,rk3588-qossyscond  Lqos@fdf66600rockchip,rk3588-qossysconf  Mqos@fdf66800rockchip,rk3588-qossysconh  Nqos@fdf66a00rockchip,rk3588-qossysconj  Oqos@fdf66c00rockchip,rk3588-qossysconl  Pqos@fdf66e00rockchip,rk3588-qossysconn  Qqos@fdf67000rockchip,rk3588-qossysconp  Sqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon  <qos@fdf71000rockchip,rk3588-qossyscon  =qos@fdf72000rockchip,rk3588-qossyscon  9qos@fdf72200rockchip,rk3588-qossyscon"  :qos@fdf72400rockchip,rk3588-qossyscon$  ;qos@fdf80000rockchip,rk3588-qossyscon  Vqos@fdf81000rockchip,rk3588-qossyscon  Wqos@fdf81200rockchip,rk3588-qossyscon  Xqos@fdf82000rockchip,rk3588-qossyscon  Tqos@fdf82200rockchip,rk3588-qossyscon"  Udfi@fe060000rockchip,rk3588-dfi@&0:{pcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?0B!C!H!>!M!R!)aclk_mstaclk_slvaclk_dbipclkauxpipepciPMsyspmcmsglegacyerr` 00$00.- pcie-phy""T]  @0 @@,dbiapbconfig!)!. pwrpipe+ disabledlegacy-interrupt-controller8  pcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O0B!D!I!?!N!S!s)aclk_mstaclk_slvaclk_dbipclkauxpipepciPMsyspmcmsglegacyerr` @@$@@. pcie-phy""T]  @0 A@,dbiapbconfig!*!/ pwrpipe+okay  default MYlegacy-interrupt-controller8  ethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a Mmacirqeth_wake_irq(B!6!7!Y!^!50stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!$ stmmacethvi/z disabledmdiosnps,dwmac-mdio+stmmac-axi-config rx-queues-config queue0queue1tx-queues-config  queue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(B!b!_!e!T!osatapmaliverxoobrefasic + disabledsata-port@02@ sata-phy? N sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(B!d!a!g!V!qsatapmaliverxoobrefasic + disabledsata-port@02@- sata-phy? N spi@fe2b0000 rockchip,sfc+@B!/!0clk_sfchclk_sfc+ disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ B  !!biuciuciu-driveciu-sample]h  default"(okayvmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ B!!!!biuciuciu-driveciu-sample]h default"%okayv   +wifi@1  Mhost-wake defaultmmc@fe2e0000rockchip,rk3588-dwcmshc.k!-!.!, { n6 (B!,!*!+!-!.corebusaxiblocktimerh  default(!!!!!corebusaxiblocktimer &okayv 3 B  rng@fe378000rockchip,rk3588-rng7B 0i2s@fe470000rockchip,rk3588-i2s-tdmGB!+!/!(mclk_txmclk_rxhclkk!)!-!!22txrx"&!*!+ tx-mrx-m \ defaultokayport (endpoint wi2s i2s@fe480000rockchip,rk3588-i2s-tdmHB!y!}!umclk_txmclk_rxhclk22txrx!^!_ tx-mrx-m \ default( disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sIB!!i2s_clki2s_hclkk!!||txrx"& default disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJB!%!i2s_clki2s_hclkk!"!||txrx"& default disabledspdif-tx@fe4e0000,rockchip,rk3588-spdifrockchip,rk3568-spdifN!k!7 mclkhclkB!9!6tx2 default"& disabledspdif-tx@fe4f0000,rockchip,rk3588-spdifrockchip,rk3568-spdifO!k!= mclkhclkB!?!<tx| default"& disabledinterrupt-controller@fe600000 arm,gic-v3 `h 8  a 8 ]+ msi-controller@fe640000arm,gic-v3-itsd    msi-controller@fe660000arm,gic-v3-itsf   ppi-partitionsinterrupt-partition-0  interrupt-partition-1   dma-controller@fea10000arm,pl330arm,primecell@ VW B!n apb_pclk  2dma-controller@fea30000arm,pl330arm,primecell@ XY B!o apb_pclk  |i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2cB!!{ i2cpclk> default+ disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!!| i2cpclk? default+okayregulator@42rockchip,rk8602B+=~Udp mvdd_npu_s0|1 8regulator-state-memi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!!} i2cpclk@ default+ disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!!~ i2cpclkA default+ disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!! i2cpclkB default+ disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !B!T!W pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdtB!d!c tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiFB!!spiclkapb_pclk22txrx   default+ disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiGB!!spiclkapb_pclk22txrx   default+ disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiHB!!spiclkapb_pclk||txrx  default+okayk!{ pmic@0rockchip,rk806    default B@ !1 -1 91 E1 Q1 ]1 i1 u1 1 1  1   1dvs1-null-pins gpio_pwrctrl1 pin_fun0 dvs2-null-pins gpio_pwrctrl2 pin_fun0 dvs3-null-pins gpio_pwrctrl3 pin_fun0 regulatorsdcdc-reg1+ =~Udp mvdd_gpu_s0|0 $regulator-state-memdcdc-reg2+=~Udp|0mvdd_cpu_lit_s0 regulator-state-memdcdc-reg3+= qU L mvdd_logic_s0|0regulator-state-mem   qdcdc-reg4+=~Udp mvdd_vdenc_s0|0regulator-state-memdcdc-reg5+U q= P|0 mvdd_ddr_s0regulator-state-mem  Pdcdc-reg6+=U mvdd2_ddr_s3regulator-state-mem dcdc-reg7+=Umvdd_2v0_pldo_s3 regulator-state-mem  dcdc-reg8+=2ZU2Z mvcc_3v3_s3 regulator-state-mem  2Zdcdc-reg9+= 'U ' mvddq_ddr_s0regulator-state-memdcdc-reg10+=w@Uw@ mvcc_1v8_s3 regulator-state-mem  w@pldo-reg1+=w@Uw@ mvcc_1v8_s0regulator-state-mempldo-reg2+=w@Uw@ mvcca_1v8_s0 regulator-state-mem w@pldo-reg3+=OUO mvdda_1v2_s0regulator-state-mempldo-reg4+=2ZU2Z mvcca_3v3_s0regulator-state-mempldo-reg5+=2ZUw@ mvccio_sd_s0 regulator-state-mempldo-reg6+=w@Uw@mvcc_1v8_s3_pldo6regulator-state-mem  w@nldo-reg1+= qU q mvdd_0v75_s3regulator-state-mem   qnldo-reg2+= PU Pmvdda_ddr_pll_s0regulator-state-mem  Pnldo-reg3+= qU q mavdd_0v75_s0regulator-state-memnldo-reg4+U P= P mvdda_0v85_s0regulator-state-memnldo-reg5spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiIB!!spiclkapb_pclk||txrx   default+ disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartLB!!baudclkapb_pclk22 txrx default disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartMB!!baudclkapb_pclk2 2 txrx defaultokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartNB!!baudclkapb_pclk2 2 txrx default disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartOB!!baudclkapb_pclk| | txrx default disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartPB!!baudclkapb_pclk| | txrx default disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQB!!baudclkapb_pclk| |txrx default disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartRB!!baudclkapb_pclk}}txrx default disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartSB!!baudclkapb_pclk} } txrx default disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartTB!!baudclkapb_pclk} } txrx  defaultokay 8bluetooth*realtek,rtl8821cs-btrealtek,rtl8723bs-bt H Z g  defaultpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmB!L!K pwmpclk default disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmB!L!K pwmpclk default disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm B!L!K pwmpclk default disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0B!L!K pwmpclk default disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmB!O!N pwmpclk default disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmB!O!N pwmpclk default disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm B!O!N pwmpclk default disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0B!O!N pwmpclk default disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmB!R!Q pwmpclk default disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmB!R!Q pwmpclk default disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm B!R!Q pwmpclk default disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0B!R!Q pwmpclk default disabledthermal-zonespackage-thermal w  tripspackage-crit 8  Ecriticalbigcore0-thermal wd  tripsbigcore0-alert L Epassive bigcore0-crit 8  Ecriticalcooling-mapsmap0  bigcore2-thermal wd  tripsbigcore2-alert L Epassive bigcore2-crit 8  Ecriticalcooling-mapsmap0   littlecore-thermal wd  tripslittlecore-alert L Epassive littlecore-crit 8  Ecriticalcooling-mapsmap0 0 center-thermal w  tripscenter-crit 8  Ecriticalgpu-thermal wd  tripsgpu-alert L Epassive gpu-crit 8  Ecriticalcooling-mapsmap0  npu-thermal w  tripsnpu-crit 8  Ecriticaltsadc@fec00000rockchip,rk3588-tsadcB!!tsadcapb_pclkk!{!V!Wtsadc-apbtsadc     defaultsleep )okay adc@fec10000rockchip,rk3588-saradc ?B!!saradcapb_pclk!U saradc-apbokay Q $i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cB!! i2cpclkC default+okaytypec-portc@22 fcs,fusb302"  default ]connectorusb-c-connector idual sUSB-C ydual sink , d B@altmodesdisplayport  ports+port@0endpoint 'port@1endpoint port@2endpoint rtc@51haoyu,hym8563Q:hym8563  default  &i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cB!! i2cpclkD default+okayaudio-codec@11everest,es8388everest,es8328{k!1 B!1   portendpoint i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cB!! i2cpclkE default+ disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJB!!spiclkapb_pclk} }txrx   default+ disabledefuse@fecc0000rockchip,rk3588-otp B!!!!otpapb_pclkphyarb!!! otpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[ B!p apb_pclk  }phy@fed60000rockchip,rk3588-hdptx-phy B!!Trefapb8!#!!c!d!e!!!""phyapbinitcmnlaneroplllcpllokay tphy@fed80000rockchip,rk3588-usbdp-phyB!!l!V refclkimmortalpclkutmi(! ! ! !!initcmnlanepcs_apbpma_apb       okay 6 I U c q &port+endpoint@0 endpoint@1 (endpoint@2 endpoint@3 phy@feda0000rockchip,rk3588-mipi-dcphyB!! pclkref !i!!!jm_phyapbgrfs_phy disabled ~phy@fedb0000rockchip,rk3588-mipi-dcphyB!! pclkref !k!!!lm_phyapbgrfs_phy disabled phy@fedc0000rockchip,rk3588-csi-dphyB!pclk!!apbphy disabledphy@fedc8000rockchip,rk3588-csi-dphy܀B!pclk!!apbphy disabledphy@fee00000rockchip,rk3588-naneng-combphyB!!v!W refapbpipek!{!<!Cphyapb / okay phy@fee20000rockchip,rk3588-naneng-combphyB!!x!W refapbpipek!{!>!Ephyapb / okay -sram@ff001000 mmio-sram]+codec-sram@0  qcodec-sram@78000p  spinctrlrockchip,rk3588-pinctrl]+ gpio@fd8a0000rockchip,gpio-bankB!q!r   8 : HEADER_12_1v8HEADER_24_1v8 gpio@fec20000rockchip,gpio-bankB!s!t   8  HEADER_27_3v3HEADER_29_1v8HEADER_7_1v8HEADER_31_1v8HEADER_33_1v8HEADER_11_1v8HEADER_13_1v8HEADER_28_3v3HEADER_5_3v3HEADER_3_3v3gpio@fec30000rockchip,gpio-bankB!u!v  @ 8 gpio@fec40000rockchip,gpio-bankB!w!x  ` 8  HEADER_16_1v8HEADER_18_1v8HEADER_19_1v8HEADER_21_1v8HEADER_23_1v8HEADER_26_1v8HEADER_15_1v8HEADER_22_1v8 gpio@fec50000rockchip,gpio-bankB!y!z   8  HEADER_37_3v3HEADER_8_3v3HEADER_10_3v3HEADER_32_3v3HEADER_35_3v3HEADER_40_3v3HEADER_38_3v3HEADER_36_3v3 pcfg-pull-up  !pcfg-pull-down  pcfg-pull-none  pcfg-pull-none-drv-level-2   #pcfg-pull-up-drv-level-1   "pcfg-pull-up-drv-level-2   pcfg-pull-none-smt   pcfg-pull-none-drv-level-1-smt   pcfg-pull-none-drv-level-5-smt   auddsmbt1120can0can1can2cifclk32kclk32k-in  cpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout emmc-bus8 emmc-clk emmc-cmd emmc-data-strobe eth1fspigmac1gpuhdmihdmim0-tx0-cec hdmim0-tx0-hpd hdmim0-tx0-scl hdmim0-tx0-sda i2c0i2c0m2-xfer    0i2c1i2c1m0-xfer      i2c2i2c2m0-xfer      i2c3i2c3m0-xfer      i2c4i2c4m0-xfer      i2c5i2c5m0-xfer      i2c6i2c6m3-xfer      i2c7i2c7m0-xfer      i2c8i2c8m0-xfer      i2s0i2s0-lrck i2s0-mclk i2s0-sclk i2s0-sdi0 i2s0-sdo0 i2s1i2s1m0-lrck i2s1m0-sclk i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie20x1m0-clkreqn pcie20x1m0-perstn pcie20x1m0-waken pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp! pmupwm0pwm0m0-pins 4pwm1pwm1m0-pins 5pwm2pwm2m0-pins 6pwm3pwm3m0-pins 7pwm4pwm4m0-pins  pwm5pwm5m0-pins  pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins`!!!!! sdmmcsdmmc-bus4@ sdmmc-clk sdmmc-cmd sdmmc-det! spdif0spdif0m0-tx spdif1spdif1m0-tx spi0spi0m0-pins0""" spi0m0-cs0" spi0m0-cs1" spi1spi1m1-pins0""" spi1m1-cs0" spi1m1-cs1" spi2spi2m2-pins0" "" spi2m2-cs0 " spi3spi3m1-pins0" "" spi3m1-cs0" spi3m1-cs1" spi4spi4m0-pins0""" spi4m0-cs0" spi4m0-cs1" tsadctsadc-shut-org uart0uart0m1-xfer ! ! 3uart1uart1m1-xfer  ! ! uart2uart2m0-xfer  ! ! uart3uart3m1-xfer  ! ! uart4uart4m1-xfer  ! ! uart5uart5m1-xfer  ! ! uart6uart6m1-xfer  ! ! uart7uart7m1-xfer  ! ! uart8uart8m1-xfer  ! ! uart9uart9m2-xfer  ! ! uart9m2-ctsn  uart9m2-rtsn  vopbt656gpio-functsadc-gpio-func bluetooth-pinsbt-reset bt-wake-dev bt-wake-host hym8563hym8563-int usb-typecusbc0-int! typec5v-pwren )wifiwifi-enable-h 'wifi-host-wake-irq opp-table-cluster0operating-points-v2* opp-10080000005< < L L~J@opp-12000000005G < 4 4~J@opp-14160000005Tfr < ~J@[opp-16080000005_" < P P~J@opp-18000000005kI <~~~J@opp-table-cluster1operating-points-v2* opp-12000000005G < L LB@J@opp-14160000005Tfr <  B@J@opp-16080000005_" < B@J@opp-18000000005kI < P PB@J@opp-20160000005x) <HHB@J@opp-22080000005h <llB@J@opp-24000000005  <B@B@B@J@opp-table-cluster2operating-points-v2* opp-12000000005G < L LB@J@opp-14160000005Tfr <  B@J@opp-16080000005_" < B@J@opp-18000000005kI < P PB@J@opp-20160000005x) <HHB@J@opp-22080000005h <llB@J@opp-24000000005  <B@B@B@J@opp-table-gpuoperating-points-v2 #opp-3000000005 < L L Popp-4000000005ׄ < L L Popp-5000000005e < L L Popp-6000000005#F < L L Popp-7000000005)' < ` ` Popp-8000000005/ < q q Popp-90000000055 < 5 5 Popp-10000000005; < P P Padc-keys-0 adc-keysgbuttonsx$w@dbutton-boot sbootFPadc-keys-1 adc-keysgbuttonsx$w@dbutton-recovery srecoveryFPchosenserial2:1500000n8hdmi0-conhdmi-connectorEdportendpoint% sdio-pwrseqmmc-pwrseq-simple ext_clockB&' default M soundaudio-graph-card srockchip,es8388)MicrophoneMic JackHeadphoneHeadphones3LINPUT2Mic JackHeadphonesLOUT1HeadphonesROUT1(regulator-vbus5v0-typecregulator-fixed  ) defaultmvbus5v0_typecULK@=LK@. regulator-vcc-1v1-nldo-s3regulator-fixed+=Umvcc_1v1_nldo_s31 regulator-vcc-3v3-s0regulator-fixed+=2ZU2Z mvcc_3v3_s0 regulator-state-memregulator-vcc5v0-sysregulator-fixed+=LK@ULK@ mvcc5v0_sys 1regulator-vcc5v0-usbregulator-fixed+=LK@ULK@ mvcc5v0_usb* .regulator-vcc5v0-usbdcinregulator-fixed+=LK@ULK@mvcc5v0_usbdcin * compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typegpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclockscpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapassigned-clocksassigned-clock-ratesclock-namespower-domainsmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-ramp-delayfcs,suspend-voltage-selectorvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellsdomain-supplypm_qosreg-namesiommusnpu-supplysram-supplysramrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsrockchip,vo-grfbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapiommu-mapnum-lanesinterrupt-controllerreset-gpiosvpcie3v3-supplyrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-sdnon-removablesupports-cqemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlydai-formatdma-noncoherentmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cs#gpio-cellsgpio-controllerspi-max-frequencyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-on-in-suspendregulator-suspend-microvoltuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyvbus-supplydata-rolelabelpower-roletry-power-rolesource-pdossink-pdosop-sink-microwattsvidvdowakeup-sourceAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grforientation-switchmode-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,dp-lane-muxrockchip,pipe-grfrockchip,pipe-phy-grfpoolgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendio-channel-namesio-channelskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltstdout-pathpost-power-on-delay-mswidgetsroutingdaisenable-active-highgpio