@8x(dx ',Qualcomm Technologies, Inc. SM8750 QRD2qcom,sm8750-qrdqcom,sm8750=handsetcpus cpu@0Jcpu 2qcom,oryonVZpscih y psciperf l2-cache2cachecpu@100Jcpu 2qcom,oryonVZpscih y psciperfcpu@200Jcpu 2qcom,oryonVZpscih y psciperfcpu@300Jcpu 2qcom,oryonVZpscih y psciperfcpu@400Jcpu 2qcom,oryonVZpscih y psciperfcpu@500Jcpu 2qcom,oryonVZpscih y  psciperfcpu@10000Jcpu 2qcom,oryonVZpscih  y  psciperfl2-cache2cache cpu@10100Jcpu 2qcom,oryonVZpscih  y  psciperfcpu-mapcluster0core0 core1core2core3core4core5cluster1core0core1idle-statespscicpu-sleep-02arm,idle-stateret]0cpu-sleep-12arm,idle-stateretdomain-idle-statescluster-sleep-02domain-idle-stateTf#domain-sleep-02domain-idle-stateT 0'!firmwarescm2qcom,scm-sm8750qcom,scm&scmi 2arm,scmi4;txrxF protocol@13VLinterconnect-02qcom,sm8750-clk-virt`t*interconnect-12qcom,sm8750-mc-virt`tmemory@a0000000JmemoryVpmu2arm,armv8-pmuv3 psci 2arm,psci-1.0asmcpower-domain-cpu0Lypower-domain-cpu1Lypower-domain-cpu2Lypower-domain-cpu3Lypower-domain-cpu4Lypower-domain-cpu5Ly power-domain-cpu6Ly power-domain-cpu7Ly power-domain-cluster0Ly power-domain-cluster1Ly power-domain-systemL! reserved-memory gunyah-hyp@80000000Vcpusys-vm-mem@80e00000Vcpucp@81200000V xbl-dtlog@81a00000Vaop-image@81c00000Vaop-cmd-db@81c60000 2qcom,cmd-dbVaop-tme-uefi-merged@81c80000V@smem@81d00000 2qcom,smemV "pdp-ns-shared@81f00000Vcpucp-scandump@82000000V8adsp-mhi@82380000V8soccp-sdi@823a0000V:pmic-minii-dump@823e0000V>pvmfw@824a0000VJglobal-sync@82600000V`tz-stat@82700000Vpqdss@82800000Vdsm-partition-1@84a00000Vldsm-partition-2@89300000V0mmpss@8ba00000V`jq6-mpss-dtb@9b000000Vkipa-fw@9b080000Vipa-gsi@9b090000V gpu-micro-code@9b09a000V spss@9b0a0000V spu-tz-shared@9b280000V(spu-modem-shared@9b2c0000V,camera@9b300000V0camera-2@9bb00000Vvideo@9c300000V0cvp@9cb00000Vpcdsp@9d200000V q6-cdsp-dtb@9eb00000Vsoccp@9ec00000Vq6-adsp-dtb@9ed80000Vtadspslpi@9ee00000Vsxbl-ramdump@b8000000Vhwfence-shbuf@d4e23000V0-tz-merged@d8000000V`trust-ui-vm@f3800000V@oem-vm@f7c00000Vllcc-lpi@ff800000Vadsp-rpc-remote-heap2shared-dma-pool@vsmp2p-adsp 2qcom,smp2p# 4# master-kernelmaster-kernel*uslave-kernel slave-kernelAVqsmp2p-cdsp 2qcom,smp2p# 4#^ master-kernelmaster-kernel* slave-kernel slave-kernelAVsmp2p-modem 2qcom,smp2p# 4# master-kernelmaster-kernel*oslave-kernel slave-kernelAVhipa-ap-to-modemipa*ipa-modem-to-apipaAVsoc@0 2simple-bus gclock-controller@1000002qcom,sm8750-gccVB$r$%&'yL)mailbox@4060002qcom,sm8750-ipccqcom,ipccV@` AV#dma-controller@800000(2qcom,sm8750-gpi-dmaqcom,sm6350-gpi-dmaVLMNOPQRSTUVW  (6 disabled-geniqup@8c00002qcom,geni-se-qupV r)) m-ahbs-ahb (#  disabledi2c@8800002qcom,geni-i2cV@ ur)mseH&**+,qup-corequp-configqup-memory --txrx.default  disabledspi@8800002qcom,geni-spiV@ ur)mseH&**+,qup-corequp-configqup-memory --txrx/0default  disabledi2c@8840002qcom,geni-i2cV@@ Gr)oseH&**+,qup-corequp-configqup-memory --txrx1default  disabledspi@8840002qcom,geni-spiV@@ Gr)oseH&**+,qup-corequp-configqup-memory --txrx23default  disabledi2c@8880002qcom,geni-i2cV@ Hr)qseH&**+,qup-corequp-configqup-memory --txrx4default  disabledspi@8880002qcom,geni-spiV@ Hr)qseH&**+,qup-corequp-configqup-memory --txrx56default  disabledi2c@88c0002qcom,geni-i2cV@ Ir)sseH&**+,qup-corequp-configqup-memory --txrx7default  disabledspi@88c0002qcom,geni-spiV@ Ir)sseH&**+,qup-corequp-configqup-memory --txrx89default  disabledi2c@8900002qcom,geni-i2cV@ Jr)useH&**+,qup-corequp-configqup-memory --txrx:default  disabledspi@8900002qcom,geni-spiV@ Jr)useH&**+,qup-corequp-configqup-memory --txrx;<default  disabledi2c@8940002qcom,geni-i2cV@@ Kr)wseH&**+,qup-corequp-configqup-memory --txrx=default  disabledspi@8940002qcom,geni-spiV@@ Kr)wseH&**+,qup-corequp-configqup-memory --txrx>?default  disabledserial@8980002qcom,geni-uartV@ r)yse0&**+,qup-corequp-config@default disabledi2c@89c0002qcom,geni-i2cV@ r){seH&**+,qup-corequp-configqup-memory --txrxAdefault  disabledspi@89c0002qcom,geni-spiV@ r){seH&**+,qup-corequp-configqup-memory --txrxBCdefault  disabledgeniqup@9c00002qcom,geni-se-i2c-master-hubV r)Ss-ahb  disabledi2c@9800002qcom,geni-i2c-master-hubV@ r)?)>secore0&**+, qup-corequp-configDdefault  disabledi2c@9840002qcom,geni-i2c-master-hubV@@ r)A)>secore0&**+, qup-corequp-configEdefault  disabledi2c@9880002qcom,geni-i2c-master-hubV@ r)C)>secore0&**+, qup-corequp-configFdefault  disabledi2c@98c0002qcom,geni-i2c-master-hubV@ r)E)>secore0&**+, qup-corequp-configGdefault  disabledi2c@9900002qcom,geni-i2c-master-hubV@ r)G)>secore0&**+, qup-corequp-configHdefault  disabledi2c@9940002qcom,geni-i2c-master-hubV@@ r)I)>secore0&**+, qup-corequp-configIdefault  disabledi2c@9980002qcom,geni-i2c-master-hubV@ r)K)>secore0&**+, qup-corequp-configJdefault  disabledi2c@99c0002qcom,geni-i2c-master-hubV@ r)M)>secore0&**+, qup-corequp-configKdefault  disabledi2c@9a00002qcom,geni-i2c-master-hubV@ r)O)>secore0&**+, qup-corequp-configLdefault  disabledi2c@9a40002qcom,geni-i2c-master-hubV@@ r)Q)>secore0&**+, qup-corequp-configMdefault  disableddma-controller@a00000(2qcom,sm8750-gpi-dmaqcom,sm6350-gpi-dmaV%&'()*  ( disabledOgeniqup@ac00002qcom,geni-se-qupV r)})~ m-ahbs-ahb ( okayi2c@a800002qcom,geni-i2cV@ ar)XseH&**+,Nqup-corequp-configqup-memory OOtxrxPdefault  disabledspi@a800002qcom,geni-spiV@ ar)XseH&**+,Nqup-corequp-configqup-memory OOtxrxQRdefault  disabledi2c@a840002qcom,geni-i2cV@@ br)ZseH&**+,Nqup-corequp-configqup-memory OOtxrxSdefault  disabledspi@a840002qcom,geni-spiV@@ br)ZseH&**+,Nqup-corequp-configqup-memory OOtxrxTUdefault  disabledi2c@a880002qcom,geni-i2cV@ cr)\seH&**+,Nqup-corequp-configqup-memory OOtxrxVdefault  disabledspi@a880002qcom,geni-spiV@ cr)\seH&**+,Nqup-corequp-configqup-memory OOtxrxWXdefault  disabledi2c@a8c0002qcom,geni-i2cV@ dr)^seH&**+,Nqup-corequp-configqup-memory OOtxrxYdefault  disabledspi@a8c0002qcom,geni-spiV@ dr)^seH&**+,Nqup-corequp-configqup-memory OOtxrxZ[default  disabledi2c@a900002qcom,geni-i2cV@ er)`seH&**+,Nqup-corequp-configqup-memory OOtxrx\default  disabledspi@a900002qcom,geni-spiV@ er)`seH&**+,Nqup-corequp-configqup-memory OOtxrx]^default  disabledi2c@a940002qcom,geni-i2cV@@ fr)bseH&**+,Nqup-corequp-configqup-memory OOtxrx_default  disabledspi@a940002qcom,geni-spiV@@ fr)bseH&**+,Nqup-corequp-configqup-memory OOtxrx`adefault  disabledi2c@a980002qcom,geni-i2cV@ kr)dseH&**+,Nqup-corequp-configqup-memory OOtxrxbdefault  disabledspi@a980002qcom,geni-spiV@ kr)dseH&**+,Nqup-corequp-configqup-memory OOtxrxcddefault  disabledserial@a9c0002qcom,geni-debug-uartV@ Cr)fse0&**+,qup-corequp-configedefaultokayrng@10c30002qcom,sm8750-trngqcom,trngV 0interconnect@15000002qcom,sm8750-cnoc-mainVP`t`interconnect@16000002qcom,sm8750-config-nocV`bt`,interconnect@16800002qcom,sm8750-system-nocVhЀt`interconnect@16c00002qcom,sm8750-pcie-anocVlt`r))interconnect@16e00002qcom,sm8750-aggre1-nocVndt`r))Ninterconnect@17000002qcom,sm8750-aggre2-nocVpt`rf interconnect@17800002qcom,sm8750-mmss-nocVxt`crypto@1d88000;2qcom,sm8750-inline-crypto-engineqcom,inline-crypto-engineV؀r)dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0V@ (($1>gcrypto@1dfa000)2qcom,sm8750-qceqcom,sm8150-qceqcom,qceVߠ`&memoryggrxtx((hwlock@1f400002qcom,tcsr-mutexVW"remoteproc@40800002qcom,sm8750-mpss-pasVLhhhhh0ewdogfatalreadyhandoverstop-ackshutdown-ackrfxo&yii cxmssujklmnostopokay0qcom/sm8750/modem.mbnqcom/sm8750/modem_dtb.mbnglink-edge# 4# mpssremoteproc@6800000*2qcom,sm8750-adsp-pasqcom,sm8550-adsp-pasVHpqqqqq0ewdogfatalreadyhandoverstop-ackshutdown-ackrfxo&ryiilcxlmxustnustopokay.qcom/sm8750/adsp.mbnqcom/sm8750/adsp_dtb.mbnglink-edge# 4# lpassfastrpc 2qcom,fastrpcfastrpcglink-apps-dspadspuv% compute-cb@32qcom,fastrpc-compute-cbV((C compute-cb@42qcom,fastrpc-compute-cbV((D compute-cb@52qcom,fastrpc-compute-cbV((E compute-cb@62qcom,fastrpc-compute-cbV((F compute-cb@72qcom,fastrpc-compute-cbV$(@(g(compute-cb@82qcom,fastrpc-compute-cbV((H gpr 2qcom,gpr adsp_apps service@1 2qcom,q6apmV avs/audiomsm/adsp/audio_pd bedais2qcom,q6apm-lpass-dais dais2qcom,q6apm-dais((A service@2 2qcom,q6prmVavs/audiomsm/adsp/audio_pdclock-controller2qcom,q6prm-lpass-clocksywcodec@6aa000082qcom,sm8750-lpass-wsa-macroqcom,sm8550-lpass-wsa-macroV(rwDwfwgxmclkmacrodcodecfsgeny 4wsa2-mclk ysoundwire@6ab0000,2qcom,soundwire-v2.1.0qcom,soundwire-v2.0.0V ryifaceWSA2zdefaultGV f?? {           disabledcodec@6ac000062qcom,sm8750-lpass-rx-macroqcom,sm8550-lpass-rx-macroV(rw@wfwgxmclkmacrodcodecfsgeny4mclk {soundwire@6ad0000,2qcom,soundwire-v2.1.0qcom,soundwire-v2.0.0V r{ifaceRX|defaultGV f?1 {           okaycodec@0,42sdw20217010e00V+ codec@6ae000062qcom,sm8750-lpass-tx-macroqcom,sm8550-lpass-tx-macroV(rw9wfwgxmclkmacrodcodecfsgeny4mclk codec@6b0000082qcom,sm8750-lpass-wsa-macroqcom,sm8550-lpass-wsa-macroV(rwBwfwgxmclkmacrodcodecfsgeny4mclk }soundwire@6b10000,2qcom,soundwire-v2.1.0qcom,soundwire-v2.0.0V r}ifaceWSA~defaultGV f?? {          okay$speaker@0,02sdw20217020400Vdefault @L  PSpkrLeftbq "speaker@0,12sdw20217020400Vdefault @M  PSpkrRightbq #interconnect@7e400002qcom,sm8750-lpass-ag-nocVt`interconnect@74000002qcom,sm8750-lpass-lpiaon-nocV@t`interconnect@74200002qcom,sm8750-lpass-lpicx-nocVB@t`rsoundwire@7630000,2qcom,soundwire-v2.1.0qcom,soundwire-v2.0.0Vc ecorewakeuprifaceTXdefaultGV{  okay!codec@0,32sdw20217010e00Vcodec@766000062qcom,sm8750-lpass-va-macroqcom,sm8550-lpass-va-macroVf $rw9wfwgmclkmacrodcodecy4fsgen xpinctrl@7760000<2qcom,sm8750-lpass-lpi-pinctrlqcom,sm8650-lpass-lpi-pinctrlVvrwfwg coreaudiotx-swr-active-stateclk-pinsgpio0 swr_tx_clkdata-pinsgpio1gpio2gpio14 swr_tx_datarx-swr-active-state|clk-pinsgpio3 swr_rx_clkdata-pins gpio4gpio5 swr_rx_datadmic01-default-stateclk-pinsgpio6 dmic1_clk)data-pinsgpio7 dmic1_data5dmic23-default-stateclk-pinsgpio8 dmic2_clk)data-pinsgpio9 dmic2_data5wsa-swr-active-state~clk-pinsgpio10 wsa_swr_clkdata-pinsgpio11 wsa_swr_datawsa2-swr-active-statezclk-pinsgpio15 wsa2_swr_clkdata-pinsgpio16wsa2_swr_datammc@8804000$2qcom,sm8750-sdhciqcom,sdhci-msm-v5V@ehc_irqpwr_irqr))fifacecorexo0&+,sdhc-ddrcpu-sdhcyiBVD,fh (@v<4`)okay 7defaultsleepopp-table2operating-points-v2opp-100000000opp-202000000 Fphy@88e30002qcom,sm8750-m31-eusb2-phyV0rref)okayphy@88e80002qcom,sm8750-qmp-usb3-dp-phyV@ r)))auxrefcom_auxusb3_pipe))  phycommony)yokay,<'ports port@0VendpointL&port@1VendpointLport@2Vendpointusb@a600000 2qcom,sm8750-dwc3qcom,snps-dwc3V `(r) ))))#cfg_noccoreifacesleepmock_utmi\))l$ TpppEedwc_usb3pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irqy))0&N+,usb-ddrapps-usb (@ 'usb2-phyusb3-phy5Kavokayports port@0VendpointL%port@1VendpointLvideo-codec@aa000002qcom,sm8750-irisV 0r)) Aifacecorevcodec0_coreiface1core_freerunvcodec0_core_freerun(@(G0&+,cpu-cfgvideo-mem uB yi ivenusvcodec0mxcmmcx )) bus0bus1corevcodec0_coreokayopp-table2operating-points-v2opp-240000000Nopp-338000000%xopp-420000000opp-444000000vopp-533333334Vopp-570000000!opp-630000000% clock-controller@aaf00002qcom,sm8750-videoccV  r$)yii yLinterrupt-controller@b2200002qcom,sm8750-pdcqcom,pdc V "DdH33/ba  VAppower-management@c300000#2qcom,sm8750-aoss-qmpqcom,aoss-qmpV 0## 4#ynsram@c3f00002qcom,rpmh-statsV ?nspmi@c4000002qcom,spmi-pmic-arbPV @0 P@ D L B@corechnlsobsrvrintrcnfg p eperiph_irqAV pmic@c2qcom,pm8010qcom,spmi-pmicV  temp-alarm@24002qcom,spmi-temp-alarmV$ $ pmic@d2qcom,pm8010qcom,spmi-pmicV  temp-alarm@24002qcom,spmi-temp-alarmV$ $pmic@12qcom,pm8550qcom,spmi-pmicV temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800 2qcom,pm8550-gpioqcom,spmi-gpioV AVvolume-up-n-stategpio6normal5led-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-ledVokayled-0flash    . Cled-1flash    . Cpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm Wokaymulti-led status led@1Vled@2Vled@3Vpmic@82qcom,pm8550qcom,spmi-pmicV temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpioVAVpmic@42qcom,pmd8028qcom,spmi-pmicV temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800!2qcom,pmd8028-gpioqcom,spmi-gpioVAVpmic@72qcom,pmih0108qcom,spmi-pmicV temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800"2qcom,pmih0108-gpioqcom,spmi-gpioVAVphy@fd002qcom,pm8550b-eusb2-repeaterVokay b opmic@02qcom,pm8550qcom,spmi-pmicV pon@13002qcom,pmk8350-ponV hlospbspwrkey2qcom,pmk8350-pwrkey {tokayresin2qcom,pmk8350-resinokay {rrtc@61002qcom,pmk8350-rtcVab rtcalarmbnvram@71002qcom,spmi-sdamVq  qreboot-reason@48VH gpio@b800!2qcom,pmk8550-gpioqcom,spmi-gpioVAVpmic@a2qcom,pmr735dqcom,spmi-pmicV  temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpioVAVpmic@32qcom,pm8550veqcom,spmi-pmicV temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpioVAVpmic@52qcom,pm8550veqcom,spmi-pmicV temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpioVAVpmic@62qcom,pm8550veqcom,spmi-pmicV temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpioVAVpmic@92qcom,pm8550vsqcom,spmi-pmicV  temp-alarm@a002qcom,spmi-temp-alarmV  gpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpioVAVpinctrl@f1000002qcom,sm8750-tlmmV  AV p $Jhub-i2c0-data-clk-stategpio64gpio65 i2chub0_se0Dhub-i2c1-data-clk-stategpio66gpio67 i2chub0_se1Ehub-i2c2-data-clk-stategpio68gpio69 i2chub0_se2Fhub-i2c3-data-clk-stategpio70gpio71 i2chub0_se3Ghub-i2c4-data-clk-stategpio72gpio73 i2chub0_se4Hhub-i2c5-data-clk-stategpio74gpio75 i2chub0_se5Ihub-i2c6-data-clk-stategpio76gpio77 i2chub0_se6Jhub-i2c7-data-clk-stategpio82gpio83 i2chub0_se7Khub-i2c8-data-clk-stategpio206gpio207 i2chub0_se8Lhub-i2c9-data-clk-stategpio80gpio81 i2chub0_se9Mpcie0-default-stateperst-pinsgpio102gpio clkreq-pinsgpio103pcie0_clk_req_nwake-pinsgpio104gpioqup-i2c0-data-clk-stategpio32gpio33 qup1_se0Pqup-i2c1-data-clk-stategpio36gpio37 qup1_se1Squp-i2c2-data-clk-stategpio40gpio41 qup1_se2Vqup-i2c3-data-clk-stategpio44gpio45 qup1_se3Yqup-i2c4-data-clk-stategpio48gpio49 qup1_se4\qup-i2c5-data-clk-stategpio52gpio53 qup1_se5_qup-i2c6-data-clk-stategpio56gpio57 qup1_se6bqup-i2c8-data-clk-state gpio0gpio1 qup2_se0.qup-i2c9-data-clk-state gpio4gpio5 qup2_se11qup-i2c10-data-clk-state gpio8gpio9 qup2_se24qup-i2c11-data-clk-stategpio12gpio13 qup2_se37qup-i2c12-data-clk-stategpio16gpio17 qup2_se4:qup-i2c13-data-clk-stategpio20gpio21 qup2_se5=qup-i2c15-data-clk-stategpio28gpio29 qup2_se7Aqup-spi0-cs-stategpio35 qup1_se0Rqup-spi0-data-clk-stategpio32gpio33gpio34 qup1_se0Qqup-spi1-cs-stategpio39 qup1_se1Uqup-spi1-data-clk-stategpio36gpio37gpio38 qup1_se1Tqup-spi2-cs-stategpio43 qup1_se2Xqup-spi2-data-clk-stategpio40gpio41gpio42 qup1_se2Wqup-spi3-cs-stategpio47 qup1_se3[qup-spi3-data-clk-stategpio44gpio45gpio46 qup1_se3Zqup-spi4-cs-stategpio51 qup1_se4^qup-spi4-data-clk-stategpio48gpio49gpio50 qup1_se4]qup-spi5-cs-stategpio55 qup1_se5aqup-spi5-data-clk-stategpio52gpio53gpio54 qup1_se5`qup-spi6-cs-stategpio59 qup1_se6dqup-spi6-data-clk-stategpio56gpio57gpio58 qup1_se6cqup-spi8-cs-stategpio3 qup2_se00qup-spi8-data-clk-stategpio0gpio1gpio2 qup2_se0/qup-spi9-cs-stategpio7 qup2_se13qup-spi9-data-clk-stategpio4gpio5gpio6 qup2_se12qup-spi10-cs-stategpio11 qup2_se26qup-spi10-data-clk-stategpio8gpio9gpio10 qup2_se25qup-spi11-cs-stategpio15 qup2_se39qup-spi11-data-clk-stategpio12gpio13gpio14 qup2_se38qup-spi12-cs-stategpio19 qup2_se4<qup-spi12-data-clk-stategpio16gpio17gpio18 qup2_se4;qup-spi13-cs-stategpio23 qup2_se5?qup-spi13-data-clk-stategpio20gpio21gpio22 qup2_se5>qup-spi15-cs-stategpio31 qup2_se7Cqup-spi15-data-clk-stategpio28gpio29gpio30 qup2_se7Bqup-uart7-default-stategpio62gpio63 qup1_se7equp-uart14-default-stategpio26gpio27 qup2_se6@qup-uart14-cts-rts-stategpio24gpio25 qup2_se6 sdc2-sleep-stateclk-pins sdc2_clkcmd-pins sdc2_cmddata-pins sdc2_datasdc2-default-stateclk-pins sdc2_clkcmd-pins sdc2_cmd data-pins sdc2_data sd-card-det-n-stategpio55gpiospkr-0-sd-n-active-stategpio76gpio spkr-1-sd-n-active-stategpio77gpio wcd-reset-n-active-stategpio101gpio clock-controller@f2040082qcom,sm8750-tcsrsysconV @0rfystm@10002000 2arm,coresight-stmarm,primecell V 7(stm-basestm-stimulus-basern apb_pclkout-portsportendpointLtpda@10004000"2qcom,coresight-tpdaarm,primecellV@rn apb_pclkin-ports port@1VendpointLout-portsportendpointLtpdm@1000f000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk @ out-portsportendpointLfunnel@10041000+2arm,coresight-dynamic-funnelarm,primecellVrn apb_pclkin-ports port@0VendpointLport@6VendpointLport@7VendpointLout-portsportendpointLtpdm@10800000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk   out-portsportendpointLtpda@10803000"2qcom,coresight-tpdaarm,primecellV0rn apb_pclkin-ports port@0VendpointLport@1VendpointL out-portsportendpointLfunnel@10804000+2arm,coresight-dynamic-funnelarm,primecellV@rn apb_pclkin-portsportendpointLout-portsportendpointLcti@1080b000 2arm,coresight-ctiarm,primecellVrn apb_pclktpdm@1082c000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk  out-portsportendpointLtpdm@10841000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk out-portsportendpointLtpdm@1084e000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk  out-portsportendpointLtpdm@1084f000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk  out-portsportendpointLtpdm@10850000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk @ out-portsportendpointLtpda@10851000"2qcom,coresight-tpdaarm,primecellVrn apb_pclkin-ports port@0VendpointLport@1VendpointLport@2VendpointLout-portsportendpointLtpdm@10980000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk   out-portsportendpointLtpda@10986000"2qcom,coresight-tpdaarm,primecellV`rn apb_pclkin-ports port@0VendpointLport@1VendpointL port@2VendpointL out-portsportendpointLfunnel@10987000+2arm,coresight-dynamic-funnelarm,primecellVprn apb_pclkin-portsportendpointLout-portsportendpointLcti@1098b000 2arm,coresight-ctiarm,primecellVrn apb_pclktpdm@109a3000"2qcom,coresight-tpdmarm,primecellV0rn apb_pclk   out-portsportendpointLtpdm@109a4000"2qcom,coresight-tpdmarm,primecellV@rn apb_pclk out-portsportendpointLtpdm@109a5000"2qcom,coresight-tpdmarm,primecellVPrn apb_pclk  out-portsportendpointLtpdm@109a6000"2qcom,coresight-tpdmarm,primecellV`rn apb_pclk  out-portsportendpointLtpdm@109a7000"2qcom,coresight-tpdmarm,primecellVprn apb_pclk  out-portsportendpointLtpdm@109a8000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk out-portsportendpointLtpdm@109a9000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk out-portsportendpointLtpdm@109aa000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk out-portsportendpointLtn@109ab000"2qcom,coresight-tnocarm,primecellVBrn apb_pclkin-ports port@4VendpointLport@dV endpointLport@10VendpointLport@11VendpointLport@12VendpointLport@13VendpointLport@19VendpointLport@1aVendpointLport@1bVendpointLport@1cVendpointLport@1dVendpointLport@1eVendpointLport@1fVendpointLport@20V endpointLout-portsportendpointLtpdm@109d0000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk  out-portsportendpointLfunnel@10b04000+2arm,coresight-dynamic-funnelarm,primecellV@rn apb_pclkin-ports port@6VendpointLport@7VendpointLout-portsportendpointLtmc@10b05000 2arm,coresight-tmcarm,primecellVPrn apb_pclkin-portsportendpointLtpda@10b08000"2qcom,coresight-tpdaarm,primecellVrn apb_pclkin-ports port@0VendpointLport@1VendpointLport@2VendpointLport@3VendpointLport@4VendpointLout-portsportendpointLtpdm@10b09000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk @ out-portsportendpointLtpdm@10b0a000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk @ out-portsportendpointLtpdm@10b0b000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk @ out-portsportendpointLtpdm@10b0c000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk @ out-portsportendpointLtpdm@10b0d000"2qcom,coresight-tpdmarm,primecellVrn apb_pclk   out-portsportendpointLiommu@15000000/2qcom,sm8750-smmu-500qcom,smmu-500arm,mmu-500VLAabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY  %(interrupt-controller@16000000 2arm,gic-v3 V   VA 8 O msi-controller@160400002arm,gic-v3-itsV d spcie@1c00000Jpci"2qcom,pcie-sm8750qcom,pcie-sm8550`V0@@ @@0parfdbielbiatuconfigmhi T@ @0@0# ~    l/emsi0msi1msi2msi3msi4msi5msi6msi7globalV  @r)%)')()-).))) Iauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axi0&+pcie-memcpu-pcie (() pciy)B disabledopp-table2operating-points-v2opp-2500000&% Аopp-5000000LK@  opp-10000000 B@opp-8000000z opp-16000000$  hpcie@0JpciV ~ &phy@1c06000 2qcom,sm8750-qmp-gen3x2-pcie-phyV` (r)%)')))+auxcfg_ahbrefrchngpipe\))l) phyy)y4pcie0_pipe_clk disabled&phy@1d800002qcom,sm8750-qmp-ufs-phyV rf)refref_auxqref ufsphyy)yokay,<ufs@1d84000+2qcom,sm8750-ufshcqcom,ufshcjedec,ufs-2.0V@0  @r))))f)))ncore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clkB) rst0&N+,ufs-ddrcpu-ufsy) (` ufsphyokay     - 9Oopp-table2operating-points-v2opp-100000000@opp-403000000@JJmailbox@1643000002qcom,sm8750-cpucp-mboxqcom,x1e80100-cpucp-mbox VC rsc@165000002qcom,rpmh-rsc0VPQRdrv-0drv-1drv-2$ K  [ g apps_rscy bcm-voter2qcom,bcm-voterclock-controller2qcom,sm8750-rpmh-clkrxoyfpower-controller2qcom,sm8750-rpmhpdBLiopp-table2operating-points-v2opp-16 wopp-48 w0opp-50 w2opp-52 w4opp-56 w8opp-60 w<opp-64 w@opp-80 wPopp-128 wopp-144 wopp-192 wopp-224 wopp-256 wopp-320 w@opp-336 wPopp-384 wopp-416 wopp-432 wopp-448 wopp-452 wopp-480 wregulators-02qcom,pm8550-rpmh-regulators           , ; Jbbob1 Wvreg_bob1 f- ~=  bob2 Wvreg_bob2 f)B ~- ldo1 Wvreg_l1b_1p8 fw@ ~w@   ldo2 Wvreg_l2b_3p0 f- ~.@   ldo4 Wvreg_l4b_1p8 fw@ ~w@   ldo5 Wvreg_l5b_3p1 f/M` ~0   ldo6 Wvreg_l6b_1p8 fw@ ~-   ldo7 Wvreg_l7b_1p8 fw@ ~-   ldo8 Wvreg_l8b_1p8 fw@ ~-   ldo9 Wvreg_l9b_2p9 f-* ~-   ldo10 Wvreg_l10b_1p8 fw@ ~w@   ldo11 Wvreg_l11b_1p0 f<@ ~   ldo12 Wvreg_l12b_1p8 fO ~w@   ldo13 Wvreg_l13b_3p0 f- ~-   ldo14 Wvreg_l14b_3p2 f0 ~0   ldo15 Wvreg_l15b_1p8 fw@ ~w@   ldo16 Wvreg_l16b_2p8 f* ~*   ldo17 Wvreg_l17b_2p5 f&5@ ~&5@   regulators-12qcom,pm8550ve-rpmh-regulators       Jdsmps1 Wvreg_s1d_0p97 f m ~ smps3 Wvreg_s3d_1p2 fO ~  smps4 Wvreg_s4d_0p85 f  ~ ldo1 Wvreg_l1d_1p2 fO ~O   ldo2 Wvreg_l2d_0p88 f m ~    ldo3 Wvreg_l3d_0p88 f m ~    regulators-22qcom,pm8550ve-rpmh-regulators    $ Jfsmps5 Wvreg_s5f_0p5 f  ~B@ ldo1 Wvreg_l1f_0p88 f m ~    ldo2 Wvreg_l2f_1p2 fO ~O   ldo3 Wvreg_l3f_1p8 fw@ ~w@   regulators-32qcom,pm8550ve-rpmh-regulators      Jgsmps1 Wvreg_s1g_0p5 f ~ ` smps3 Wvreg_s3g_1p8 fR ~   smps4 Wvreg_s4g_0p75 f ~  ldo1 Wvreg_l1g_0p91 f  ~H@   ldo2 Wvreg_l2g_1p8 fO ~a   ldo3 Wvreg_l3g_1p2 fO ~*@   regulators-42qcom,pm8550ve-rpmh-regulators    2 @ Jismps7 Wvreg_s7i_1p2 f@ ~r` smps8 Wvreg_s8i_0p9 f  ~ ldo1 Wvreg_l1i_1p2 fO ~O   ldo2 Wvreg_l2i_1p2 fO ~O   ldo3 Wvreg_l3i_0p88 f m ~    regulators-52qcom,pm8550vs-rpmh-regulators   N  Jjsmps2 Wvreg_s2j_1p1 fB@ ~ smps3 Wvreg_s3j_1p1 fB@ ~ ldo1 Wvreg_l1j_0p91 f m ~    ldo2 Wvreg_l2j_1p2 fO ~O   regulators-62qcom,pm8010-rpmh-regulators Jm \ m ~  ldo1 Wvreg_l1m_1p1 f؀ ~؀   ldo2 Wvreg_l2m_1p056 f ~   ldo3 Wvreg_l3m_2p8 f* ~* ldo4 Wvreg_l4m_2p8 f* ~* ldo5 Wvreg_l5m_1p8 fw@ ~w@ ldo6 Wvreg_l6m_2p8 f* ~* ldo7 Wvreg_l7m_2p96 f-* ~-* regulators-72qcom,pm8010-rpmh-regulators Jn \ m ~  ldo1 Wvreg_l1n_1p1 f؀ ~؀   ldo2 Wvreg_l2n_1p1 f؀ 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0t`remoteproc@32300000*2qcom,sm8750-cdsp-pasqcom,sm8650-cdsp-pasV20LB0ewdogfatalreadyhandoverstop-ackshutdown-ackrfxo&yii i  cxmxcnsp un stopokay.qcom/sm8750/cdsp.mbnqcom/sm8750/cdsp_dtb.mbnglink-edge# 4# cdspfastrpc 2qcom,fastrpcfastrpcglink-apps-dspcdsp  compute-cb@12qcom,fastrpc-compute-cbV$(( !( @compute-cb@22qcom,fastrpc-compute-cbV0(b(  ( B(compute-cb@32qcom,fastrpc-compute-cbV0(c( #( @(compute-cb@42qcom,fastrpc-compute-cbV0(d( $( @(compute-cb@52qcom,fastrpc-compute-cbV0(e( %( @(compute-cb@62qcom,fastrpc-compute-cbV0(f(  ( F(compute-cb@72qcom,fastrpc-compute-cbV0(g( '( @(compute-cb@82qcom,fastrpc-compute-cbV0(h(  ( H(compute-cb@122qcom,fastrpc-compute-cbV 0(l( , ( @(compute-cb@132qcom,fastrpc-compute-cbV <(m( ( .( M(compute-cb@142qcom,fastrpc-compute-cbV$(n(  (timer2arm,armv8-timer0   tpdm-cdsp-llm2qcom,coresight-static-tpdm out-portsportendpointL tpdm-cdsp-llm22qcom,coresight-static-tpdm out-portsportendpointL tpdm-modem12qcom,coresight-static-tpdm out-portsportendpointL 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Jsound(2qcom,sm8750-sndcardqcom,sm8450-sndcard ,SM8750-QRDSpkrLeft INWSA_SPK1 OUTSpkrRight INWSA_SPK2 OUTIN1_HPHLHPHL_OUTIN2_HPHRHPHR_OUTAMIC1MIC BIAS1AMIC2MIC BIAS2AMIC3MIC BIAS3AMIC4MIC BIAS3AMIC5MIC BIAS4TX SWR_INPUT0ADC1_OUTPUTTX SWR_INPUT1ADC2_OUTPUTTX SWR_INPUT2ADC3_OUTPUTTX SWR_INPUT3ADC4_OUTPUTwcd-playback-dai-link WCD Playbackcodec {cpu qplatform  wcd-capture-dai-link WCD Capturecodec !cpu xplatform  wsa-dai-link WSA Playbackcodec "#$}cpu iplatform  va-dai-link VA Capturecodec xcpu nplatform  pmic-glink>2qcom,sm8750-pmic-glinkqcom,sm8550-pmic-glinkqcom,pmic-glink  =connector@02usb-c-connectorV)dual4dualports port@0VendpointL%port@1VendpointL&port@2Vendpointvph-pwr-regulator2regulator-fixed Wvph_pwr f8u  ~8u >R interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typedevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namesphandlecache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usinterconnectsmboxesmbox-namesshmem#power-domain-cells#interconnect-cellsqcom,bcm-votersinterruptsdomain-idle-statesrangesno-maphwlocksalloc-rangesalignmentsizereusableinterrupts-extendedqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-rangesclocks#clock-cells#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesqcom,eeqcom,num-eesnum-channelsqcom,controlled-remotely#hwlock-cellsinterrupt-namesmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesfirmware-namelabelqcom,glink-channelsqcom,vmidsdma-coherentqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainclock-output-namesqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,rx-port-mappingpowerdown-gpiossound-name-prefixvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappinggpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoperating-points-v2qcom,dll-configqcom,ddr-configbus-widthmax-sd-hs-hzresetscd-gpiosvmmc-supplyvqmmc-supplyno-sdiono-mmcpinctrl-1opp-hzrequired-opps#phy-cellsvdd-supplyvdda12-supplyphysreset-namesorientation-switchvdda-phy-supplyvdda-pll-supplyremote-endpointassigned-clocksassigned-clock-ratesphy-namessnps,hird-thresholdsnps,usb2-gadget-lpm-disablesnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,is-utmi-l1-suspendsnps,usb3_lpm_capablesnps,usb2-lpm-disablesnps,has-lpm-erratumtx-fifo-resizeusb-role-switchqcom,pdc-rangesreg-namesqcom,channelqcom,bus-id#thermal-sensor-cellsbias-pull-uppower-sourcecolorled-sourcesled-max-microampflash-max-microampflash-max-timeout-usfunction-enumerator#pwm-cellsvdd18-supplyvdd3-supplylinux,codebitswakeup-parentgpio-reserved-rangesbias-pull-downoutput-lowqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-num#iommu-cells#global-interrupts#redistributor-regionsredistributor-stridemsi-controller#msi-cellsbus-rangelinux,pci-domainmsi-mapmsi-map-masknum-lanesinterrupt-map-maskinterrupt-mapiommu-mapopp-peak-kBpslanes-per-directionreset-gpiosvcc-supplyvcc-max-microampvccq-supplyvccq-max-microampqcom,tcs-offsetqcom,drv-idqcom,tcs-configopp-levelvdd-bob1-supplyvdd-bob2-supplyvdd-l1-l4-l10-supplyvdd-l2-l13-l14-supplyvdd-l3-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l11-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allow-set-loadregulator-allowed-modesvdd-l1-supplyvdd-l2-supplyvdd-s1-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s7-supplyvdd-s8-supplyvdd-s2-supplyvdd-l1-l2-supplyvdd-l3-l4-supplyvdd-l5-supplyvdd-l6-supplyvdd-l7-supplyframe-numbernonposted-mmioqcom,non-secure-domainpolling-delay-passivethermal-sensorstemperaturehysteresisnvmem-cellsnvmem-cell-namesmode-recoverymode-bootloaderserial0qcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplyvdd-px-supplystdout-pathclock-frequencyclock-multclock-divdebounce-intervallinux,can-disablewakeup-sourceaudio-routinglink-namesound-daiorientation-gpiospower-roledata-roleregulator-always-onregulator-boot-on