#8(3 ),Qualcomm Technologies, Inc. X1P42100 CRD 2qcom,x1p42100-crdqcom,x1p42100chosen=serial0:115200n8clocksxo-board 2fixed-clockIYfsleep-clk 2fixed-clockIYf)bi-tcxo-div2-clk2fixed-factor-clockYnuf(bi-tcxo-ao-div2-clk2fixed-factor-clockYnufcpus cpu@0cpu 2qcom,oryonpsci  psciperffl2-cache2cachefcpu@100cpu 2qcom,oryonpsci  psciperffcpu@200cpu 2qcom,oryonpsci  psciperffcpu@300cpu 2qcom,oryonpsci  psciperffcpu@10000cpu 2qcom,oryonpsci   psciperffl2-cache2cachef cpu@10100cpu 2qcom,oryonpsci   psciperffcpu@10200cpu 2qcom,oryonpsci   psciperffcpu@10300cpu 2qcom,oryonpsci   psciperffcpu-mapcluster0core0core1core2core3cluster1core0core1core2core3idle-statespscicpu-sleep-02arm,idle-stateret,=@MXfdomain-idle-statescluster-sleep-02domain-idle-stateD,^=M f!cluster-sleep-12domain-idle-stateT,=MXf"dummy-sink2arm,coresight-dummy-sinkin-portsportendpoint^fNfirmwarescm2qcom,scm-x1e80100qcom,scmn|fscmi 2arm,scmitxrx protocol@13finterconnect-02qcom,x1e80100-clk-virtf4interconnect-12qcom,x1e80100-mc-virtfmemory@80000000memorypmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcpower-domain-cpu0fpower-domain-cpu1fpower-domain-cpu2fpower-domain-cpu3fpower-domain-cpu4 f power-domain-cpu5 f power-domain-cpu6 f power-domain-cpu7 f power-domain-cpu-cluster0!"#fpower-domain-cpu-cluster1!"#f power-domain-systemf#reserved-memory gunyah-hyp@80000000fhyp-elf-package@80800000 fncc@80a00000@fcpucp-log@80e00000fcpucp@80e40000Tfreserved-region@813800008tags-region@81400000@fxbl-dtlog@81a00000fxbl-ramdump@81a40000faop-image@81c00000faop-cmd-db@81c60000 2qcom,cmd-dbfaop-config@81c80000ftme-crash-dump@81ca0000ftme-log@81ce0000@fuefi-log@81ce4000@fsecdata-apss@81cff000fpdp-ns-shared@81e00000fgpu-prr@81f00000ftpm-control@81f10000fusb-ucsi-shared@81f20000fpld-pep@81f30000`fpld-gmu@81f36000`fpld-pdp@81f37000pftz-stat@82700000pfxbl-tmp-buffer@82800000fadsp-rpc-remote-heap@84b00000fspu-secure-shared-memory@853000000fadsp-boot-dtb@866c0000lfspss-region@86700000p@fadsp-boot@86b00000fvideo@87700000ppfadspslpi@87e00000fq6-adsp-dtb@8b800000fcdsp@8b900000fq6-cdsp-dtb@8d900000fgpu-microcode@8d9fe000 fcvp@8da00000pfcamera@8e100000fav1-encoder@8e900000pfreserved-region@8f000000wpss@8fa00000fq6-wpss-dtb@913000000fxbl-sc@d8000000freserved-region@d8040000 qtee@d80e0000Rfta@d8600000`ftags@e1000000jfllcc-lpi@ff800000`fsmem@ffe00000 2qcom,smem $flinux,cma2shared-dma-poolopp-table-qup100mhz2operating-points-v2f@opp-750000000xh7%opp-10000000007&opp-table-qup120mhz2operating-points-v2f9opp-750000000xh7%opp-1200000000'7&smp2p-adsp 2qcom,smp2pE' 'Ycrmaster-kernelmaster-kernelfslave-kernel slave-kernelfsmp2p-cdsp 2qcom,smp2pE' 'Y^crmaster-kernelmaster-kernelfslave-kernel slave-kernelfsoc@0 2simple-bus fclock-controller@100000$2qcom,x1p42100-gccqcom,x1e80100-gcc n()*+,-./01Yf3mailbox@4080002qcom,x1e80100-ipccqcom,ipcc@ f'dma-controller@800000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dma > 26 #disabledf7geniqup@8c00002qcom,geni-se-qup n33 *m-ahbs-ahb 2# #okayfi2c@8800002qcom,geni-i2c@ (n3*seHn44566qup-corequp-configqup-memory17% I77NtxrxX8bdefault  #disabledfspi@8800002qcom,geni-spi@ (n3*seHn44566qup-corequp-configqup-memory1p9 I77NtxrxX:;bdefault  #disabledfi2c@8840002qcom,geni-i2c@@ )n3*seHn44566qup-corequp-configqup-memory17% I77NtxrxX<bdefault  #disabledfspi@8840002qcom,geni-spi@@ )n3*seHn44566qup-corequp-configqup-memory1p9 I77NtxrxX=>bdefault  #disabledfi2c@8880002qcom,geni-i2c@ *n3*seHn44566qup-corequp-configqup-memory17% I77NtxrxX?bdefault  #disabledf spi@8880002qcom,geni-spi@ *n3*seHn44566qup-corequp-configqup-memory1p@ I77NtxrxXABbdefault  #disabledf i2c@88c0002qcom,geni-i2c@ +n3*seHn44566qup-corequp-configqup-memory17% I77NtxrxXCbdefault  #disabledf spi@88c0002qcom,geni-spi@ +n3*seHn44566qup-corequp-configqup-memory1p@ I77NtxrxXDEbdefault  #disabledf i2c@8900002qcom,geni-i2c@ ,n3*seHn44566qup-corequp-configqup-memory17% I77NtxrxXFbdefault  #disabledf spi@8900002qcom,geni-spi@ ,n3*seHn44566qup-corequp-configqup-memory1p@ I77NtxrxXGHbdefault  #disabledfi2c@8940002qcom,geni-i2c@@ -n3*seHn44566qup-corequp-configqup-memory17% I77NtxrxXIbdefault  #disabledfspi@8940002qcom,geni-spi@@ -n3*seHn44566qup-corequp-configqup-memory1p@ I77NtxrxXJKbdefault  #disabledfserial@8940002qcom,geni-debug-uart@@ -n3*se0n44566qup-corequp-config1p@XLbdefault#okayfi2c@8980002qcom,geni-i2c@ n3*seHn44566qup-corequp-configqup-memory17% I77NtxrxXMbdefault  #disabledfspi@8980002qcom,geni-spi@ n3*seHn44566qup-corequp-configqup-memory1p@ I77NtxrxXNObdefault  #disabledfi2c@89c0002qcom,geni-i2c@ n3*seHn44566qup-corequp-configqup-memory17% I77NtxrxXPbdefault  #disabledfspi@89c0002qcom,geni-spi@ n3*seHn44566qup-corequp-configqup-memory1p@ I77NtxrxXQRbdefault  #disabledfdma-controller@a00000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dma      > 26 #disabledfTgeniqup@ac00002qcom,geni-se-qup n33 *m-ahbs-ahb 2# #okayfi2c@a800002qcom,geni-i2c@  n3*seHn4456S6qup-corequp-configqup-memory17% ITTNtxrxXUbdefault #okayIftouchscreen@10 2hid-over-i2c EV3WXXYbdefaultspi@a800002qcom,geni-spi@  n3*seHn4456S6qup-corequp-configqup-memory1p9 ITTNtxrxXZ[bdefault  #disabledfi2c@a840002qcom,geni-i2c@@ !n3*seHn4456S6qup-corequp-configqup-memory17% ITTNtxrxX\bdefault  #disabledfspi@a840002qcom,geni-spi@@ !n3*seHn4456S6qup-corequp-configqup-memory1p9 ITTNtxrxX]^bdefault  #disabledfi2c@a880002qcom,geni-i2c@ "n3*seHn4456S6qup-corequp-configqup-memory17% ITTNtxrxX_bdefault  #disabledfspi@a880002qcom,geni-spi@ "n3*seHn4456S6qup-corequp-configqup-memory1p@ ITTNtxrxX`abdefault  #disabledfi2c@a8c0002qcom,geni-i2c@ #n3*seHn4456S6qup-corequp-configqup-memory17% ITTNtxrxXbbdefault  #disabledfspi@a8c0002qcom,geni-spi@ #n3*seHn4456S6qup-corequp-configqup-memory1p@ ITTNtxrxXcdbdefault  #disabledfi2c@a900002qcom,geni-i2c@ $n3*seHn4456S6qup-corequp-configqup-memory17% ITTNtxrxXebdefault  #disabledfspi@a900002qcom,geni-spi@ $n3*seHn4456S6qup-corequp-configqup-memory1p@ ITTNtxrxXfgbdefault  #disabledf i2c@a940002qcom,geni-i2c@@ %n3*seHn4456S6qup-corequp-configqup-memory17% ITTNtxrxXhbdefault  #disabledf!spi@a940002qcom,geni-spi@@ %n3*seHn4456S6qup-corequp-configqup-memory1p@ ITTNtxrxXijbdefault  #disabledf"i2c@a980002qcom,geni-i2c@ &n3*seHn4456S6qup-corequp-configqup-memory17% ITTNtxrxXkbdefault  #disabledf#spi@a980002qcom,geni-spi@ &n3*seHn4456S6qup-corequp-configqup-memory1p@ ITTNtxrxXlmbdefault  #disabledf$serial@a980002qcom,geni-uart@ &n3*se0n44566qup-corequp-config1p@Xnbdefault #disabledf%i2c@a9c0002qcom,geni-i2c@ 'n3*seHn4456S6qup-corequp-configqup-memory17% ITTNtxrxXobdefault  #disabledf&spi@a9c0002qcom,geni-spi@ 'n3*seHn4456S6qup-corequp-configqup-memory1p@ ITTNtxrxXpqbdefault  #disabledf'dma-controller@b00000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dmaLMNOPQRSTUVW > 2V #disabledfrgeniqup@bc00002qcom,geni-se-qup n33 *m-ahbs-ahb 2C #okayf(i2c@b800002qcom,geni-i2c@ un3*seHn44566qup-corequp-configqup-memory17% IrrNtxrxXsbdefault #okayIf)touchpad@15 2hid-over-i2c EVWtXubdefaultkeyboard@3a 2hid-over-i2c: EVCWtXvbdefaultspi@b800002qcom,geni-spi@ un3*seHn44566qup-corequp-configqup-memory1p9 IrrNtxrxXwxbdefault  #disabledf*i2c@b840002qcom,geni-i2c@@ Gn3*seHn44566qup-corequp-configqup-memory17% IrrNtxrxXybdefault #okayIf+typec-mux@82parade,ps8830nz{{zz| VX}bdefault ports port@0endpoint^~fport@1endpoint^fport@2endpoint^fspi@b840002qcom,geni-spi@@ Gn3*seHn44566qup-corequp-configqup-memory1p9 IrrNtxrxXbdefault  #disabledf,i2c@b880002qcom,geni-i2c@ Hn3*seHn44566qup-corequp-configqup-memory17% IrrNtxrxXbdefault  #disabledf-serial@b880002qcom,geni-uart@ Hn3*se0n44566qup-corequp-config1p@Xbdefault #disabledf.spi@b880002qcom,geni-spi@ Hn3*seHn44566qup-corequp-configqup-memory1p@ IrrNtxrxXbdefault  #disabledf/i2c@b8c0002qcom,geni-i2c@ In3*seHn44566qup-corequp-configqup-memory17% IrrNtxrxXbdefault #okayIf0typec-mux@82parade,ps8830n   Xbdefault ports port@0endpoint^fport@1endpoint^fport@2endpoint^fspi@b8c0002qcom,geni-spi@ In3*seHn44566qup-corequp-configqup-memory1p@ IrrNtxrxXbdefault  #disabledf1i2c@b900002qcom,geni-i2c@ Jn3*seHn44566qup-corequp-configqup-memory17% IrrNtxrxXbdefault  #disabledf2spi@b900002qcom,geni-spi@ Jn3*seHn44566qup-corequp-configqup-memory1p@ IrrNtxrxXbdefault  #disabledf3i2c@b940002qcom,geni-i2c@@ Kn3*seHn44566qup-corequp-configqup-memory17% IrrNtxrxXbdefault #okayIf4redriver@4f 2nxp,ptn3222O+9 VXbdefaultGfspi@b940002qcom,geni-spi@@ Kn3*seHn44566qup-corequp-configqup-memory1p@ IrrNtxrxXbdefault  #disabledf5i2c@b980002qcom,geni-i2c@ n3*seHn44566qup-corequp-configqup-memory17% IrrNtxrxXbdefault  #disabledf6spi@b980002qcom,geni-spi@ n3*seHn44566qup-corequp-configqup-memory1p@ IrrNtxrxXbdefault  #disabledf7i2c@b9c0002qcom,geni-i2c@ n3*seHn44566qup-corequp-configqup-memory17% IrrNtxrxXbdefault #okayIf8typec-mux@82parade,ps8830n VXbdefault ports port@0endpoint^fport@1endpoint^fport@2endpoint^fspi@b9c0002qcom,geni-spi@ n3*seHn44566qup-corequp-configqup-memory1p@ IrrNtxrxXbdefault  #disabledf9thermal-sensor@c271000"2qcom,x1e80100-tsensqcom,tsens-v2 ' " ERuplowcriticalbpfthermal-sensor@c272000"2qcom,x1e80100-tsensqcom,tsens-v2 '  "0ERuplowcriticalbpfthermal-sensor@c273000"2qcom,x1e80100-tsensqcom,tsens-v2 '0 "@ERuplowcriticalbpfthermal-sensor@c274000"2qcom,x1e80100-tsensqcom,tsens-v2 '@ "PERuplowcriticalbp #disabledf:phy@fd300082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy0TGn*ref36#okayfphy@fd50002qcom,x1e80100-qmp-usb3-dp-phyP@ n333*auxrefcom_auxusb3_pipe33D3O phycommonYG #okayf.ports port@0endpoint^fport@1endpoint^fport@2endpoint^fphy@fd900082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTGn*ref37#okayfphy@fda0002qcom,x1e80100-qmp-usb3-dp-phy@ n3 3"3#*auxrefcom_auxusb3_pipe33E3P phycommonYG #okayf/ports port@0endpoint^fport@1endpoint^fport@2endpoint^fphy@fde00082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTGn*ref38#okayfphy@fdf0002qcom,x1e80100-qmp-usb3-dp-phy@ n3$3&3'*auxrefcom_auxusb3_pipe33F3Q phycommonYG #okayf0ports port@0endpoint^fport@1endpoint^fport@2endpoint^frng@10c30002qcom,x1e80100-trngqcom,trng 0f;interconnect@15000002qcom,x1e80100-cnoc-mainPDfinterconnect@16000002qcom,x1e80100-cnoc-cfg`ff6interconnect@16800002qcom,x1e80100-system-nochf<interconnect@16c00002qcom,x1e80100-pcie-south-anoclЀfinterconnect@16d00002qcom,x1e80100-pcie-center-anocmpf=interconnect@16e00002qcom,x1e80100-aggre1-nocnDfSinterconnect@17000002qcom,x1e80100-aggre2-nocpfinterconnect@17400002qcom,x1e80100-pcie-north-anoctfinterconnect@17500002qcom,x1e80100-usb-center-anocuf>interconnect@17600002qcom,x1e80100-usb-north-anocvpfinterconnect@17700002qcom,x1e80100-usb-south-anocwfinterconnect@17800002qcom,x1e80100-mmss-nocxfpcie@1bd0000 3pci2qcom,pcie-x1e80100`0x x@xx0parfdbielbiatuconfigmhi Tx x0x0@@@ lDy/Rmsi0msi1msi2msi3msi4msi5msi6msi7global'8n3T3V3W3^3_33!<*auxcfgbus_masterbus_slaveslave_q2anoc_aggrcnoc_sf_axi53TE$0n5 6pcie-memcpu-pcie33pcilink_down3ZUUUUUUUUUUUUUUUUjUUUUUUUUp #disabledf?opp-table2operating-points-v2fopp-2500000-10&%7%{Аopp-5000000-10LK@7%{ opp-10000000-107%{B@opp-20000000-101-7%{opp-5000000-20LK@7%{ opp-10000000-207%{B@opp-20000000-201-7%{opp-40000000-20bZ7%{= opp-8000000-30z7&{opp-16000000-30$7&{ hopp-32000000-30H7&{<opp-64000000-30А7&{x-opp-16000000-40$7&{ hopp-32000000-40H7&{<opp-64000000-40А7&{x-opp-128000000-40 7&{_(pcie@0pci2pciclass,0604* f@pci@1bf80003pci2qcom,pcie-x1e80100`0p p@ppparfdbielbiatuconfigmhi 8p p0p0 lEFGHIJ/Rmsi0msi1msi2msi3msi4msi5msi6msi7global'KLM8n3v3x3y3333"<*auxcfgbus_masterbus_slaveslave_q2anoc_aggrcnoc_sf_axi53vE$0n56pcie-memcpu-pcie3"3#pcilink_down3 7ZUUUUUUUUjUUUU#okaybdefaultXfApcie@0pci-  V VfBphy@1bfc000"2qcom,x1p42100-qmp-gen4x4-pcie-phy   0n3z3x 3{3}3$*auxcfg_ahbrefrchngpipepipediv23%3$phyphy_nocsr53{E3  Ypcie6a_pipe_clkG#okayf-pci@1c00000 3pci2qcom,pcie-x1e80100`0~~@~~0parfdbielbiatuconfigmhi 8~ ~0~0 l^_`YVRMN/Rmsi0msi1msi2msi3msi4msi5msi6msi7global'FGHI8n3k3m3n3t3u33!<*auxcfgbus_masterbus_slaveslave_q2anoc_aggrcnoc_sf_axi53kE$0n5 6pcie-memcpu-pcie33pcilink_down37ZUUUU#okayXbdefaultfCpcie@0pci,  V VfDphy@1c06000"2qcom,x1e80100-qmp-gen3x2-pcie-phy` 0n3k3m3o3q3s$*auxcfg_ahbrefrchngpipepipediv23 3phyphy_nocsr53oE3Ypcie5_pipe_clkG#okayf,pci@1c080003pci2qcom,pcie-x1e80100`0||@||parfdbielbiatuconfigmhi 8| |0|0  l/Rmsi0msi1msi2msi3msi4msi5msi6msi7global'8n3`3b3c3i3j33!<*auxcfgbus_masterbus_slaveslave_q2anoc_aggrcnoc_sf_axi53`E$0n5 6pcie-memcpu-pcie33pcilink_down37ZUUUU#okayXbdefaultfEpcie@0pci+  V VfFphy@1c0e000"2qcom,x1e80100-qmp-gen3x2-pcie-phy 0n3`3b3d3f3h$*auxcfg_ahbrefrchngpipepipediv233phyphy_nocsr53dE3Ypcie4_pipe_clkG#okayf+dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0@ 22 fcrypto@1dfa000+2qcom,x1e80100-qceqcom,sm8150-qceqcom,qceߠ`INrxtx22n6memoryfGhwlock@1f400002qcom,tcsr-mutexf$clock-controller@1fc00002qcom,x1e80100-tcsrsysconnYfgpu@3d00000!2qcom,adreno-43030c00qcom,adreno0#kgsl_3d0_reg_memorycx_memcx_dbgc ,p'0? Kspeed_binn56gfx-mem#okayfzap-shader #disabled\jqcom/x1p42100/gen71500_zap.mbnfHopp-table/2operating-points-v2-adrenooperating-points-v2fopp-12500000000J|{ x*_opp-5500000000 U{\kx._opp-14000000000SrN{ x)_opp-11070000000Az{ x*_opp-10140000000?@A n3738*hlosbusifaceahbfinterconnect@264000002qcom,x1e80100-gem-noc&@1f5interconnect@320c00002qcom,x1e80100-nsp-noc2 fremoteproc@68000002qcom,x1e80100-adsp-pas<E#Rwdogfatalreadyhandoverstop-ackn*xo11lcxlmxn\stop#okay2jqcom/x1e80100/adsp.mbnqcom/x1e80100/adsp_dtb.mbnfIglink-edgeE' 'lpassrfastrpc 2qcom,fastrpcfastrpcglink-apps-dspadsp compute-cb@32qcom,fastrpc-compute-cb22ccompute-cb@42qcom,fastrpc-compute-cb22dcompute-cb@52qcom,fastrpc-compute-cb22ecompute-cb@62qcom,fastrpc-compute-cb22fcompute-cb@72qcom,fastrpc-compute-cb22ggpr 2qcom,gpr adsp_apps) service@1 2qcom,q6apm6Gavs/audiomsm/adsp/audio_pdfbedais2qcom,q6apm-lpass-dais6fdais2qcom,q6apm-dais22afJservice@2 2qcom,q6prmGavs/audiomsm/adsp/audio_pdfKclock-controller2qcom,q6prm-lpass-clocksYfcodec@6aa0000:2qcom,x1e80100-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro(nDfg*mclkmacrodcodecfsgenY wsa2-mclk6^WSA2fsoundwire@6ab00002qcom,soundwire-v2.0.0n*iface WSA2Xbdefaultswr_audio_cgcrp ??         < 6#okayfspeaker@0,02sdw20217020400  6 ^WooferRightTXctq fspeaker@0,12sdw20217020400  6 ^TweeterRightTXctq fcodec@6ac000082qcom,x1e80100-lpass-rx-macroqcom,sm8550-lpass-rx-macro(n@fg*mclkmacrodcodecfsgenYmclk6fsoundwire@6ad00002qcom,soundwire-v2.0.0n*iface RXXbdefaultswr_audio_cgcrp           < 6#okayfcodec@0,42sdw20217010d00fcodec@6ae000082qcom,x1e80100-lpass-tx-macroqcom,sm8550-lpass-tx-macro(n9fg*mclkmacrodcodecfsgenYmclk6fcodec@6b00000:2qcom,x1e80100-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro(nBfg*mclkmacrodcodecfsgenYmclk6^WSAfsoundwire@6b100002qcom,soundwire-v2.0.0n*iface WSAXbdefaultswr_audio_cgcrp ??         < 6#okayfspeaker@0,02sdw20217020400  6 ^WooferLeftTXctq fspeaker@0,12sdw20217020400  6 ^TweeterLeftTXctq fclock-controller@6b6c00062qcom,x1e80100-lpassaudioccqcom,sc8280xp-lpassaudioccYfsoundwire@6d300002qcom,soundwire-v2.0.0n*iface RcorewakeupTXswr_audio_cgcrXbdefaultp< 6#okayfcodec@0,32sdw20217010d00fcodec@6d4400082qcom,x1e80100-lpass-va-macroqcom,sm8550-lpass-va-macro@$n9fg*mclkmacrodcodecYfsgen6XbdefaultI>fpinctrl@6e80000>2qcom,x1e80100-lpass-lpi-pinctrlqcom,sm8550-lpass-lpi-pinctrl %nfg *coreaudio ftx-swr-active-statefclk-pins gpio0 swr_tx_clk " 1 ;data-pins gpio1gpio2 swr_tx_data " 1 Hrx-swr-active-statefclk-pins gpio3 swr_rx_clk " 1 ;data-pins gpio4gpio5 swr_rx_data " 1 Hdmic01-default-statefclk-pins gpio6 dmic1_clk " Vdata-pins gpio7 dmic1_data " bdmic23-default-statefclk-pins gpio8 dmic2_clk " Vdata-pins gpio9 dmic2_data " bwsa-swr-active-statefclk-pins gpio10 wsa_swr_clk " 1 ;data-pins gpio11 wsa_swr_data " 1 Hwsa2-swr-active-statefclk-pins gpio15 wsa2_swr_clk " 1 ;data-pins gpio16 wsa2_swr_data " 1 Hspkr-01-sd-n-active-state gpio12 gpio " ; ofspkr-23-sd-n-active-state gpio13 gpio " ; ofclock-controller@6ea0000,2qcom,x1e80100-lpassccqcom,sc8280xp-lpasscc Yfinterconnect@7e400002qcom,x1e80100-lpass-ag-nocfLinterconnect@74000002qcom,x1e80100-lpass-lpiaon-noc@fMinterconnect@74300002qcom,x1e80100-lpass-lpicx-nocCfmmc@8804000&2qcom,x1e80100-sdhciqcom,sdhci-msm-v5@Rhc_irqpwr_irqn33(*ifacecorexo 2  zd, h1p0n566sdhc-ddrcpu-sdhc  #disabledfNopp-table2operating-points-v2fopp-192000000$7opp-5000000007%opp-10000000007&opp-2020000000 F7mmc@8844000&2qcom,x1e80100-sdhciqcom,sdhci-msm-v5@Rhc_irqpwr_irqn33(*ifacecorexo 2` zd, h1p0n566sdhc-ddrcpu-sdhc  #disabledfOopp-table2operating-points-v2fopp-192000000$7opp-5000000007%opp-10000000007&opp-2020000000 F7phy@88e000082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTGn *ref39 #disabledfphy@88e100082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTGn*ref34#okayfphy@88e200082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy TGn*ref35#okayfphy@88e30002qcom,x1e80100-qmp-usb3-uni-phy0  n333*auxrefcom_auxpipe3G3L phyphy_phy3Yusb_mp_phy0_pipe_clkG#okayfphy@88e50002qcom,x1e80100-qmp-usb3-uni-phyP  n333*auxrefcom_auxpipe3H3M phyphy_phy3Yusb_mp_phy1_pipe_clkG#okayfusb@a0f88002qcom,x1e80100-dwc3qcom,dwc3 Hn333333 333R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys533E$ 4Er:9 1Rpwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq373A0n56%6usb-ddrapps-usb #okayfPusb@a000000 2snps,dwc3  a 2 0 usb2-phyusb3-phy      %hostfQports port@0endpoint^fport@1endpoint^fusb@a2f88002qcom,x1e80100-dwc3qcom,dwc3 / Hn333333 333R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys533E$ (E21&Rpwr_eventdp_hs_phy_irqdm_hs_phy_irq373=0n56"6usb-ddrapps-usb - #disabledfRusb@a200000 2snps,dwc3   2 usb2-phy Jhigh-speed  fSportendpointfTusb@a4f8800 2qcom,x1e80100-dwc3-mpqcom,dwc3 OHn333333 333R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys533E$ E9:58436578lRpwr_event_1pwr_event_2hs_phy_1hs_phy_2dp_hs_phy_1dm_hs_phy_1dp_hs_phy_2dm_hs_phy_2ss_phy_1ss_phy_2373>0n56&6usb-ddrapps-usb #okayfUusb@a400000 2snps,dwc3 @ 3 2 usb2-0usb3-0usb2-1usb3-1 %host     fVusb@a6f88002qcom,x1e80100-dwc3qcom,dwc3 oHn3333 33 333R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys533E$ 4Es=1Rpwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq373? #okayfWusb@a600000 2snps,dwc3 ` c 2  . usb2-phyusb3-phy      %hostfXports port@0endpoint^fport@1endpoint^fusb@a8f88002qcom,x1e80100-dwc3qcom,dwc3 Hn33 333 3 333R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys53 3 E$ 4Et< /1Rpwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq373@0n56$6usb-ddrapps-usb #okayfYusb@a800000 2snps,dwc3  e 2` / usb2-phyusb3-phy      %hostfZports port@0endpoint^fport@1endpoint^fvideo-codec@aa00000$2qcom,x1e80100-irisqcom,sm8550-iris   1 1venusvcodec0mxcmmcxpn3Y*ifacecorevcodec0_core0n56*6cpu-cfgvideo-mem\3Xbus2@2G #disabledf[opp-table2operating-points-v2fopp-1920000000 q7opp-2400000000N7&%opp-3380000000%x7&&opp-3660000000з7&opp-4440000000v7opp-4810000000z@7clock-controller@aaf00002qcom,x1e80100-videocc  n(3X11 7%%Yfdisplay-subsystem@ae000002qcom,x1e80100-mdss mdss Sn3&:Hn5 566mdp0-memmdp1-memcpu-cfg 2 #okayfdisplay-controller@ae010002qcom,x1e80100-dpu   mdpvbifE(n3&=:F*nrt_busifacelutcorevsyncp1f\ports port@0endpoint^f port@4endpoint^fport@5endpoint^ fport@6endpoint^ fopp-table2operating-points-v2fopp-2000000000 7%opp-3250000000_@7&opp-3750000000Z 7opp-51400000007opp-5750000000"E7 displayport-controller@ae900002qcom,x1e80100-dpP     E 0n J*core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel5 X...p 1. dp6 ^DisplayPort0#okayf]ports port@0endpoint^ fport@1endpoint o^ z`=Av1fopp-table2operating-points-v2f opp-1600000000 h7%opp-2700000000߀7&opp-5400000000 /7opp-81000000000G7displayport-controller@ae980002qcom,x1e80100-dpP    E 0nJ*core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel5  X///p1/ dp6 ^DisplayPort1#okayf^ports port@0endpoint^fport@1endpoint o^ z`=Av1fopp-table2operating-points-v2fopp-1600000000 h7%opp-2700000000߀7&opp-5400000000 /7opp-81000000000G7displayport-controller@ae9a0002qcom,x1e80100-dpP    E0n"$'(*J*core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel5%)+ X000p10 dp6 ^DisplayPort2#okayf_ports port@0endpoint^f port@1endpoint o^ z`=Av1fopp-table2operating-points-v2fopp-1600000000 h7%opp-2700000000߀7&opp-5400000000 /7opp-81000000000G7displayport-controller@aea00002qcom,x1e80100-dpP     E(n-/23;*core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel504 Xp1 dp ^DisplayPort3#okayXbdefaultf`ports port@0endpoint^f port@1endpoint o z`=Av1^fopp-table2operating-points-v2fopp-1600000000 h7%opp-2700000000߀7&opp-5400000000 /7opp-81000000000G7aux-buspanel&2samsung,atna45af01samsung,atna33xc20  Xbdefaultportendpoint^fphy@aec2a002qcom,x1e80100-dp-phy@ * " & n" *auxcfg_ahbref1YG #disabledfaphy@aec5a002qcom,x1e80100-dp-phy@ Z R V Pn- *auxcfg_ahbref1YG#okayfclock-controller@af000002qcom,x1e80100-dispcc dn(3%)..//0017%Yfinterrupt-controller@b2200002qcom,x1e80100-pdcqcom,pdc "@dH **/ 4ca  0fpower-management@c300000%2qcom,x1e80100-aoss-qmpqcom,aoss-qmp 0'E' 'Yfsram@c3f00002qcom,rpmh-stats ?arbiter@c4000002qcom,x1e80100-spmi-pmic-arb0 @0 P@ Dcorechnlsobsrvr  fbspmi@c42d000 B@ L cnfgintr Rperiph_irq E fcpmic@02qcom,pm8550qcom,spmi-pmic fdpon@13002qcom,pmk8350-pon hlospbsfepwrkey2qcom,pmk8350-pwrkey tffresin2qcom,pmk8350-resin #disabledfgrtc@61002qcom,pmk8350-rtcab rtcalarmb  fhnvram@71002qcom,spmi-sdamq  qfireboot-reason@48H fjnvram@7e002qcom,spmi-sdam~  ~fkcharge-limit-en@73sfcharge-limit-end@75ufcharge-limit-delta@76vfgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio fpwm2qcom,pmk8550-pwm  #disabledflpmic@12qcom,pm8550qcom,spmi-pmic fmtemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio  fkypd-vol-up-n-state gpio6 normal   bfrtmr0-reset-n-active-state gpio10 normal  ;  &fusb0-3p3-reg-en-state gpio11 normal  ;  &fled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led #disabledfnpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm  #disabledfopmic@22qcom,pm8550qcom,spmi-pmic fptemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio  f pmic@32qcom,pmc8380qcom,spmi-pmic fqtemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio  fedp-bl-en-state gpio4 normal   &fpmic@42qcom,pmc8380qcom,spmi-pmic frtemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio ! f!pmic@52qcom,pmc8380qcom,spmi-pmic fstemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio " f"usb0-pwr-1p15-reg-en-state gpio8 normal  ;  &fpmic@82qcom,pm8550qcom,spmi-pmic fttemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio #f#misc-3p3-reg-en-state gpio6 normal ;  & 4  Dfpmic@92qcom,pm8550qcom,spmi-pmic  futemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio $f$usb0-1p8-reg-en-state gpio8 normal  ;  &fpmic@c2qcom,pm8010qcom,spmi-pmic   #disabledfvtemp-alarm@24002qcom,spmi-temp-alarm$ $pfspmi@c432000 C @ M cnfgintr Rperiph_irq E fwpmic@72qcom,smb2360qcom,spmi-pmic #okayfxphy@fd002qcom,smb2360-eusb2-repeaterG X% e&fpmic@a2qcom,smb2360qcom,spmi-pmic  #okayfyphy@fd002qcom,smb2360-eusb2-repeaterG X% e'fpmic@b2qcom,smb2360qcom,spmi-pmic  #okayfzphy@fd002qcom,smb2360-eusb2-repeaterG X% e(fpmic@c2qcom,smb2360qcom,spmi-pmic   #disabledf{phy@fd002qcom,smb2360-eusb2-repeaterGf|pinctrl@f1000002qcom,x1e80100-tlmm  V q ",fVedp0-hpd-default-state gpio119 edp0_hot ;fqup-i2c0-data-clk-state gpio0gpio1 qup0_se0 " fsqup-i2c1-data-clk-state gpio4gpio5 qup0_se1 " fyqup-i2c2-data-clk-state gpio8gpio9 qup0_se2 " fqup-i2c3-data-clk-state gpio12gpio13 qup0_se3 " fqup-i2c4-data-clk-state gpio16gpio17 qup0_se4 " fqup-i2c5-data-clk-state gpio20gpio21 qup0_se5 " fqup-i2c6-data-clk-state gpio24gpio25 qup0_se6 " fqup-i2c7-data-clk-state gpio14gpio15 qup0_se7 " fqup-i2c8-data-clk-state gpio32gpio33 qup1_se0 " fUqup-i2c9-data-clk-state gpio36gpio37 qup1_se1 " f\qup-i2c10-data-clk-state gpio40gpio41 qup1_se2 " f_qup-i2c11-data-clk-state gpio44gpio45 qup1_se3 " fbqup-i2c12-data-clk-state gpio48gpio49 qup1_se4 " fequp-i2c13-data-clk-state gpio52gpio53 qup1_se5 " fhqup-i2c14-data-clk-state gpio56gpio57 qup1_se6 " fkqup-i2c15-data-clk-state gpio54gpio55 qup1_se7 " foqup-i2c16-data-clk-state gpio64gpio65 qup2_se0 " f8qup-i2c17-data-clk-state gpio68gpio69 qup2_se1 " f<qup-i2c18-data-clk-state gpio72gpio73 qup2_se2 " f?qup-i2c19-data-clk-state gpio76gpio77 qup2_se3 " fCqup-i2c20-data-clk-state gpio80gpio81 qup2_se4 " fFqup-i2c21-data-clk-state gpio84gpio85 qup2_se5 " fIqup-i2c22-data-clk-state gpio88gpio89 qup2_se6 " fMqup-i2c23-data-clk-state gpio86gpio87 qup2_se7 " fPqup-spi0-cs-state gpio3 qup0_se0 " ;fxqup-spi0-data-clk-state gpio0gpio1gpio2 qup0_se0 " ;fwqup-spi1-cs-state gpio7 qup0_se1 " ;fqup-spi1-data-clk-state gpio4gpio5gpio6 qup0_se1 " ;fqup-spi2-cs-state gpio11 qup0_se2 " ;fqup-spi2-data-clk-state gpio8gpio9gpio10 qup0_se2 " ;fqup-spi3-cs-state gpio15 qup0_se3 " ;fqup-spi3-data-clk-state gpio12gpio13gpio14 qup0_se3 " ;fqup-spi4-cs-state gpio19 qup0_se4 " ;fqup-spi4-data-clk-state gpio16gpio17gpio18 qup0_se4 " ;fqup-spi5-cs-state gpio23 qup0_se5 " ;fqup-spi5-data-clk-state gpio20gpio21gpio22 qup0_se5 " ;fqup-spi6-cs-state gpio27 qup0_se6 " ;fqup-spi6-data-clk-state gpio24gpio25gpio26 qup0_se6 " ;fqup-spi7-cs-state gpio13 qup0_se7 " ;fqup-spi7-data-clk-state gpio14gpio15gpio12 qup0_se7 " ;fqup-spi8-cs-state gpio35 qup1_se0 " ;f[qup-spi8-data-clk-state gpio32gpio33gpio34 qup1_se0 " ;fZqup-spi9-cs-state gpio39 qup1_se1 " ;f^qup-spi9-data-clk-state gpio36gpio37gpio38 qup1_se1 " ;f]qup-spi10-cs-state gpio43 qup1_se2 " ;faqup-spi10-data-clk-state gpio40gpio41gpio42 qup1_se2 " ;f`qup-spi11-cs-state gpio47 qup1_se3 " ;fdqup-spi11-data-clk-state gpio44gpio45gpio46 qup1_se3 " ;fcqup-spi12-cs-state gpio51 qup1_se4 " ;fgqup-spi12-data-clk-state gpio48gpio49gpio50 qup1_se4 " ;ffqup-spi13-cs-state gpio55 qup1_se5 " ;fjqup-spi13-data-clk-state gpio52gpio53gpio54 qup1_se5 " ;fiqup-spi14-cs-state gpio59 qup1_se6 " ;fmqup-spi14-data-clk-state gpio56gpio57gpio58 qup1_se6 " ;flqup-spi15-cs-state gpio53 qup1_se7 " ;fqqup-spi15-data-clk-state gpio54gpio55gpio52 qup1_se7 " ;fpqup-spi16-cs-state gpio67 qup2_se0 " ;f;qup-spi16-data-clk-state gpio64gpio65gpio66 qup2_se0 " ;f:qup-spi17-cs-state gpio71 qup2_se1 " ;f>qup-spi17-data-clk-state gpio68gpio69gpio70 qup2_se1 " ;f=qup-spi18-cs-state gpio75 qup2_se2 " ;fBqup-spi18-data-clk-state gpio72gpio73gpio74 qup2_se2 " ;fAqup-spi19-cs-state gpio79 qup2_se3 " ;fEqup-spi19-data-clk-state gpio76gpio77gpio78 qup2_se3 " ;fDqup-spi20-cs-state gpio83 qup2_se4 " ;fHqup-spi20-data-clk-state gpio80gpio81gpio82 qup2_se4 " ;fGqup-spi21-cs-state gpio87 qup2_se5 " ;fKqup-spi21-data-clk-state gpio84gpio85gpio86 qup2_se5 " ;fJqup-spi22-cs-state gpio91 qup2_se6 " ;fOqup-spi22-data-clk-state gpio88gpio89gpio90 qup2_se6 " ;fNqup-spi23-cs-state gpio85 qup2_se7 " ;fRqup-spi23-data-clk-state gpio86gpio87gpio84 qup2_se7 " ;fQqup-uart2-default-statefcts-pins gpio8 qup0_se2 " ;rts-pins gpio9 qup0_se2 " ;tx-pins gpio10 qup0_se2 " ;rx-pins gpio11 qup0_se2 " ;qup-uart14-default-statefncts-pins gpio56 qup1_se6 Hrts-pins gpio57 qup1_se6 " ;tx-pins gpio58 qup1_se6 " ;rx-pins gpio59 qup1_se6 qup-uart21-default-statefLtx-pins gpio86 qup2_se5 " ;rx-pins gpio87 qup2_se5 " ;sdc2-default-statef}clk-pins sdc2_clk " ;cmd-pins sdc2_cmd "  data-pins sdc2_data "  sdc2-sleep-statef~clk-pins sdc2_clk " ;cmd-pins sdc2_cmd " data-pins sdc2_data " edp-reg-en-state gpio70 gpio " ;feusb6-reset-n-state gpio184 gpio " ; ofhall-int-n-state gpio92 gpio ;fkybd-default-state gpio67 gpio ;fvnvme-reg-en-state gpio18 gpio " ;fpcie4-default-statefclkreq-n-pins gpio147 pcie4_clk " perst-n-pins gpio146 gpio " ;wake-n-pins gpio148 gpio " pcie5-default-statefclkreq-n-pins gpio150 pcie5_clk " perst-n-pins gpio149 gpio " ;wake-n-pins gpio151 gpio " pcie6a-default-statefclkreq-n-pins gpio153 pcie6a_clk " perst-n-pins gpio152 gpio " ;wake-n-pins gpio154 gpio " rtmr1-reset-n-active-state gpio176 gpio " ;frtmr2-reset-n-active-state gpio185 gpio " ;f}tpad-default-state gpio3 gpio ;futs0-default-statefYint-n-pins gpio51 gpio ;reset-n-pins gpio48 gpio V "usb1-pwr-1p15-reg-en-state gpio188 gpio " ;fusb1-pwr-1p8-reg-en-state gpio175 gpio " ;fusb1-pwr-3p3-reg-en-state gpio186 gpio " ;fusb2-pwr-1p15-reg-en-state gpio189 gpio " ;fusb2-pwr-1p8-reg-en-state gpio126 gpio " ;fusb2-pwr-3p3-reg-en-state gpio187 gpio " ;fwcd-reset-n-active-state gpio191 gpio " ; ofwwan-sw-en-state gpio221 gpio " ;fstm@10002000 2arm,coresight-stmarm,primecell  (stm-basestm-stimulus-basen *apb_pclkout-portsportendpoint^)f0tpdm@10003000"2qcom,coresight-tpdmarm,primecell0n *apb_pclk   #disabledout-portsportendpoint^*f+tpda@10004000"2qcom,coresight-tpdaarm,primecell@n *apb_pclkin-ports port@0endpoint^+f*port@1endpoint^,f.out-portsportendpoint^-f/tpdm@1000f000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^.f,funnel@10041000+2arm,coresight-dynamic-funnelarm,primecelln *apb_pclkin-ports port@6endpoint^/f-port@7endpoint^0f)out-portsportendpoint^1f6funnel@10042000+2arm,coresight-dynamic-funnelarm,primecell n *apb_pclkin-ports port@2endpoint^2f|port@5endpoint^3fFport@6endpoint^4fnout-portsportendpoint^5f7funnel@10045000+2arm,coresight-dynamic-funnelarm,primecellPn *apb_pclkin-ports port@0endpoint^6f1port@1endpoint^7f5out-portsportendpoint^8fItpdm@10800000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^9frtpdm@1082c000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^:fgtpdm@10841000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^;fetpdm@10844000"2qcom,coresight-tpdmarm,primecell@n *apb_pclk  out-portsportendpoint^<f=funnel@10846000+2arm,coresight-dynamic-funnelarm,primecell`n *apb_pclkin-portsportendpoint^=f<out-portsportendpoint^>fdcti@1098b000 2arm,coresight-ctiarm,primecelln *apb_pclktpdm@109d0000"2qcom,coresight-tpdmarm,primecelln *apb_pclk   #disabledout-portsportendpoint^?fftpdm@10ac0000"2qcom,coresight-tpdmarm,primecelln *apb_pclk   #disabledout-portsportendpoint^@fBtpdm@10ac1000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^AfCtpda@10ac4000"2qcom,coresight-tpdaarm,primecell@n *apb_pclkin-ports port@8endpoint^Bf@port@9 endpoint^CfAout-portsportendpoint^DfEfunnel@10ac5000+2arm,coresight-dynamic-funnelarm,primecellPn *apb_pclkin-portsportendpoint^EfDout-portsportendpoint^Ff3funnel@10b04000+2arm,coresight-dynamic-funnelarm,primecell@n *apb_pclkin-ports port@3endpoint^Gf^port@6endpoint^HfTport@7endpoint^If8out-portsportendpoint^JfKtmc@10b05000 2arm,coresight-tmcarm,primecellPn *apb_pclkfin-portsportendpoint^KfJout-portsportendpoint^LfMreplicator@10b06000/2arm,coresight-dynamic-replicatorarm,primecell`n *apb_pclkin-portsportendpoint^MfLout-portsportendpoint^Nftpda@10b08000"2qcom,coresight-tpdaarm,primecelln *apb_pclkin-ports port@0endpoint^OfUport@1endpoint^PfVport@2endpoint^QfWport@3endpoint^RfXport@4endpoint^SfYout-portsportendpoint^TfHtpdm@10b09000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^UfOtpdm@10b0a000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^VfPtpdm@10b0b000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^WfQtpdm@10b0c000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^XfRtpdm@10b0d000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^YfStpdm@10b20000"2qcom,coresight-tpdmarm,primecelln *apb_pclk   #disabledout-portsportendpoint^Zf[tpda@10b23000"2qcom,coresight-tpdaarm,primecell0n *apb_pclk #disabledin-portsportendpoint^[fZout-portsportendpoint^\f]funnel@10b24000+2arm,coresight-dynamic-funnelarm,primecell@n *apb_pclk #disabledin-portsportendpoint^]f\out-portsportendpoint^^fGtpdm@10c08000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^_f`funnel@10c0b000+2arm,coresight-dynamic-funnelarm,primecelln *apb_pclkin-ports port@4endpoint^`f_out-portsportendpoint^afqtpdm@10c28000"2qcom,coresight-tpdmarm,primecell€n *apb_pclk  out-portsportendpoint^bfhtpdm@10c29000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^cfitpda@10c2b000"2qcom,coresight-tpdaarm,primecell°n *apb_pclkin-ports port@4endpoint^df>port@13endpoint^ef;port@14endpoint^ff?port@15endpoint^gf:port@1aendpoint^hfbport@1bendpoint^ifcout-portsportendpoint^jfkfunnel@10c2c000+2arm,coresight-dynamic-funnelarm,primecelln *apb_pclkin-ports port@0endpoint^kfjport@4endpoint^lfwport@5endpoint^mf~out-portsportendpoint^nf4tpdm@10c38000"2qcom,coresight-tpdmarm,primecellÀn *apb_pclk @ out-portsportendpoint^ofstpdm@10c39000"2qcom,coresight-tpdmarm,primecellÐn *apb_pclk @ out-portsportendpoint^pfttpda@10c3c000"2qcom,coresight-tpdaarm,primecelln *apb_pclkin-ports port@4endpoint^qfaport@fendpoint^rf9port@10endpoint^sfoport@11endpoint^tfpout-portsportendpoint^ufvfunnel@10c3d000+2arm,coresight-dynamic-funnelarm,primecelln *apb_pclkin-portsportendpoint^vfuout-portsportendpoint^wfltpdm@10cc1000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @    #disabledout-portsportendpoint^xfytpda@10cc4000"2qcom,coresight-tpdaarm,primecell@n *apb_pclkin-ports port@2endpoint^yfxout-portsportendpoint^zf{funnel@10cc5000+2arm,coresight-dynamic-funnelarm,primecellPn *apb_pclkin-portsportendpoint^{fzout-portsportendpoint^|f2funnel@10d04000+2arm,coresight-dynamic-funnelarm,primecell@n *apb_pclkin-ports port@6endpoint^}fout-portsportendpoint^~fmtpdm@10d08000"2qcom,coresight-tpdmarm,primecellЀn *apb_pclk  out-portsportendpoint^ftpdm@10d09000"2qcom,coresight-tpdmarm,primecellАn *apb_pclk  out-portsportendpoint^ftpdm@10d0a000"2qcom,coresight-tpdmarm,primecellРn *apb_pclk  out-portsportendpoint^ftpdm@10d0b000"2qcom,coresight-tpdmarm,primecellаn *apb_pclk  out-portsportendpoint^ftpdm@10d0c000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^ftpdm@10d0d000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^ftpdm@10d0e000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^ftpdm@10d0f000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^ftpda@10d12000"2qcom,coresight-tpdaarm,primecell n *apb_pclkin-ports port@0endpoint^fport@1endpoint^fport@2endpoint^fport@3endpoint^fport@4endpoint^fport@5endpoint^fport@6endpoint^fport@7endpoint^fout-portsportendpoint^ffunnel@10d13000+2arm,coresight-dynamic-funnelarm,primecell0n *apb_pclkin-portsportendpoint^fout-portsportendpoint^f}iommu@1500000012qcom,x1e80100-smmu-500qcom,smmu-500arm,mmu-500Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYf2iommu@15400000 2arm,smmu-v3@$Reventqgerrorcmdq-sync#okayvedfinterrupt-controller@17000000 2arm,gic-v3 0     fmsi-controller@170400002arm,gic-v3-its  fwatchdog@17410000%2qcom,apss-wdt-x1e80100qcom,kpss-wdtAn) #okayvedfmailbox@174300002qcom,x1e80100-cpucp-mbox C frsc@175000002qcom,rpmh-rsc0PQRdrv-0drv-1drv-2$ *  : F apps_rsc#fbcm-voter2qcom,bcm-voterfclock-controller2qcom,x1e80100-rpmh-clkn*xoYfpower-controller2qcom,x1e80100-rpmhpdpf1opp-table2operating-points-v2fopp-16fopp-480fopp-524fopp-568fopp-60<fopp-64@f%opp-80Pfopp-128f&opp-144fopp-192fopp-256fopp-320@f opp-336Pfopp-384fopp-416fregulators-02qcom,pm8550-rpmh-regulators Vb c s        bob1 vreg_bob1 - 6opp-1{q@opp-2{|opp-3{opp-4{Ȁopp-5{`@pmu@240b6400*2qcom,x1e80100-cpu-bwmonqcom,sdm845-bwmon$ d En55 psystem-cache-controller@250000002qcom,x1e80100-llcc% % %@ %` % % % % & & llcc0_basellcc1_basellcc2_basellcc3_basellcc4_basellcc5_basellcc6_basellcc7_basellcc_broadcast_basellcc_broadcast_and_base  remoteproc@323000002qcom,x1e80100-cdsp-pas20@EB#Rwdogfatalreadyhandoverstop-ackn*xo11 1  cxmxcnspn\stop#okay2jqcom/x1e80100/cdsp.mbnqcom/x1e80100/cdsp_dtb.mbnfglink-edgeE' 'cdsprfastrpc 2qcom,fastrpcfastrpcglink-apps-dspcdsp compute-cb@12qcom,fastrpc-compute-cb 2  compute-cb@22qcom,fastrpc-compute-cb 2  compute-cb@32qcom,fastrpc-compute-cb 2  compute-cb@42qcom,fastrpc-compute-cb 2  compute-cb@52qcom,fastrpc-compute-cb 2  compute-cb@62qcom,fastrpc-compute-cb 2  compute-cb@72qcom,fastrpc-compute-cb 2  compute-cb@82qcom,fastrpc-compute-cb 2  compute-cb@102qcom,fastrpc-compute-cb  2 compute-cb@112qcom,fastrpc-compute-cb  2 compute-cb@122qcom,fastrpc-compute-cb  2  compute-cb@132qcom,fastrpc-compute-cb  2  phy@1bd4000"2qcom,x1p42100-qmp-gen4x4-pcie-phy @ ` 0n3X3V3Y3[3]$*auxcfg_ahbrefrchngpipepipediv233phyphy_nocsr53YE3Ypcie3_pipe_clkG #disabledf*timer2arm,armv8-timer0   thermal-zonesfaoss0-thermal tripstrip-point0 _hottrip-point1 8 criticalcpu0-0-top-thermal tripstrip-point0 8 criticalcpu0-0-btm-thermal tripstrip-point0 8 criticalcpu0-1-top-thermal tripstrip-point0 8 criticalcpu0-1-btm-thermal tripstrip-point0 8 criticalcpu0-2-top-thermal tripstrip-point0 8 criticalcpu0-2-btm-thermal tripstrip-point0 8 criticalcpu0-3-top-thermal tripstrip-point0 8 criticalcpu0-3-btm-thermal tripstrip-point0 8 criticalcpuss0-top-thermal  tripstrip-point0 8 criticalcpuss0-btm-thermal  tripstrip-point0 8 criticalmem-thermal  tripstrip-point0 _hottrip-point1 8 criticalvideo-thermal  tripstrip-point0 _hottrip-point1 8 criticalaoss1-thermal tripstrip-point0 _hottrip-point1 8 criticalcpu1-0-top-thermal tripstrip-point0 8 criticalcpu1-0-btm-thermal tripstrip-point0 8 criticalcpu1-1-top-thermal tripstrip-point0 8 criticalcpu1-1-btm-thermal tripstrip-point0 8 criticalcpu1-2-top-thermal tripstrip-point0 8 criticalcpu1-2-btm-thermal tripstrip-point0 8 criticalcpu1-3-top-thermal tripstrip-point0 8 criticalcpu1-3-btm-thermal tripstrip-point0 8 criticalcpuss1-top-thermal  tripstrip-point0 8 criticalcpuss1-btm-thermal  tripstrip-point0 8 criticalaoss2-thermal tripstrip-point0 _hottrip-point1 8 criticalnsp0-thermal tripstrip-point0 _hottrip-point1 8 criticalnsp1-thermal tripstrip-point0 _hottrip-point1 8 criticalnsp2-thermal tripstrip-point0 _hottrip-point1 8 criticalnsp3-thermal tripstrip-point0 _hottrip-point1 8 criticalgpuss-0-thermal cooling-mapsmap0% *tripstrip-point0 spassiveftrip-point1 8 criticalgpuss-1-thermal cooling-mapsmap0% *tripstrip-point0 spassiveftrip-point1 8 criticalgpuss-2-thermal cooling-mapsmap0% *tripstrip-point0 spassiveftrip-point1 8 criticalgpuss-3-thermal cooling-mapsmap0% *tripstrip-point0 spassiveftrip-point1 8 criticalcamera0-thermal  tripstrip-point0 _hottrip-point1 8 criticalcamera1-thermal  tripstrip-point0 _hottrip-point1 8 criticalpm8550-thermald tripstrip0 spassivetrip1 8hotpm8550ve-2-thermald tripstrip0 spassivetrip1 8hotpmc8380-3-thermald tripstrip0 spassivetrip1 8hotpmc8380-4-thermald tripstrip0 spassivetrip1 8hotpmc8380-5-thermald tripstrip0 spassivetrip1 8hotpm8550ve-8-thermald tripstrip0 spassivetrip1 8hotpm8550ve-9-thermald tripstrip0 spassivetrip1 8hotpm8010-thermald tripstrip0 spassivetrip1 8hotaliases$9/soc@0/geniqup@8c0000/serial@894000audio-codec2qcom,wcd9385-codecbdefaultXAw@Yw@qw@w@ $I     P' V6XFXcXV6fgpio-keys 2gpio-keysXbdefaultkey-vol-up volume_up  sswitch-lidlid V\j {pmic-glink@2qcom,x1e80100-pmic-glinkqcom,sm8550-pmic-glinkqcom,pmic-glink $VyV{V} ?4Kcharge_limit_encharge_limit_endcharge_limit_deltaconnector@02usb-c-connectordualdualports port@0endpoint^fport@1endpoint^fport@2endpoint^fconnector@12usb-c-connectordualdualports port@0endpoint^fport@1endpoint^fport@2endpoint^fconnector@22usb-c-connectordualdualports port@0endpoint^fport@1endpoint^f~port@2endpoint^fsound2qcom,x1e80100-sndcard ,X1E80100-CRDWooferLeft INWSA WSA_SPK1 OUTTweeterLeft INWSA WSA_SPK2 OUTWooferRight INWSA2 WSA_SPK2 OUTTweeterRight INWSA2 WSA_SPK2 OUTIN1_HPHLHPHL_OUTIN2_HPHRHPHR_OUTAMIC2MIC BIAS2VA DMIC0MIC BIAS3VA DMIC1MIC BIAS3VA DMIC2MIC BIAS1VA DMIC3MIC BIAS1TX SWR_INPUT1ADC2_OUTPUTwcd-playback-dai-link WCD Playbackcpuqcodecplatformwcd-capture-dai-link WCD Capturecpuxcodecplatformwsa-dai-link WSA Playbackcpuicodec0platformva-dai-link VA Capturecpuncodecplatformregulator-edp-3p32regulator-fixed VREG_EDP_3P3 2Z 62Z VFXbdefaultfregulator-misc-3p32regulator-fixed VREG_MISC_3P3 2Z 62Z #bdefaultX efWregulator-nvme2regulator-fixed VREG_NVME_3P3 2Z 62Z VbdefaultXfregulator-rtmr0-1p152regulator-fixed VREG_RTMR0_1P15 0 60 "Xbdefaultfregulator-rtmr0-1p82regulator-fixed VREG_RTMR0_1P8 w@ 6w@ $Xbdefaultfregulator-rtmr0-3p32regulator-fixed VREG_RTMR0_3P3 2Z 62Z  Xbdefaultfregulator-rtmr1-1p152regulator-fixed VREG_RTMR1_1P15 0 60 VXbdefaultfregulator-rtmr1-1p82regulator-fixed VREG_RTMR1_1P8 w@ 6w@ VXbdefaultfregulator-rtmr1-3p32regulator-fixed VREG_RTMR1_3P3 2Z 62Z VXbdefaultfregulator-rtmr2-1p152regulator-fixed VREG_RTMR2_1P15 0 60 VXbdefaultfzregulator-rtmr2-1p82regulator-fixed VREG_RTMR2_1P8 w@ 6w@ V~Xbdefaultf|regulator-rtmr2-3p32regulator-fixed VREG_RTMR2_3P3 2Z 62Z VXbdefaultf{regulator-vph-pwr2regulator-fixed vph_pwr 8u  68u  efregulator-wwan2regulator-fixed SDX_VPH_PWR 2Z 62Z VXbdefaultf__symbols__/clocks/xo-board /clocks/sleep-clk/clocks/bi-tcxo-div2-clk"/clocks/bi-tcxo-ao-div2-clk 2/cpus/cpu@07/cpus/cpu@0/l2-cache/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpointRM/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpointR\/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpointFk/soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table@y/soc@0/display-subsystem@ae00000/displayport-controller@ae90000V/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpointV/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpointJ/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table@/soc@0/display-subsystem@ae00000/displayport-controller@ae98000V/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpointV/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpointJ/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table@/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000V/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpointV/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@1/endpointJ/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table@/soc@0/display-subsystem@ae00000/displayport-controller@aea0000V!/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpointV-/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@1/endpointJ:/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table\M/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/aux-bus/panel/port/endpointZ/soc@0/phy@aec2a00g/soc@0/phy@aec5a00 t/soc@0/clock-controller@af00000${/soc@0/interrupt-controller@b220000 /soc@0/power-management@c300000/soc@0/arbiter@c400000$/soc@0/arbiter@c400000/spmi@c42d000+/soc@0/arbiter@c400000/spmi@c42d000/pmic@04/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300;/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/pwrkey:/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/resin4/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/rtc@61006/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100G/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100/reboot-reason@486/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00I/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-en@73J /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-end@75L/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-delta@765-/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800/;/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pwm+G/soc@0/arbiter@c400000/spmi@c42d000/pmic@1:N/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/temp-alarm@a005`/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800Im/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/kypd-vol-up-n-stateP{/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-reset-n-active-stateK/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/usb0-3p3-reg-en-state?/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/led-controller@ee00//soc@0/arbiter@c400000/spmi@c42d000/pmic@1/pwm+/soc@0/arbiter@c400000/spmi@c42d000/pmic@2:/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/temp-alarm@a005/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/gpio@8800+/soc@0/arbiter@c400000/spmi@c42d000/pmic@3:/soc@0/arbiter@c400000/spmi@c42d000/pmic@3/temp-alarm@a005/soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800E/soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800/edp-bl-en-state+/soc@0/arbiter@c400000/spmi@c42d000/pmic@4:&/soc@0/arbiter@c400000/spmi@c42d000/pmic@4/temp-alarm@a005;/soc@0/arbiter@c400000/spmi@c42d000/pmic@4/gpio@8800+K/soc@0/arbiter@c400000/spmi@c42d000/pmic@5:U/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/temp-alarm@a005j/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800Pz/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800/usb0-pwr-1p15-reg-en-state+/soc@0/arbiter@c400000/spmi@c42d000/pmic@8:/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/temp-alarm@a005/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800K/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800/misc-3p3-reg-en-state+/soc@0/arbiter@c400000/spmi@c42d000/pmic@9:/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/temp-alarm@a005/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800K /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800/usb0-1p8-reg-en-state+ /soc@0/arbiter@c400000/spmi@c42d000/pmic@c; /soc@0/arbiter@c400000/spmi@c42d000/pmic@c/temp-alarm@2400$ ,/soc@0/arbiter@c400000/spmi@c432000+ 6/soc@0/arbiter@c400000/spmi@c432000/pmic@74 @/soc@0/arbiter@c400000/spmi@c432000/pmic@7/phy@fd00+ Y/soc@0/arbiter@c400000/spmi@c432000/pmic@a4 c/soc@0/arbiter@c400000/spmi@c432000/pmic@a/phy@fd00+ |/soc@0/arbiter@c400000/spmi@c432000/pmic@b4 /soc@0/arbiter@c400000/spmi@c432000/pmic@b/phy@fd00+ /soc@0/arbiter@c400000/spmi@c432000/pmic@c4 /soc@0/arbiter@c400000/spmi@c432000/pmic@c/phy@fd00/soc@0/pinctrl@f100000. /soc@0/pinctrl@f100000/edp0-hpd-default-state/ /soc@0/pinctrl@f100000/qup-i2c0-data-clk-state/ /soc@0/pinctrl@f100000/qup-i2c1-data-clk-state/ /soc@0/pinctrl@f100000/qup-i2c2-data-clk-state/! /soc@0/pinctrl@f100000/qup-i2c3-data-clk-state/!/soc@0/pinctrl@f100000/qup-i2c4-data-clk-state/!-/soc@0/pinctrl@f100000/qup-i2c5-data-clk-state/!?/soc@0/pinctrl@f100000/qup-i2c6-data-clk-state/!Q/soc@0/pinctrl@f100000/qup-i2c7-data-clk-state/!c/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state/!u/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state0!/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state0!/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state0!/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state0!/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state0!/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state0!/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state0!/soc@0/pinctrl@f100000/qup-i2c16-data-clk-state0" /soc@0/pinctrl@f100000/qup-i2c17-data-clk-state0"/soc@0/pinctrl@f100000/qup-i2c18-data-clk-state0"2/soc@0/pinctrl@f100000/qup-i2c19-data-clk-state0"E/soc@0/pinctrl@f100000/qup-i2c20-data-clk-state0"X/soc@0/pinctrl@f100000/qup-i2c21-data-clk-state0"k/soc@0/pinctrl@f100000/qup-i2c22-data-clk-state0"~/soc@0/pinctrl@f100000/qup-i2c23-data-clk-state)"/soc@0/pinctrl@f100000/qup-spi0-cs-state/"/soc@0/pinctrl@f100000/qup-spi0-data-clk-state)"/soc@0/pinctrl@f100000/qup-spi1-cs-state/"/soc@0/pinctrl@f100000/qup-spi1-data-clk-state)"/soc@0/pinctrl@f100000/qup-spi2-cs-state/"/soc@0/pinctrl@f100000/qup-spi2-data-clk-state)"/soc@0/pinctrl@f100000/qup-spi3-cs-state/"/soc@0/pinctrl@f100000/qup-spi3-data-clk-state)# /soc@0/pinctrl@f100000/qup-spi4-cs-state/#/soc@0/pinctrl@f100000/qup-spi4-data-clk-state)#'/soc@0/pinctrl@f100000/qup-spi5-cs-state/#3/soc@0/pinctrl@f100000/qup-spi5-data-clk-state)#E/soc@0/pinctrl@f100000/qup-spi6-cs-state/#Q/soc@0/pinctrl@f100000/qup-spi6-data-clk-state)#c/soc@0/pinctrl@f100000/qup-spi7-cs-state/#o/soc@0/pinctrl@f100000/qup-spi7-data-clk-state)#/soc@0/pinctrl@f100000/qup-spi8-cs-state/#/soc@0/pinctrl@f100000/qup-spi8-data-clk-state)#/soc@0/pinctrl@f100000/qup-spi9-cs-state/#/soc@0/pinctrl@f100000/qup-spi9-data-clk-state*#/soc@0/pinctrl@f100000/qup-spi10-cs-state0#/soc@0/pinctrl@f100000/qup-spi10-data-clk-state*#/soc@0/pinctrl@f100000/qup-spi11-cs-state0#/soc@0/pinctrl@f100000/qup-spi11-data-clk-state*#/soc@0/pinctrl@f100000/qup-spi12-cs-state0$ /soc@0/pinctrl@f100000/qup-spi12-data-clk-state*$/soc@0/pinctrl@f100000/qup-spi13-cs-state0$*/soc@0/pinctrl@f100000/qup-spi13-data-clk-state*$=/soc@0/pinctrl@f100000/qup-spi14-cs-state0$J/soc@0/pinctrl@f100000/qup-spi14-data-clk-state*$]/soc@0/pinctrl@f100000/qup-spi15-cs-state0$j/soc@0/pinctrl@f100000/qup-spi15-data-clk-state*$}/soc@0/pinctrl@f100000/qup-spi16-cs-state0$/soc@0/pinctrl@f100000/qup-spi16-data-clk-state*$/soc@0/pinctrl@f100000/qup-spi17-cs-state0$/soc@0/pinctrl@f100000/qup-spi17-data-clk-state*$/soc@0/pinctrl@f100000/qup-spi18-cs-state0$/soc@0/pinctrl@f100000/qup-spi18-data-clk-state*$/soc@0/pinctrl@f100000/qup-spi19-cs-state0$/soc@0/pinctrl@f100000/qup-spi19-data-clk-state*$/soc@0/pinctrl@f100000/qup-spi20-cs-state0% /soc@0/pinctrl@f100000/qup-spi20-data-clk-state*%/soc@0/pinctrl@f100000/qup-spi21-cs-state0%*/soc@0/pinctrl@f100000/qup-spi21-data-clk-state*%=/soc@0/pinctrl@f100000/qup-spi22-cs-state0%J/soc@0/pinctrl@f100000/qup-spi22-data-clk-state*%]/soc@0/pinctrl@f100000/qup-spi23-cs-state0%j/soc@0/pinctrl@f100000/qup-spi23-data-clk-state/%}/soc@0/pinctrl@f100000/qup-uart2-default-state0%/soc@0/pinctrl@f100000/qup-uart14-default-state0%/soc@0/pinctrl@f100000/qup-uart21-default-state*%/soc@0/pinctrl@f100000/sdc2-default-state(%/soc@0/pinctrl@f100000/sdc2-sleep-state(%/soc@0/pinctrl@f100000/edp-reg-en-state+%/soc@0/pinctrl@f100000/eusb6-reset-n-state(%/soc@0/pinctrl@f100000/hall-int-n-state*%/soc@0/pinctrl@f100000/kybd-default-state)&/soc@0/pinctrl@f100000/nvme-reg-en-state+&/soc@0/pinctrl@f100000/pcie4-default-state+& /soc@0/pinctrl@f100000/pcie5-default-state,&./soc@0/pinctrl@f100000/pcie6a-default-state2&=/soc@0/pinctrl@f100000/rtmr1-reset-n-active-state2&K/soc@0/pinctrl@f100000/rtmr2-reset-n-active-state*&Y/soc@0/pinctrl@f100000/tpad-default-state)&f/soc@0/pinctrl@f100000/ts0-default-state2&r/soc@0/pinctrl@f100000/usb1-pwr-1p15-reg-en-state1&/soc@0/pinctrl@f100000/usb1-pwr-1p8-reg-en-state1&/soc@0/pinctrl@f100000/usb1-pwr-3p3-reg-en-state2&/soc@0/pinctrl@f100000/usb2-pwr-1p15-reg-en-state1&/soc@0/pinctrl@f100000/usb2-pwr-1p8-reg-en-state1&/soc@0/pinctrl@f100000/usb2-pwr-3p3-reg-en-state0&/soc@0/pinctrl@f100000/wcd-reset-n-active-state(&/soc@0/pinctrl@f100000/wwan-sw-en-state,'/soc@0/stm@10002000/out-ports/port/endpoint-' /soc@0/tpdm@10003000/out-ports/port/endpoint.'/soc@0/tpda@10004000/in-ports/port@0/endpoint.'&/soc@0/tpda@10004000/in-ports/port@1/endpoint-'4/soc@0/tpda@10004000/out-ports/port/endpoint-'B/soc@0/tpdm@1000f000/out-ports/port/endpoint0'P/soc@0/funnel@10041000/in-ports/port@6/endpoint0'\/soc@0/funnel@10041000/in-ports/port@7/endpoint/'h/soc@0/funnel@10041000/out-ports/port/endpoint0't/soc@0/funnel@10042000/in-ports/port@2/endpoint0'/soc@0/funnel@10042000/in-ports/port@5/endpoint0'/soc@0/funnel@10042000/in-ports/port@6/endpoint/'/soc@0/funnel@10042000/out-ports/port/endpoint0'/soc@0/funnel@10045000/in-ports/port@0/endpoint0'/soc@0/funnel@10045000/in-ports/port@1/endpoint/'/soc@0/funnel@10045000/out-ports/port/endpoint-'/soc@0/tpdm@10800000/out-ports/port/endpoint-'/soc@0/tpdm@1082c000/out-ports/port/endpoint-'/soc@0/tpdm@10841000/out-ports/port/endpoint-'/soc@0/tpdm@10844000/out-ports/port/endpoint.(/soc@0/funnel@10846000/in-ports/port/endpoint/("/soc@0/funnel@10846000/out-ports/port/endpoint-(6/soc@0/tpdm@109d0000/out-ports/port/endpoint-(B/soc@0/tpdm@10ac0000/out-ports/port/endpoint-(Q/soc@0/tpdm@10ac1000/out-ports/port/endpoint.(`/soc@0/tpda@10ac4000/in-ports/port@8/endpoint.(n/soc@0/tpda@10ac4000/in-ports/port@9/endpoint-(|/soc@0/tpda@10ac4000/out-ports/port/endpoint.(/soc@0/funnel@10ac5000/in-ports/port/endpoint/(/soc@0/funnel@10ac5000/out-ports/port/endpoint0(/soc@0/funnel@10b04000/in-ports/port@3/endpoint0(/soc@0/funnel@10b04000/in-ports/port@6/endpoint0(/soc@0/funnel@10b04000/in-ports/port@7/endpoint/(/soc@0/funnel@10b04000/out-ports/port/endpoint(/soc@0/tmc@10b05000+(/soc@0/tmc@10b05000/in-ports/port/endpoint,(/soc@0/tmc@10b05000/out-ports/port/endpoint2)/soc@0/replicator@10b06000/in-ports/port/endpoint3) /soc@0/replicator@10b06000/out-ports/port/endpoint.)/soc@0/tpda@10b08000/in-ports/port@0/endpoint.)(/soc@0/tpda@10b08000/in-ports/port@1/endpoint.)6/soc@0/tpda@10b08000/in-ports/port@2/endpoint.)D/soc@0/tpda@10b08000/in-ports/port@3/endpoint.)R/soc@0/tpda@10b08000/in-ports/port@4/endpoint-)`/soc@0/tpda@10b08000/out-ports/port/endpoint-)n/soc@0/tpdm@10b09000/out-ports/port/endpoint-)}/soc@0/tpdm@10b0a000/out-ports/port/endpoint-)/soc@0/tpdm@10b0b000/out-ports/port/endpoint-)/soc@0/tpdm@10b0c000/out-ports/port/endpoint-)/soc@0/tpdm@10b0d000/out-ports/port/endpoint-)/soc@0/tpdm@10b20000/out-ports/port/endpoint,)/soc@0/tpda@10b23000/in-ports/port/endpoint-)/soc@0/tpda@10b23000/out-ports/port/endpoint.)/soc@0/funnel@10b24000/in-ports/port/endpoint/)/soc@0/funnel@10b24000/out-ports/port/endpoint-*/soc@0/tpdm@10c08000/out-ports/port/endpoint0*/soc@0/funnel@10c0b000/in-ports/port@4/endpoint/*)/soc@0/funnel@10c0b000/out-ports/port/endpoint-*7/soc@0/tpdm@10c28000/out-ports/port/endpoint-*F/soc@0/tpdm@10c29000/out-ports/port/endpoint.*T/soc@0/tpda@10c2b000/in-ports/port@4/endpoint/*c/soc@0/tpda@10c2b000/in-ports/port@13/endpoint/*s/soc@0/tpda@10c2b000/in-ports/port@14/endpoint/*/soc@0/tpda@10c2b000/in-ports/port@15/endpoint/*/soc@0/tpda@10c2b000/in-ports/port@1a/endpoint/*/soc@0/tpda@10c2b000/in-ports/port@1b/endpoint-*/soc@0/tpda@10c2b000/out-ports/port/endpoint0*/soc@0/funnel@10c2c000/in-ports/port@0/endpoint0*/soc@0/funnel@10c2c000/in-ports/port@4/endpoint0*/soc@0/funnel@10c2c000/in-ports/port@5/endpoint/*/soc@0/funnel@10c2c000/out-ports/port/endpoint-+/soc@0/tpdm@10c38000/out-ports/port/endpoint-+/soc@0/tpdm@10c39000/out-ports/port/endpoint.+&/soc@0/tpda@10c3c000/in-ports/port@4/endpoint.+5/soc@0/tpda@10c3c000/in-ports/port@f/endpoint/+E/soc@0/tpda@10c3c000/in-ports/port@10/endpoint/+U/soc@0/tpda@10c3c000/in-ports/port@11/endpoint-+e/soc@0/tpda@10c3c000/out-ports/port/endpoint.+t/soc@0/funnel@10c3d000/in-ports/port/endpoint/+/soc@0/funnel@10c3d000/out-ports/port/endpoint-+/soc@0/tpdm@10cc1000/out-ports/port/endpoint.+/soc@0/tpda@10cc4000/in-ports/port@2/endpoint-+/soc@0/tpda@10cc4000/out-ports/port/endpoint.+/soc@0/funnel@10cc5000/in-ports/port/endpoint/+/soc@0/funnel@10cc5000/out-ports/port/endpoint0+/soc@0/funnel@10d04000/in-ports/port@6/endpoint/+/soc@0/funnel@10d04000/out-ports/port/endpoint-,/soc@0/tpdm@10d08000/out-ports/port/endpoint-,/soc@0/tpdm@10d09000/out-ports/port/endpoint-,$/soc@0/tpdm@10d0a000/out-ports/port/endpoint-,3/soc@0/tpdm@10d0b000/out-ports/port/endpoint-,B/soc@0/tpdm@10d0c000/out-ports/port/endpoint-,Q/soc@0/tpdm@10d0d000/out-ports/port/endpoint-,`/soc@0/tpdm@10d0e000/out-ports/port/endpoint-,o/soc@0/tpdm@10d0f000/out-ports/port/endpoint.,~/soc@0/tpda@10d12000/in-ports/port@0/endpoint.,/soc@0/tpda@10d12000/in-ports/port@1/endpoint.,/soc@0/tpda@10d12000/in-ports/port@2/endpoint.,/soc@0/tpda@10d12000/in-ports/port@3/endpoint.,/soc@0/tpda@10d12000/in-ports/port@4/endpoint.,/soc@0/tpda@10d12000/in-ports/port@5/endpoint.,/soc@0/tpda@10d12000/in-ports/port@6/endpoint.,/soc@0/tpda@10d12000/in-ports/port@7/endpoint-,/soc@0/tpda@10d12000/out-ports/port/endpoint.,/soc@0/funnel@10d13000/in-ports/port/endpoint/- /soc@0/funnel@10d13000/out-ports/port/endpoint-/soc@0/iommu@15000000-&/soc@0/iommu@15400000%-0/soc@0/interrupt-controller@17000000=-5/soc@0/interrupt-controller@17000000/msi-controller@17040000-=/soc@0/watchdog@17410000-K/soc@0/mailbox@17430000-V/soc@0/rsc@17500000-_/soc@0/rsc@17500000/bcm-voter%-n/soc@0/rsc@17500000/clock-controller%-u/soc@0/rsc@17500000/power-controller/-|/soc@0/rsc@17500000/power-controller/opp-table6-/soc@0/rsc@17500000/power-controller/opp-table/opp-166-/soc@0/rsc@17500000/power-controller/opp-table/opp-486-/soc@0/rsc@17500000/power-controller/opp-table/opp-526-/soc@0/rsc@17500000/power-controller/opp-table/opp-566-/soc@0/rsc@17500000/power-controller/opp-table/opp-606-/soc@0/rsc@17500000/power-controller/opp-table/opp-646./soc@0/rsc@17500000/power-controller/opp-table/opp-807./soc@0/rsc@17500000/power-controller/opp-table/opp-1287.)/soc@0/rsc@17500000/power-controller/opp-table/opp-1447.;/soc@0/rsc@17500000/power-controller/opp-table/opp-1927.M/soc@0/rsc@17500000/power-controller/opp-table/opp-2567.\/soc@0/rsc@17500000/power-controller/opp-table/opp-3207.n/soc@0/rsc@17500000/power-controller/opp-table/opp-3367./soc@0/rsc@17500000/power-controller/opp-table/opp-3847./soc@0/rsc@17500000/power-controller/opp-table/opp-416&./soc@0/rsc@17500000/regulators-0/bob1&./soc@0/rsc@17500000/regulators-0/bob2&./soc@0/rsc@17500000/regulators-0/ldo1&./soc@0/rsc@17500000/regulators-0/ldo2&./soc@0/rsc@17500000/regulators-0/ldo4&./soc@0/rsc@17500000/regulators-0/ldo5&./soc@0/rsc@17500000/regulators-0/ldo6&./soc@0/rsc@17500000/regulators-0/ldo7&//soc@0/rsc@17500000/regulators-0/ldo8&//soc@0/rsc@17500000/regulators-0/ldo9'/!/soc@0/rsc@17500000/regulators-0/ldo10'///soc@0/rsc@17500000/regulators-0/ldo12'/=/soc@0/rsc@17500000/regulators-0/ldo13'/K/soc@0/rsc@17500000/regulators-0/ldo14'/Y/soc@0/rsc@17500000/regulators-0/ldo15'/g/soc@0/rsc@17500000/regulators-0/ldo16'/u/soc@0/rsc@17500000/regulators-0/ldo17'//soc@0/rsc@17500000/regulators-1/smps4&//soc@0/rsc@17500000/regulators-1/ldo1&//soc@0/rsc@17500000/regulators-1/ldo2&//soc@0/rsc@17500000/regulators-1/ldo3&//soc@0/rsc@17500000/regulators-2/ldo1&//soc@0/rsc@17500000/regulators-2/ldo2&//soc@0/rsc@17500000/regulators-2/ldo3&//soc@0/rsc@17500000/regulators-3/ldo2&//soc@0/rsc@17500000/regulators-3/ldo3'//soc@0/rsc@17500000/regulators-4/smps1&0/soc@0/rsc@17500000/regulators-4/ldo1&0/soc@0/rsc@17500000/regulators-4/ldo2&0/soc@0/rsc@17500000/regulators-4/ldo3'0,/soc@0/rsc@17500000/regulators-6/smps1'09/soc@0/rsc@17500000/regulators-6/smps2&0F/soc@0/rsc@17500000/regulators-6/ldo1&0S/soc@0/rsc@17500000/regulators-6/ldo2&0`/soc@0/rsc@17500000/regulators-6/ldo3'0m/soc@0/rsc@17500000/regulators-7/smps5&0z/soc@0/rsc@17500000/regulators-7/ldo1&0/soc@0/rsc@17500000/regulators-7/ldo2&0/soc@0/rsc@17500000/regulators-7/ldo30/soc@0/sram@18b4e000(0/soc@0/sram@18b4e000/scp-sram-section@0*0/soc@0/sram@18b4e000/scp-sram-section@2000/soc@0/watchdog@1c8400000/soc@0/efuse@221c8000(0/soc@0/efuse@221c8000/gpu-speed-bin@1190/soc@0/pmu@24091000/opp-table0/soc@0/pmu@240b54001 /soc@0/pmu@240b5400/opp-table1/soc@0/remoteproc@323000001-/soc@0/phy@1bd4000117/thermal-zones/gpuss-0-thermal/trips/trip-point011E/thermal-zones/gpuss-1-thermal/trips/trip-point011S/thermal-zones/gpuss-2-thermal/trips/trip-point011a/thermal-zones/gpuss-3-thermal/trips/trip-point0 1o/audio-codec.1w/pmic-glink/connector@0/ports/port@0/endpoint.1/pmic-glink/connector@0/ports/port@1/endpoint.1/pmic-glink/connector@0/ports/port@2/endpoint.1/pmic-glink/connector@1/ports/port@0/endpoint.1/pmic-glink/connector@1/ports/port@1/endpoint.1/pmic-glink/connector@1/ports/port@2/endpoint.1/pmic-glink/connector@2/ports/port@0/endpoint.2/pmic-glink/connector@2/ports/port@1/endpoint.2)/pmic-glink/connector@2/ports/port@2/endpoint2C/regulator-edp-3p32P/regulator-misc-3p32^/regulator-nvme2h/regulator-rtmr0-1p152x/regulator-rtmr0-1p82/regulator-rtmr0-3p32/regulator-rtmr1-1p152/regulator-rtmr1-1p82/regulator-rtmr1-3p32/regulator-rtmr2-1p152/regulator-rtmr2-1p82/regulator-rtmr2-3p32/regulator-vph-pwr2/regulator-wwan interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-pathclock-frequency#clock-cellsphandleclocksclock-multclock-divdevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namescache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usremote-endpointinterconnectsqcom,dload-modemboxesmbox-namesshmem#power-domain-cells#interconnect-cellsqcom,bcm-votersinterruptsdomain-idle-statesrangesno-maphwlockssizereusablelinux,cma-defaultopp-hzrequired-oppsinterrupts-extendedqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesoperating-points-v2hid-descr-addrvdd-supplyvddl-supplywakeup-sourcevdd33-supplyvdd33-cap-supplyvddar-supplyvddat-supplyvddio-supplyreset-gpiosorientation-switchretimer-switchvdd1v8-supplyvdd3v3-supply#phy-cellsinterrupt-names#qcom,sensors#thermal-sensor-cellsresetsvdda12-supplyphysreset-namesmode-switchvdda-phy-supplyvdda-pll-supplyreg-namesbus-rangedma-coherentlinux,pci-domainnum-lanesinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-rateseq-presets-8gtseq-presets-16gtsopp-peak-kBpsopp-levelmsi-mapvddpe-3v3-supplywake-gpiosqcom,4ln-config-selclock-output-namesqcom,eeqcom,controlled-remotelynum-channelsqcom,num-ees#hwlock-cellsqcom,gmu#cooling-cellsnvmem-cellsnvmem-cell-namesmemory-regionfirmware-nameqcom,opp-acd-levelopp-supported-hwqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainsound-name-prefixqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,rx-port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappingvdd-micb-supplyqcom,dmic-sample-rategpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowqcom,dll-configqcom,ddr-configbus-widthphy-namessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,usb3_lpm_capablesnps,dis-u1-entry-quirksnps,dis-u2-entry-quirkdr_modeqcom,select-utmi-as-pipe-clkmaximum-speedassigned-clock-parentsdata-laneslink-frequenciesenable-gpiospower-supplyqcom,pdc-rangesqcom,channellinux,codeqcom,no-alarmqcom,uefi-rtc-infobits#pwm-cellspower-sourcebias-pull-upinput-disableoutput-enabledrive-push-pullqcom,drive-strengthvdd18-supplyvdd3-supplywakeup-parentgpio-reserved-rangesqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-num#redistributor-regionsredistributor-stridemsi-controller#msi-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-bob1-supplyvdd-bob2-supplyvdd-l1-l4-l10-supplyvdd-l2-l13-l14-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onvdd-l1-supplyvdd-l2-supplyvdd-l3-supplyvdd-s4-supplyvdd-s1-supplyvdd-s2-supplyvdd-s5-supplyframe-numberthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-deviceserial0qcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplylinux,input-typewakeup-event-actionorientation-gpiospower-roledata-roleaudio-routinglink-namesound-daigpioenable-active-highregulator-boot-onxo_boardsleep_clkbi_tcxo_div2bi_tcxo_ao_div2cpu0l2_0cpu1cpu2cpu3cpu4l2_1cpu5cpu6cpu7cluster_c4cluster_cl4cluster_cl5eud_inscmscmi_dvfsclk_virtmc_virtcpu_pd0cpu_pd1cpu_pd2cpu_pd3cpu_pd4cpu_pd5cpu_pd6cpu_pd7cluster_pd0cluster_pd1system_pdgunyah_hyp_memhyp_elf_package_memncc_memcpucp_log_memcpucp_memtags_memxbl_dtlog_memxbl_ramdump_memaop_image_memaop_cmd_db_memaop_config_memtme_crash_dump_memtme_log_memuefi_log_memsecdata_apss_mempdp_ns_shared_memgpu_prr_memtpm_control_memusb_ucsi_shared_mempld_pep_mempld_gmu_mempld_pdp_memtz_stat_memxbl_tmp_buffer_memadsp_rpc_remote_heap_memspu_secure_shared_memory_memadsp_boot_dtb_memspss_region_memadsp_boot_memvideo_memadspslpi_memq6_adsp_dtb_memcdsp_memq6_cdsp_dtb_memgpu_microcode_memcvp_memcamera_memav1_encoder_memwpss_memq6_wpss_dtb_memxbl_sc_memqtee_memta_memtags_mem1llcc_lpi_memsmem_memqup_opp_table_100mhzqup_opp_table_120mhzsmp2p_adsp_outsmp2p_adsp_insmp2p_cdsp_outsmp2p_cdsp_insocgccipccgpi_dma2qupv3_2i2c16spi16i2c17spi17i2c18spi18i2c19spi19i2c20spi20i2c21spi21uart21i2c22spi22i2c23spi23gpi_dma1qupv3_1i2c8spi8i2c9spi9i2c10spi10i2c11spi11i2c12spi12i2c13spi13i2c14spi14uart14i2c15spi15gpi_dma0qupv3_0i2c0spi0i2c1reti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