8(E|renesas,v3hskrenesas,r8a77980 &7Renesas V3H Starter Kit boardcan fixed-clock=JZcpus cpu@0bcpuarm,cortex-a53n rypsciZcpu@1bcpuarm,cortex-a53n rypsciZcpu@2bcpuarm,cortex-a53n rypsciZcpu@3bcpuarm,cortex-a53n rypsciZcache-controllercacheyZextal fixed-clock=JP*Z extalr fixed-clock=JZ pcie_bus fixed-clock=JZ&pmu_a53arm,cortex-a53-pmu0TUVWpsciarm,psci-1.0arm,psci-0.2smcscif fixed-clock=JZsoc simple-bus watchdog@e6020000+renesas,r8a77980-wdtrenesas,rcar-gen3-wdtn   ry okay<watchdog@e6030000+renesas,r8a77980-wdtrenesas,rcar-gen3-wdtn   r%y  reservedgpio@e6050000-renesas,gpio-r8a77980renesas,rcar-gen3-gpionP  & 2C ry gpio@e6051000-renesas,gpio-r8a77980renesas,rcar-gen3-gpionP  & 2C ry Zgpio@e6052000-renesas,gpio-r8a77980renesas,rcar-gen3-gpion P  & @2C ry gpio@e6053000-renesas,gpio-r8a77980renesas,rcar-gen3-gpion0P  & `2C ry gpio@e6054000-renesas,gpio-r8a77980renesas,rcar-gen3-gpion@P  & 2C ry Z#gpio@e6055000-renesas,gpio-r8a77980renesas,rcar-gen3-gpionPP  & 2C ry pinctrl@e6060000renesas,pfc-r8a77980n Z getherBXgether_mdio_agether_rgmiigether_txcrefclkgether_txcrefclk_mega_getherZ!i2c0Xi2c0_i2c0Zqspi0Xqspi0_ctrlqspi0_data4_qspi0Z%scif0 Xscif0_data_scif0Zscif_clk Xscif_clk_b _scif_clkZtimer@e60f0000-renesas,r8a77980-cmt0renesas,rcar-gen3-cmt0n r/hfcky / disabledtimer@e6130000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1n`xyz{|}~ r.hfcky . disabledtimer@e6140000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1n`  r-hfcky - disabledtimer@e6148000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1n` r,hfcky , disabledclock-controller@e6150000renesas,r8a77980-cpg-mssrnr  hextalextalr=tZreset-controller@e6160000renesas,r8a77980-rstnsystem-controller@e6180000renesas,r8a77980-syscn@tZthermal@e6198000renesas,r8a77980-thermal n$CDE r y  Z7interrupt-controller@e61c0000&renesas,intc-ex-r8a77980renesas,irqc2CnH ry timer@e61e0000!renesas,tmu-r8a77980renesas,tmun0$tuni0tuni1tuni2 r}hfcky } disabledtimer@e6fc0000!renesas,tmu-r8a77980renesas,tmun00tuni0tuni1tuni2ticpi2 r|hfcky | disabledtimer@e6fd0000!renesas,tmu-r8a77980renesas,tmun00/012tuni0tuni1tuni2ticpi2 r{hfcky { disabledtimer@e6fe0000!renesas,tmu-r8a77980renesas,tmun00tuni0tuni1tuni2ticpi2 rzhfcky z disabledtimer@ffc00000!renesas,tmu-r8a77980renesas,tmun00tuvqtuni0tuni1tuni2ticpi2 ryhfcky y disabledi2c@e6500000+renesas,i2c-r8a77980renesas,rcar-gen3-i2cnP@  ry    txrxtxrx okaydefaultJhdmi@39 adi,adv7511wn9 (4AP`rgbu1xports port@0nendpointZ:port@1nendpointZ8i2c@e6508000+renesas,i2c-r8a77980renesas,rcar-gen3-i2cnP@   ry    txrxtxrx  disabledi2c@e6510000+renesas,i2c-r8a77980renesas,rcar-gen3-i2cnQ@  ry    txrxtxrx  disabledi2c@e66d0000+renesas,i2c-r8a77980renesas,rcar-gen3-i2cnm@ " ry   disabledi2c@e66d8000+renesas,i2c-r8a77980renesas,rcar-gen3-i2cnm@  ry   disabledi2c@e66e0000+renesas,i2c-r8a77980renesas,rcar-gen3-i2cnn@  ry    txrxtxrx  disabledserial@e6540000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscifnT` rhfckbrg_intscif_clk  1 0 1 0 txrxtxrxy  disabledserial@e6550000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscifnU` rhfckbrg_intscif_clk  3 2 3 2 txrxtxrxy  disabledserial@e6560000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscifnV` rhfckbrg_intscif_clk  5 4 5 4 txrxtxrxy  disabledserial@e66a0000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscifnj` rhfckbrg_intscif_clk  7 6 7 6 txrxtxrxy  disabledpcie-phy@e65d0000renesas,r8a77980-pcie-phyn] r?y ? disabledZ'can@e66c0000/renesas,r8a77980-canfdrenesas,rcar-gen3-canfdnl ch_intg_intr hfckcanfdcan_clk  Ĵy  disabledchannel0 disabledchannel1 disabledethernet@e68000005renesas,etheravb-r8a77980renesas,etheravb-rcar-gen3n,'()*+,-./0123456789:;<=>?sch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15ch16ch17ch18ch19ch20ch21ch22ch23ch24 r,hfcky ,rgmii!  disabledpwm@e6e30000&renesas,pwm-r8a77980renesas,pwm-rcarn r y   disabledpwm@e6e31000&renesas,pwm-r8a77980renesas,pwm-rcarn r y   disabledpwm@e6e32000&renesas,pwm-r8a77980renesas,pwm-rcarn  r y   disabledpwm@e6e33000&renesas,pwm-r8a77980renesas,pwm-rcarn0 r y   disabledpwm@e6e34000&renesas,pwm-r8a77980renesas,pwm-rcarn@ r y   disabledserial@e6e60000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scifn@ rhfckbrg_intscif_clk  Q P Q P txrxtxrxy okaydefaultserial@e6e68000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scifn@ rhfckbrg_intscif_clk  S R S R txrxtxrxy  disabledserial@e6c50000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scifn@ rhfckbrg_intscif_clk  W V W V txrxtxrxy  disabledserial@e6c40000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scifn@ rhfckbrg_intscif_clk  Y X Y X txrxtxrxy  disabledpwm@e6e80000!renesas,tpu-r8a77980renesas,tpunH  r0y 0 disabledspi@e6e90000/renesas,msiof-r8a77980renesas,rcar-gen3-msiofnd  ry   disabledspi@e6ea0000/renesas,msiof-r8a77980renesas,rcar-gen3-msiofnd  ry   disabledspi@e6c00000/renesas,msiof-r8a77980renesas,rcar-gen3-msiofnd  ry   disabledspi@e6c10000/renesas,msiof-r8a77980renesas,rcar-gen3-msiofnd  ry   disabledvideo@e6ef0000renesas,vin-r8a77980n  r+y +  disabledports port@1 nendpoint@2nZ*video@e6ef1000renesas,vin-r8a77980n  r*y  disabled *ports port@1 nendpoint@2nZ+video@e6ef2000renesas,vin-r8a77980n   r)y )  disabledports port@1 nendpoint@2nZ,video@e6ef3000renesas,vin-r8a77980n0  r(y (  disabledports port@1 nendpoint@2nZ-video@e6ef4000renesas,vin-r8a77980n@  r'y '  disabledports port@1 nendpoint@3nZ.video@e6ef5000renesas,vin-r8a77980nP  r&y &  disabledports port@1 nendpoint@3nZ/video@e6ef6000renesas,vin-r8a77980n`  r%y %  disabledports port@1 nendpoint@3nZ0video@e6ef7000renesas,vin-r8a77980np  r$y $  disabledports port@1 nendpoint@3n Z1video@e6ef8000renesas,vin-r8a77980n   rty t  disabledvideo@e6ef9000renesas,vin-r8a77980n   rsy s  disabledvideo@e6efa000renesas,vin-r8a77980n ! rqy q  disabledvideo@e6efb000renesas,vin-r8a77980n ( rjy j  disabledvideo@e6efc000renesas,vin-r8a77980n * rdy d  disabledvideo@e6efd000renesas,vin-r8a77980n + r`y `  disabledvideo@e6efe000renesas,vin-r8a77980n - r]y ]  disabledvideo@e6eff000renesas,vin-r8a77980n . r\y \  disableddma-controller@e7300000(renesas,dmac-r8a77980renesas,rcar-dmacn04567abcdefghLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 rhfcky       Z dma-controller@e7310000(renesas,dmac-r8a77980renesas,rcar-dmacn1389:;<=>?ijklmnopLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 rhfcky  Z ethernet@e7400000renesas,gether-r8a77980n@  r-y -" okay!defaultrgmii-"8ethernet-phy@04ethernet-phy-id0022.1622ethernet-phy-ieee802.3-c22Nn # Z#Z"iommu@e7740000renesas,ipmmu-r8a77980ntf$y yZiommu@ff8b0000renesas,ipmmu-r8a77980nf$yyiommu@e67b0000renesas,ipmmu-r8a77980n{y yZ$iommu@ffc80000renesas,ipmmu-r8a77980nf$ y yiommu@fe990000renesas,ipmmu-r8a77980nf$ y yiommu@febd0000renesas,ipmmu-r8a77980nf$y yZ(iommu@e7b00000renesas,ipmmu-r8a77980nf$y yiommu@e7960000renesas,ipmmu-r8a77980nf$ y ymmc@ee140000-renesas,sdhi-r8a77980renesas,rcar-gen3-sdhin  r: hcoreclkhy :   disabledspi@ee2000001renesas,r8a77980-rpc-ifrenesas,rcar-gen3-rpc-if0n  regsdirmapwbuf & ry  okay%defaultflash@0!spansion,s25fs512sjedec,spi-nornpartitionsfixed-partitions bootparam@0ncr7@40000ncert-header-sa3@c0000n bl2@140000ncert-header-sa6@180000nbl31@1c0000nFuboot@640000nd uboot-env@700000npdtb@740000ntkernel@7c0000n|@user@1bc0000nDinterrupt-controller@f1010000 arm,gic-4002 C@n   rhclky Zpcie@fe000000-renesas,pcie-r8a77980renesas,pcie-rcar-gen3n bpcip 00B88B$2 r?&hpciepcie_busy ?'pcie( disabledvsp@fea20000 renesas,vsp2nP  roy o))Z3fcp@fea27000 renesas,fcpvnp r[y [(Z)csi2@feaa0000renesas,r8a77980-csi2n  ry  disabledports port@0nport@1 nendpoint@0n*Zendpoint@1n+Zendpoint@2n,Zendpoint@3n-Zcsi2@feab0000renesas,r8a77980-csi2n  ry  disabledports port@0nport@1 nendpoint@0n.Zendpoint@1n/Zendpoint@2n0Zendpoint@3n1Z display@feb00000renesas,du-r8a77980n r2hdu.0dclkin.0y 5du.0A3okayports port@0nport@1nendpoint4Z5lvds-encoder@feb90000renesas,r8a77980-lvdsn ry okayports port@0nendpoint5Z4port@1nendpoint6Z9watchdog@ffc90000-renesas,r8a77980-wwdtrenesas,rcar-gen3-wwdtnqYpretimeouterrorr$"hcntbusy E5cnt disabledwatchdog@ffca0000-renesas,r8a77980-wwdtrenesas,rcar-gen3-wwdtnZpretimeouterrorr$"hcntbusy D5cnt disabledwatchdog@ffcb0000-renesas,r8a77980-wwdtrenesas,rcar-gen3-wwdtn  pretimeouterrorr$"hcntbusy A5cnt disabledwatchdog@ffcc0000-renesas,r8a77980-wwdtrenesas,rcar-gen3-wwdtn  pretimeouterrorr$"hcntbusy 55cnt disabledwatchdog@ffcf0000-renesas,r8a77980-wwdtrenesas,rcar-gen3-wwdtnApretimeouterrorr$"hcntbusy 5cnt disabledchipid@fff00044 renesas,prrnDthermal-zonessensor1-thermalNdr7tripssensor1-passivesipassivesensor1-critical icriticalsensor2-thermalNdr7tripssensor2-passivesipassivesensor2-critical icriticaltimerarm,armv8-timer0   sec-physphysvirthyp-physaliases/soc/i2c@e6500000/soc/i2c@e6508000/soc/i2c@e6510000/soc/i2c@e66d0000/soc/i2c@e66d8000/soc/i2c@e66e0000/soc/serial@e6e60000/soc/ethernet@e7400000chosenserial0:115200n8hdmi-outhdmi-connectoriaportendpoint8Zlvds-decoderthine,thc63lvd1024ports port@0nendpoint9Z6port@2nendpoint:Zmemory@48000000bmemorynHxosc1-clock fixed-clock=J Z2regulator-0regulator-fixed VCC1V8_D4w@w@1Zregulator-1regulator-fixed VCC3V3_D52Z2Z1Z compatible#address-cells#size-cellsinterrupt-parentmodel#clock-cellsclock-frequencyphandledevice_typeregclockspower-domainsnext-level-cacheenable-methodcache-unifiedcache-levelbootph-allinterruptsinterrupt-affinityrangesresetsstatustimeout-sec#gpio-cellsgpio-controllergpio-ranges#interrupt-cellsinterrupt-controllergroupsfunctionclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-namesdmasdma-namesi2c-scl-internal-delay-nspinctrl-0pinctrl-namesinterrupts-extendedavdd-supplydvdd-supplypvdd-supplybgvdd-supplydvdd-3v-supplyadi,input-depthadi,input-colorspaceadi,input-clockremote-endpoint#phy-cellsassigned-clocksassigned-clock-ratesphy-moderx-internal-delay-pstx-internal-delay-psiommus#pwm-cellsrenesas,id#dma-cellsdma-channelsphy-handlerenesas,no-ether-linkrxc-skew-psreset-gpiosrenesas,ipmmu-main#iommu-cellsmax-frequencyreg-namesspi-max-frequencyspi-rx-bus-widthread-onlybus-rangedma-rangesinterrupt-map-maskinterrupt-mapphysphy-namesiommu-mapiommu-map-maskrenesas,fcpreset-namesrenesas,vspspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisi2c0i2c1i2c2i2c3i2c4i2c5serial0ethernet0stdout-pathvcc-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-on