k8e4(d9renesas,rzn2h-evkrenesas,r9a09g087m44renesas,r9a09g087 &/7Renesas RZ/N2H EVK Board based on r9a09g087m44opp-table-0operating-points-v2=opp-600000000E#Fopp-1200000000EGcpus cpu@0arm,cortex-a55LPcpu\mpsci {="cpu@100arm,cortex-a55LPcpu\mpsci {=#cpu@200arm,cortex-a55LPcpu\mpsci {=$cpu@300arm,cortex-a55LPcpu\mpsci {=%cache-controller-0cache=extal fixed-clock}x@=pmuarm,cortex-a55-pmu psciarm,psci-1.0arm,psci-0.2tsmcsoc simple-bus serial@80005000.renesas,r9a09g087-rscirenesas,r9a09g077-rsciLP0NOPQerirxitxitei{  operationbus#okay*4defaultserial@80005400.renesas,r9a09g087-rscirenesas,r9a09g077-rsciLT0RSTUerirxitxitei{   operationbus #disabledserial@80005800.renesas,r9a09g087-rscirenesas,r9a09g077-rsciLX0VWXYerirxitxitei{   operationbus #disabledserial@80005c00.renesas,r9a09g087-rscirenesas,r9a09g077-rsciL\0Z[\]erirxitxitei{   operationbus #disabledserial@80006000.renesas,r9a09g087-rscirenesas,r9a09g077-rsciL`0^_`aerirxitxitei{   operationbus #disabledserial@81005000.renesas,r9a09g087-rscirenesas,r9a09g077-rsciLP0bcdeerirxitxitei{X  operationbus #disabledspi@80007000.renesas,r9a09g087-rspirenesas,r9a09g077-rspiLp<|}~z{idleerrorendrxtx{ h  pclkpclkspi  #disabledspi@80007400.renesas,r9a09g087-rspirenesas,r9a09g077-rspiLt<idleerrorendrxtx{ i  pclkpclkspi  #disabledspi@80007800.renesas,r9a09g087-rspirenesas,r9a09g077-rspiLx<idleerrorendrxtx{ j  pclkpclkspi  #disabledspi@81007000.renesas,r9a09g087-rspirenesas,r9a09g077-rspiLp<idleerrorendrxtx{ Z  pclkpclkspi  #disabledcan@800400000renesas,r9a09g087-canfdrenesas,r9a09g077-canfdL`yxstrvwu=g_errg_reccch0_errch0_recch0_trxch1_errch1_recch1_trx${6  fckram_clkcan_clk BRĴ #disabledchannel0 #disabledchannel1 #disabledwatchdog@80082000,renesas,r9a09g087-wdtrenesas,r9a09g077-wdt L )Q { pclk #disabledwatchdog@80082400,renesas,r9a09g087-wdtrenesas,r9a09g077-wdt L$)Q { pclk #disabledwatchdog@80082800,renesas,r9a09g087-wdtrenesas,r9a09g077-wdt L()Q { pclk#okayg<watchdog@80082c00,renesas,r9a09g087-wdtrenesas,r9a09g077-wdt L,)Q  { pclk #disabledwatchdog@80083000,renesas,r9a09g087-wdtrenesas,r9a09g077-wdt L0)Q { pclk #disabledwatchdog@80083400,renesas,r9a09g087-wdtrenesas,r9a09g077-wdt L4)Q { pclk #disabledthermal@80086000,renesas,r9a09g087-tsurenesas,r9a09g077-tsuL` adiadcmpi {3s= i2c@80088000.renesas,riic-r9a09g087renesas,riic-r9a09g077L0fghieeirxitxitei {d #okay*4defaulteeprom@50renesas,r1ex24016atmel,24c16LPi2c@80088400.renesas,riic-r9a09g087renesas,riic-r9a09g077L0jklmeeirxitxitei {e #okay*4defaulti2c@81008000.renesas,riic-r9a09g087renesas,riic-r9a09g077L0nopqeeirxitxitei {Y  #disableddma-controller@800c0000.renesas,r9a09g087-dmacrenesas,r9a09g077-dmacL  !"#$%&'()*+,-./Fch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 { dma-controller@800c1000.renesas,r9a09g087-dmacrenesas,r9a09g077-dmacL 0123456789:;<=>?Fch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 { dma-controller@800c2000.renesas,r9a09g087-dmacrenesas,r9a09g077-dmacL @ABCDEFGHIJKLMNOFch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 { ethernet@80100000@renesas,r9a09g087-gbethrenesas,r9a09g077-gbethsnps,dwmac-5.20Lmacirqeth_wake_irqeth_lpirx-queue-0rx-queue-1rx-queue-2rx-queue-3rx-queue-4rx-queue-5rx-queue-6rx-queue-7tx-queue-0tx-queue-1tx-queue-2tx-queue-3tx-queue-4tx-queue-5tx-queue-6tx-queue-7${  stmmacethpclktxstmmacethahb   -<W g z  #disabledmdiosnps,dwmac-mdio rx-queues-config= queue0queue1queue2queue3queue4queue5 queue6@queue7tx-queues-config= queue0queue1queue2queue3queue4queue5queue6queue7ethernet@92000000@renesas,r9a09g087-gbethrenesas,r9a09g077-gbethsnps,dwmac-5.20L     macirqeth_wake_irqeth_lpirx-queue-0rx-queue-1rx-queue-2rx-queue-3rx-queue-4rx-queue-5rx-queue-6rx-queue-7tx-queue-0tx-queue-1tx-queue-2tx-queue-3tx-queue-4tx-queue-5tx-queue-6tx-queue-7${ stmmacethpclktxstmmacethahb   -<W g z #okay*4default $rgmii-id-mdiosnps,dwmac-mdio ethernet-phy@34ethernet-phy-id0007.0772ethernet-phy-ieee802.3-c22L8 K^n: =rx-queues-config= queue0queue1queue2queue3queue4queue5 queue6@queue7tx-queues-config= queue0queue1queue2queue3queue4queue5queue6queue7ethernet@92010000@renesas,r9a09g087-gbethrenesas,r9a09g077-gbethsnps,dwmac-5.20L#$%&'()* !"macirqeth_wake_irqeth_lpirx-queue-0rx-queue-1rx-queue-2rx-queue-3rx-queue-4rx-queue-5rx-queue-6rx-queue-7tx-queue-0tx-queue-1tx-queue-2tx-queue-3tx-queue-4tx-queue-5tx-queue-6tx-queue-7${ stmmacethpclktxstmmacethahb   -<W gz#okay*4default $rgmii-id-mdiosnps,dwmac-mdio ethernet-phy@24ethernet-phy-id0007.0772ethernet-phy-ieee802.3-c22L8 K^n: =rx-queues-config=queue0queue1queue2queue3queue4queue5 queue6@queue7tx-queues-config=queue0queue1queue2queue3queue4queue5queue6queue7ethss@80110000.renesas,r9a09g087-miicrenesas,r9a09g077-miicL0{  mii_refrgmii_refrmii_refhclk rstcrst#okay mii-conv@0L#okaymii-conv@1L#okaymii-conv@2L#okay=mii-conv@3L#okay=clock-controller@80280000renesas,r9a09g087-cpg-mssr L(({ extal=interrupt-controller@802a0000,renesas,r9a09g087-icurenesas,r9a09g077-icu L**      `intcpu0intcpu1intcpu2intcpu3intcpu4intcpu5intcpu6intcpu7intcpu8intcpu9intcpu10intcpu11intcpu12intcpu13intcpu14intcpu15irq0irq1irq2irq3irq4irq5irq6irq7irq8irq9irq10irq11irq12irq13irq14irq15seica55-err0ca55-err1cr520-err0cr520-err1cr521-err0cr521-err1peri-err0peri-err1dsmif-err0dsmif-err1encif-err0encif-err1 { =pinctrl@802c0000renesas,r9a09g087-pinctrl0L,,+ nsrsrssrn {  '&=sci0-pins3=sdhi0-emmc-iovs-hog:C OSD0_IOVSsd0-emmc-group=data-pins 3)b)c)d)e)f)g)h)ictrl-pins 3)`)a)jsd0-sd-groupdata-pins3)b)c)d)ectrl-pins 3)`)a)sdhi1-pwen-hog:EC OSD1_PWENsd1-group=data-pins3))))ctrl-pins 3)))can1-pins3`agmac2-pinsL3=gmac1-pinsL3    =i2c0-pins3vw=i2c1-pins3=usb-pins3=interrupt-controller@83000000 arm,gic-v3 L   =adc@90014000,renesas,r9a09g087-adcrenesas,r9a09g077-adcL@TST)adigbadigcadicmpaicmpbiwcmpmwcmpum{  adclkpclk Y#okaychannel@0Lchannel@1Lchannel@2Lchannel@3Ladc@90014400,renesas,r9a09g087-adcrenesas,r9a09g077-adcLDTUV)adigbadigcadicmpaicmpbiwcmpmwcmpum{  adclkpclk Y#okaychannel@0Lchannel@1Lchannel@2Lchannel@3Ladc@80008000,renesas,r9a09g087-adcrenesas,r9a09g077-adcLTWX)adigbadigcadicmpaicmpbiwcmpmwcmpum{  adclkpclk Y#okaychannel@0Lchannel@1Lchannel@2Lchannel@3Lchannel@4Lchannel@5Lchannel@6Lchannel@7Lchannel@8Lchannel@9L channel@aL channel@bL channel@cL channel@dL channel@eLusb@92040000 generic-ohciL J {kpusb#okayzotg=usb@92040100 generic-ehciL J {kpusb#okayzotgusb-phy@920402006renesas,usb2-phy-r9a09g087renesas,usb2-phy-r9a09g077L J{#okay*4default=usb@920410000renesas,usbhs-r9a09g087renesas,usbhs-r9a09g077L$KLM {kpusb#okayzotgmmc@92080000.renesas,sdhi-r9a09g087renesas,sdhi-r9a09g057L{  aclkclkh#okay*4defaultstate_uhsvqmmc-regulator SDHI0-VQMMCw@2Z #disabledmmc@92090000.renesas,sdhi-r9a09g087renesas,sdhi-r9a09g057L {  aclkclkh#okay*4defaultstate_uhs7Dvqmmc-regulator SDHI1-VQMMCw@2Z #disabledstmmac-axi-configR^n~= thermal-zonescpu-thermal cooling-mapsmap0!0"#$%tripstrip-pointsWpassive=!sensor-crit Wcriticaltimerarm,armv8-timer<    %sec-physphysvirthyp-physhyp-virtaliases/soc/ethernet@92000000/soc/ethernet@92010000/soc/i2c@80088000 /soc/i2c@80088400/soc/mmc@92080000/soc/mmc@92090000/soc/serial@80005000chosen$serial0:115200n8regulator-1p8vregulator-fixed fixed-1.8Vw@w@0B=regulator-3p3vregulator-fixed fixed-3.3V2Z2Z0B=regulator-vccq-sdhi1regulator-gpio SDHI1 VccQw@2Z FV\2Zw@=keys gpio-keyskey-1 cwSW2key-2 cwSW3key-3 cwSW4leds gpio-ledsled-3 debugled-4 debugled-5 debugled-6 debugled-7 sdebugled-10 debugled-11 debug compatible#address-cells#size-cellsinterrupt-parentmodelphandleopp-hzregdevice_typenext-level-cacheenable-methodclocks#cooling-cellsoperating-points-v2cache-unifiedcache-sizecache-level#clock-cellsclock-frequencyinterruptsrangesinterrupt-namesclock-namespower-domainsstatuspinctrl-0pinctrl-namesassigned-clocksassigned-clock-ratestimeout-sec#thermal-sensor-cellspagesize#dma-cellsdma-channelsrenesas,icuresetsreset-namessnps,multicast-filter-binssnps,perfect-filter-entriesrx-fifo-depthtx-fifo-depthsnps,fixed-burstsnps,no-pbl-x8snps,force_thresh_dma_modesnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,prioritysnps,map-to-dma-channelsnps,tx-queues-to-usephy-handlephy-modepcs-handlevsc8531,led-0-modevsc8531,led-1-modereset-assert-usreset-deassert-usreset-gpiosrenesas,miic-switch-portinrenesas,miic-input#reset-cells#power-domain-cells#interrupt-cellsinterrupt-controllerreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxgpio-hogoutput-highline-name#io-channel-cellsphysphy-namesdr_modecompanion#phy-cellspinctrl-1vmmc-supplyvqmmc-supplybus-widthnon-removablemmc-hs200-1_8vfixed-emmc-driver-typeregulator-nameregulator-min-microvoltregulator-max-microvoltsd-uhs-sdr50sd-uhs-sdr104snps,lpi_ensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenpolling-delaypolling-delay-passivethermal-sensorstripcooling-devicecontributiontemperaturehysteresisethernet3ethernet2i2c0i2c1mmc0mmc1serial0stdout-pathregulator-boot-onregulator-always-ongpios-statesinterrupts-extendedlinux,codelabelwakeup-sourcedebounce-intervalcolorfunctionfunction-enumerator