{8t(t)friendlyarm,nanopi-zero2rockchip,rk3528 +7FriendlyElec NanoPi Zero2aliases=/pinctrl/gpio@ff610000C/pinctrl/gpio@ffaf0000I/pinctrl/gpio@ffb00000O/pinctrl/gpio@ffb10000U/pinctrl/gpio@ffb20000[/soc/ethernet@ffbe0000e/soc/i2c@ffa58000j/soc/mmc@ffbf0000o/soc/mmc@ffc30000t/soc/serial@ff9f0000cpus+cpu-mapcluster0core0|core1|core2|core3|cpu@0arm,cortex-a53cpupscicpu@1arm,cortex-a53cpupscicpu@2arm,cortex-a53cpupscicpu@3arm,cortex-a53cpupscifirmwarescmi arm,scmi-smĉ +protocol@14opp-table-cpuoperating-points-v2opp-1200000000G Y Y @opp-1416000000Tfr HH @opp-1608000000_"  @opp-1800000000kI ԼԼ @opp-2016000000x)  @opp-table-gpuoperating-points-v2.opp-300000000 Y YB@opp-500000000e Y YB@opp-600000000#F Y YB@opp-700000000)' B@opp-800000000/ ~~B@pinctrlrockchip,rk3528-pinctrl' +4 gpio@ff610000rockchip,gpio-banka r s ;GFVb ngpio@ffaf0000rockchip,gpio-bank  ;IFVb n gpio@ffb00000rockchip,gpio-bank $ % ;KFVb @ n gpio@ffb10000rockchip,gpio-bank  ;LFVb ` n gpio@ffb20000rockchip,gpio-bank  ;NFVb n 3pcfg-pull-uppcfg-pull-nonepcfg-pull-none-drv-level-0pcfg-pull-none-drv-level-2pcfg-pull-up-drv-level-2pcfg-pull-none-smtarmclkemmcemmc-bus8Nemmc-clkOemmc-cmdPemmc-strbQethfephyfephym0-led-link@fephym0-led-spdAfspigpuhdmihsmi2c0i2c1i2c1m0-xfer 2i2c2i2c2m1-xfer 5i2c3i2c4i2c4-xfer 6i2c5i2c6i2c7i2c7-xfer 7i2s0i2s1jtagpciepdmpmupwm0pwm1pwm1m0-pins8pwm2pwm2m0-pins9pwm3pwm4pwm5pwm6pwm7pwrrefrgmiirgmii-miim Hrgmii-rx-bus20Jrgmii-tx-bus20Irgmii-rgmii-clk Krgmii-rgmii-bus@ Lscrsdio0sdio0-bus4@Rsdio0-clkSsdio0-cmdTsdio1sdio1-bus4@ Usdio1-clkVsdio1-cmdWsdmmcsdmmc-bus4@Xsdmmc-clkYsdmmc-cmdZsdmmc-det[sdmmc-vol-ctrl-hesdmmc-pwren-lcspdifspi0spi1tsi0tsi1uart0uart0m0-xfer 1uart1uart2uart3uart4uart5uart6uart7ethernetgmac1-rstn-lMledsled1 `led-sysartcrtc-int-l4usbusb20-host1-pwren dpsciarm,psci-1.0arm,psci-0.2smcreserved-memory+4shmem@10f000arm,scmi-shmem timerarm,armv8-timer0;   clock-xin24m fixed-clockn6xin24mclock-gmac50m fixed-clockgmac0soc simple-bus4D+pcie@fe000000*rockchip,rk3528-pcierockchip,rk3568-pcie0@Odbiapbconfig"( $,aclk_mstaclk_slvaclk_dbipclkauxpciH;8syspmcmsglegacyerrmsiH`[iz pcie-phy T4 @ d b pwrpipe+ disabledlegacy-interrupt-controllern  ;interrupt-controller@fed01000 arm,gic-400@ @ `  ; nqos@ff200000rockchip,rk3528-qossyscon qos@ff200080rockchip,rk3528-qossyscon qos@ff200100rockchip,rk3528-qossyscon  qos@ff200200rockchip,rk3528-qossyscon  qos@ff200280rockchip,rk3528-qossyscon  qos@ff200300rockchip,rk3528-qossyscon  qos@ff200380rockchip,rk3528-qossyscon  qos@ff210000rockchip,rk3528-qossyscon! qos@ff210080rockchip,rk3528-qossyscon! qos@ff220000rockchip,rk3528-qossyscon" qos@ff220080rockchip,rk3528-qossyscon" qos@ff240000rockchip,rk3528-qossyscon$ qos@ff250000rockchip,rk3528-qossyscon% qos@ff260000rockchip,rk3528-qossyscon& qos@ff270000rockchip,rk3528-qossyscon' qos@ff270080rockchip,rk3528-qossyscon' qos@ff270100rockchip,rk3528-qossyscon' qos@ff270200rockchip,rk3528-qossyscon' qos@ff270280rockchip,rk3528-qossyscon'  qos@ff270300rockchip,rk3528-qossyscon' !qos@ff270380rockchip,rk3528-qossyscon' "qos@ff270480rockchip,rk3528-qossyscon' #qos@ff270500rockchip,rk3528-qossyscon' $qos@ff280000rockchip,rk3528-qossyscon( %qos@ff280080rockchip,rk3528-qossyscon( &qos@ff280100rockchip,rk3528-qossyscon( 'qos@ff280180rockchip,rk3528-qossyscon( (qos@ff280200rockchip,rk3528-qossyscon( )qos@ff280280rockchip,rk3528-qossyscon( *qos@ff280300rockchip,rk3528-qossyscon( +qos@ff280380rockchip,rk3528-qossyscon( ,qos@ff280400rockchip,rk3528-qossyscon( -syscon@ff340000rockchip,rk3528-vpu-grfsyscon4Bsyscon@ff348000$rockchip,rk3528-pipe-phy-grfsyscon4^syscon@ff360000rockchip,rk3528-vo-grfsyscon6<clock-controller@ff4a0000rockchip,rk3528-cruJ t          z y  LLFq;;]Q沀eр Cׄ#FsY@e ,xin24mgmac0 syscon@ff540000rockchip,rk3528-ioc-grfsysconT power-management@ff600000&rockchip,rk3528-pmusysconsimple-mfd` power-controller!rockchip,rk3528-power-controller+ power-domain@4 power-domain@5 disabledpower-domain@6power-domain@7$ !"#$power-domain@8$%&'()*+,-gpu@ff700000"rockchip,rk3528-maliarm,mali-450p @  ,buscoreT;XYV\]Z["8gpgpmmupppp0ppmmu0pp1ppmmu1.  wokay /spi@ff9c0000(rockchip,rk3528-spirockchip,rk3066-spi ,spiclkapb_pclk ;00txrx + disabledspi@ff9d0000(rockchip,rk3528-spirockchip,rk3066-spi ,spiclkapb_pclk ;00txrx + disabledserial@ff9f0000&rockchip,rk3528-uartsnps,dw-apb-uart  k,baudclkapb_pclk ;(0 0$1okay;defaultI1serial@ff9f8000&rockchip,rk3528-uartsnps,dw-apb-uart  ,baudclkapb_pclk ;)0 0  $1 disabledserial@ffa00000&rockchip,rk3528-uartsnps,dw-apb-uart  ,baudclkapb_pclk ;*0 0  $1 disabledserial@ffa08000&rockchip,rk3528-uartsnps,dw-apb-uart  ,baudclkapb_pclk ;+00 $1 disabledserial@ffa10000&rockchip,rk3528-uartsnps,dw-apb-uart  1,baudclkapb_pclk ;,00 $1 disabledserial@ffa18000&rockchip,rk3528-uartsnps,dw-apb-uart " ,baudclkapb_pclk ;-00 $1 disabledserial@ffa20000&rockchip,rk3528-uartsnps,dw-apb-uart % ,baudclkapb_pclk ;.00 $1 disabledserial@ffa28000&rockchip,rk3528-uartsnps,dw-apb-uart ( ,baudclkapb_pclk ;/00 $1 disabledi2c@ffa50000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;= + disabledi2c@ffa58000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;> +okay;defaultI2rtc@51haoyu,hym8563Q 3;;defaultI4Si2c@ffa60000(rockchip,rk3528-i2crockchip,rk3399-i2c j i ,i2cpclk ;?;defaultI5+ disabledi2c@ffa68000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;@ + disabledi2c@ffa70000(rockchip,rk3528-i2crockchip,rk3399-i2c 3 2 ,i2cpclk ;A;defaultI6 + disabledi2c@ffa78000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;B + disabledi2c@ffa80000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;C + disabledi2c@ffa88000(rockchip,rk3528-i2crockchip,rk3399-i2c 5 4 ,i2cpclk ;D;defaultI7 + disabledpwm@ffa90000(rockchip,rk3528-pwmrockchip,rk3328-pwm o n ,pwmpclka disabledpwm@ffa90010(rockchip,rk3528-pwmrockchip,rk3328-pwm o n ,pwmpclkaokay;defaultI8fpwm@ffa90020(rockchip,rk3528-pwmrockchip,rk3328-pwm  o n ,pwmpclkaokay;defaultI9gpwm@ffa90030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 o n ,pwmpclka disabledpwm@ffa98000(rockchip,rk3528-pwmrockchip,rk3328-pwm r q ,pwmpclka disabledpwm@ffa98010(rockchip,rk3528-pwmrockchip,rk3328-pwm r q ,pwmpclka disabledpwm@ffa98020(rockchip,rk3528-pwmrockchip,rk3328-pwm  r q ,pwmpclka disabledpwm@ffa98030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 r q ,pwmpclka disabledadc@ffae0000rockchip,rk3528-saradc ,saradcapb_pclk ;  o saradc-apblokay~:_ethernet@ffbd0000&rockchip,rk3528-gmacsnps,dwmac-4.20a0      >,stmmacethclk_mac_refmac_clk_rxmac_clk_txpclk_macaclk_mac;qt8macirqeth_wake_irq;rmii   stmmaceth'<=>? disabledmdiosnps,dwmac-mdio+ethernet-phy@2ethernet-phy-ieee802.3-c22 ";defaultI@A ;stmmac-axi-config =rx-queues-config*>queue0tx-queues-config@?queue0ethernet@ffbe0000&rockchip,rk3528-gmacsnps,dwmac-4.20a (,stmmacethclk_mac_refpclk_macaclk_mac;y|8macirqeth_wake_irq  a stmmaceth'BCDEokayVoutputF rgmii-idcG;defaultIHIJKLmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22;defaultIMnN ~ 3Fstmmac-axi-config Crx-queues-config*Dqueue0tx-queues-config@Equeue0mmc@ffbf00000rockchip,rk3528-dwcmshcrockchip,rk3588-dwcmshc   n6 ( ,corebusaxiblocktimer ; ;defaultINOPQ ( A B C D EcorebusaxiblocktimerokayG:mmc@ffc100000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  ,biuciuciu-driveciu-sample  ; ;default IRST  greset disabledmmc@ffc200000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  ,biuciuciu-driveciu-sample  ; ;default IUVW  hreset disabledmmc@ffc300000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@ ( '  ,biuciuciu-driveciu-sample  ;р;defaultIXYZ[  resetZokay3DO\]dma-controller@ffd60000arm,pl330arm,primecell@ ^ ,apb_pclkl;]h0phy@ffdc0000rockchip,rk3528-naneng-combphy { {  ,refapbpipe  c ephyapbB^ disabledchosenserial0:1500000n8adc-keys-0 adc-keys_buttonsw@dbutton-maskromMASK adc-keys-1 adc-keys_buttonsw@dbutton-recovery RECOVERY hleds gpio-leds;defaultI`aled-0.4on Bheartbeat 3 Kheartbeatled-1.4onBstatus 3  Kdefault-onregulator-0v6-vcc-ddrregulator-fixed avcc0v6_ddrp ' 'bregulator-0v9-vddregulator-fixedavdd_0v9p  bregulator-1v1-vcc-ddrregulator-fixedavcc_ddrpbregulator-1v8-vccregulator-fixedavcc_1v8pw@w@G:regulator-3v3-vccregulator-fixedavcc_3v3p2Z2ZbGregulator-3v3-vcc-sdregulator-fixed 3;defaultIc avcc3v3_sd2Z2ZG\regulator-5v0-vcc-sysregulator-fixed avcc5v0_syspLK@LK@bregulator-5v0-usb2-hostregulator-fixed 3 ;defaultId ausb2_host_5vLK@LK@bregulator-vccio-sdregulator-gpio 3;defaultIe avccio_sdw@2Zw@2Zb]regulator-vdd-armpwm-regulatorfbavdd_armp bShregulator-vdd-logicpwm-regulatorgb avdd_logicp Y/ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4ethernet0i2c1mmc0mmc1serial0cpuregdevice_typeenable-methodclocksoperating-points-v2cpu-supplyphandlearm,smc-idshmem#clock-cellsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,grfrangesinterruptsgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellspower-domainsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsno-mapclock-frequencyclock-output-namesreg-namesbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-lanesphysphy-namesresetsreset-namesstatusassigned-clocksassigned-clock-rates#reset-cells#power-domain-cellspm_qosmali-supplydmasdma-namesreg-io-widthreg-shiftpinctrl-namespinctrl-0wakeup-source#pwm-cells#io-channel-cellsvref-supplyphy-handlephy-modesnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-is-integratedsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useclock_in_outphy-supplyreset-assert-usreset-deassert-usreset-gpiosmax-frequencybus-widthcap-mmc-highspeedmmc-hs200-1_8vno-sdno-sdionon-removablevmmc-supplyvqmmc-supplyfifo-depthrockchip,default-sample-phasecap-sd-highspeeddisable-wpsd-uhs-sdr104#dma-cellsarm,pl330-periph-burst#phy-cellsrockchip,pipe-grfrockchip,pipe-phy-grfstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolordefault-statefunctionlinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highstatespwmspwm-supplyregulator-settling-time-up-us