zT8s (4rradxa,e20crockchip,rk3528 + 7Radxa E20Caliases=/pinctrl/gpio@ff610000C/pinctrl/gpio@ffaf0000I/pinctrl/gpio@ffb00000O/pinctrl/gpio@ffb10000U/pinctrl/gpio@ffb20000[/soc/ethernet@ffbe0000e/soc/i2c@ffa58000j/soc/mmc@ffbf0000o/soc/mmc@ffc30000t/soc/serial@ff9f0000cpus+cpu-mapcluster0core0|core1|core2|core3|cpu@0arm,cortex-a53cpupscicpu@1arm,cortex-a53cpupscicpu@2arm,cortex-a53cpupscicpu@3arm,cortex-a53cpupscifirmwarescmi arm,scmi-smĉ +protocol@14opp-table-cpuoperating-points-v2opp-1200000000G Y Y @opp-1416000000Tfr HH @opp-1608000000_"  @opp-1800000000kI ԼԼ @opp-2016000000x)  @opp-table-gpuoperating-points-v21opp-300000000 Y YB@opp-500000000e Y YB@opp-600000000#F Y YB@opp-700000000)' B@opp-800000000/ ~~B@pinctrlrockchip,rk3528-pinctrl' +4 gpio@ff610000rockchip,gpio-banka r s ;GFVb nagpio@ffaf0000rockchip,gpio-bank  ;IFVb n gpio@ffb00000rockchip,gpio-bank $ % ;KFVb @ n gpio@ffb10000rockchip,gpio-bank  ;LFVb ` n gpio@ffb20000rockchip,gpio-bank  ;NFVb n Npcfg-pull-uppcfg-pull-nonepcfg-pull-none-drv-level-0pcfg-pull-none-drv-level-2pcfg-pull-up-drv-level-2pcfg-pull-none-smtarmclkemmcemmc-bus8Oemmc-clkPemmc-cmdQemmc-strbRethfephyfephym0-led-linkAfephym0-led-spdBfspigpuhdmihsmi2c0i2c1i2c1m0-xfer 5i2c2i2c2m1-xfer 6i2c3i2c4i2c4-xfer 7i2c5i2c6i2c7i2c7-xfer 8i2s0i2s1jtagpciepciem1-pins0pdmpmupwm0pwm1pwm1m0-pins9pwm2pwm2m0-pins:pwm3pwm4pwm5pwm6pwm7pwrrefrgmiirgmii-miim Hrgmii-rx-bus20Jrgmii-tx-bus20Irgmii-rgmii-clk Krgmii-rgmii-bus@ Lscrsdio0sdio0-bus4@Ssdio0-clkTsdio0-cmdUsdio1sdio1-bus4@ Vsdio1-clkWsdio1-cmdXsdmmcsdmmc-bus4@Ysdmmc-clkZsdmmc-cmd[sdmmc-det\sdmmc-vol-ctrl-hfspdifspi0spi1tsi0tsi1uart0uart0m0-xfer 4uart1uart2uart3uart4uart5uart6uart7ethernetgmac1-rstn-lMgpio-keysuser-key`ledslan-led-g bsys-led-gcwan-led-gdpsciarm,psci-1.0arm,psci-0.2smcreserved-memory+4shmem@10f000arm,scmi-shmem timerarm,armv8-timer0;   clock-xin24m fixed-clockn6xin24mclock-gmac50m fixed-clockgmac0soc simple-bus4D+pcie@fe000000*rockchip,rk3528-pcierockchip,rk3568-pcie0@Odbiapbconfig"( $,aclk_mstaclk_slvaclk_dbipclkauxpciH;8syspmcmsglegacyerrmsiH`[iz pcie-phy T4 @ d b pwrpipe+okaydefault legacy-interrupt-controllern  ;interrupt-controller@fed01000 arm,gic-400@ @ `  ; nqos@ff200000rockchip,rk3528-qossyscon qos@ff200080rockchip,rk3528-qossyscon qos@ff200100rockchip,rk3528-qossyscon  qos@ff200200rockchip,rk3528-qossyscon  qos@ff200280rockchip,rk3528-qossyscon  qos@ff200300rockchip,rk3528-qossyscon  qos@ff200380rockchip,rk3528-qossyscon  qos@ff210000rockchip,rk3528-qossyscon! qos@ff210080rockchip,rk3528-qossyscon! qos@ff220000rockchip,rk3528-qossyscon" qos@ff220080rockchip,rk3528-qossyscon" qos@ff240000rockchip,rk3528-qossyscon$ qos@ff250000rockchip,rk3528-qossyscon% qos@ff260000rockchip,rk3528-qossyscon& qos@ff270000rockchip,rk3528-qossyscon' qos@ff270080rockchip,rk3528-qossyscon'  qos@ff270100rockchip,rk3528-qossyscon' !qos@ff270200rockchip,rk3528-qossyscon' "qos@ff270280rockchip,rk3528-qossyscon' #qos@ff270300rockchip,rk3528-qossyscon' $qos@ff270380rockchip,rk3528-qossyscon' %qos@ff270480rockchip,rk3528-qossyscon' &qos@ff270500rockchip,rk3528-qossyscon' 'qos@ff280000rockchip,rk3528-qossyscon( (qos@ff280080rockchip,rk3528-qossyscon( )qos@ff280100rockchip,rk3528-qossyscon( *qos@ff280180rockchip,rk3528-qossyscon( +qos@ff280200rockchip,rk3528-qossyscon( ,qos@ff280280rockchip,rk3528-qossyscon( -qos@ff280300rockchip,rk3528-qossyscon( .qos@ff280380rockchip,rk3528-qossyscon( /qos@ff280400rockchip,rk3528-qossyscon( 0syscon@ff340000rockchip,rk3528-vpu-grfsyscon4Csyscon@ff348000$rockchip,rk3528-pipe-phy-grfsyscon4^syscon@ff360000rockchip,rk3528-vo-grfsyscon6=clock-controller@ff4a0000rockchip,rk3528-cruJ t          z y  LLFq;;]Q沀eр Cׄ#FsY@e ,xin24mgmac0 syscon@ff540000rockchip,rk3528-ioc-grfsysconT power-management@ff600000&rockchip,rk3528-pmusysconsimple-mfd` power-controller!rockchip,rk3528-power-controller"+ power-domain@4 6"power-domain@56" disabledpower-domain@66"power-domain@7$6 !"#$%&'"power-domain@8$6()*+,-./0"gpu@ff700000"rockchip,rk3528-maliarm,mali-450p @  ,buscoreT;XYV\]Z["8gpgpmmupppp0ppmmu0pp1ppmmu11  wokay=2spi@ff9c0000(rockchip,rk3528-spirockchip,rk3066-spi ,spiclkapb_pclk ;I33Ntxrx + disabledspi@ff9d0000(rockchip,rk3528-spirockchip,rk3066-spi ,spiclkapb_pclk ;I33Ntxrx + disabledserial@ff9f0000&rockchip,rk3528-uartsnps,dw-apb-uart  k,baudclkapb_pclk ;(I3 3Xeokaydefault4serial@ff9f8000&rockchip,rk3528-uartsnps,dw-apb-uart  ,baudclkapb_pclk ;)I3 3  Xe disabledserial@ffa00000&rockchip,rk3528-uartsnps,dw-apb-uart  ,baudclkapb_pclk ;*I3 3  Xe disabledserial@ffa08000&rockchip,rk3528-uartsnps,dw-apb-uart  ,baudclkapb_pclk ;+I33 Xe disabledserial@ffa10000&rockchip,rk3528-uartsnps,dw-apb-uart  1,baudclkapb_pclk ;,I33 Xe disabledserial@ffa18000&rockchip,rk3528-uartsnps,dw-apb-uart " ,baudclkapb_pclk ;-I33 Xe disabledserial@ffa20000&rockchip,rk3528-uartsnps,dw-apb-uart % ,baudclkapb_pclk ;.I33 Xe disabledserial@ffa28000&rockchip,rk3528-uartsnps,dw-apb-uart ( ,baudclkapb_pclk ;/I33 Xe disabledi2c@ffa50000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;= + disabledi2c@ffa58000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;> +okaydefault5eeprom@50belling,bl24c16aatmel,24c16Poxi2c@ffa60000(rockchip,rk3528-i2crockchip,rk3399-i2c j i ,i2cpclk ;?default6+ disabledi2c@ffa68000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;@ + disabledi2c@ffa70000(rockchip,rk3528-i2crockchip,rk3399-i2c 3 2 ,i2cpclk ;Adefault7 + disabledi2c@ffa78000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;B + disabledi2c@ffa80000(rockchip,rk3528-i2crockchip,rk3399-i2c  ,i2cpclk ;C + disabledi2c@ffa88000(rockchip,rk3528-i2crockchip,rk3399-i2c 5 4 ,i2cpclk ;Ddefault8 + disabledpwm@ffa90000(rockchip,rk3528-pwmrockchip,rk3328-pwm o n ,pwmpclk disabledpwm@ffa90010(rockchip,rk3528-pwmrockchip,rk3328-pwm o n ,pwmpclkokaydefault9gpwm@ffa90020(rockchip,rk3528-pwmrockchip,rk3328-pwm  o n ,pwmpclkokaydefault:hpwm@ffa90030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 o n ,pwmpclk disabledpwm@ffa98000(rockchip,rk3528-pwmrockchip,rk3328-pwm r q ,pwmpclk disabledpwm@ffa98010(rockchip,rk3528-pwmrockchip,rk3328-pwm r q ,pwmpclk disabledpwm@ffa98020(rockchip,rk3528-pwmrockchip,rk3328-pwm  r q ,pwmpclk disabledpwm@ffa98030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 r q ,pwmpclk disabledadc@ffae0000rockchip,rk3528-saradc ,saradcapb_pclk ;  o saradc-apbokay;_ethernet@ffbd0000&rockchip,rk3528-gmacsnps,dwmac-4.20a0      >,stmmacethclk_mac_refmac_clk_rxmac_clk_txpclk_macaclk_mac;qt8macirqeth_wake_irq<rmii   stmmaceth'=>?@ disabledmdiosnps,dwmac-mdio+ethernet-phy@2ethernet-phy-ieee802.3-c22 "defaultAB <stmmac-axi-config,6F>rx-queues-configV?queue0tx-queues-configl@queue0ethernet@ffbe0000&rockchip,rk3528-gmacsnps,dwmac-4.20a (,stmmacethclk_mac_refpclk_macaclk_mac;y|8macirqeth_wake_irq  a stmmaceth'CDEFokayoutputG rgmii-iddefaultHIJKLmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22defaultMN  NGstmmac-axi-config,6FDrx-queues-configVEqueue0tx-queues-configlFqueue0mmc@ffbf00000rockchip,rk3528-dwcmshcrockchip,rk3588-dwcmshc   n6 ( ,corebusaxiblocktimer ; defaultOPQR ( A B C D Ecorebusaxiblocktimerokay;mmc@ffc100000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  ,biuciuciu-driveciu-sample* ; default STU  greset disabledmmc@ffc200000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  ,biuciuciu-driveciu-sample* ; default VWX  hreset disabledmmc@ffc300000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@ ( '  ,biuciuciu-driveciu-sample* ;рdefaultYZ[\  reset5ZokaySdo]dma-controller@ffd60000arm,pl330arm,primecell@ ^ ,apb_pclkl;}3phy@ffdc0000rockchip,rk3528-naneng-combphy { {  ,refapbpipe  c ephyapbC^okaychosenserial0:1500000n8adc-keys adc-keys_buttonsw@dbutton-maskrom#MASKROM)4gpio-keys gpio-keysdefault`button-user a#USER)Nleds gpio-ledsdefault bcdled-lan\boffplan N ynetdevled-sys\bon pheartbeat N yheartbeatled-wan\boffpwan Nynetdevregulator-0v9-vddregulator-fixedvdd_0v9  eregulator-1v1-vcc-ddrregulator-fixedvcc_ddreregulator-1v8-vccregulator-fixedvcc_1v8w@w@;regulator-3v3-vccregulator-fixedvcc_3v32Z2Zeregulator-5v0-vcc-sysregulator-fixed vcc5v0_sysLK@LK@eregulator-vccio-sdregulator-gpio Ndefaultf vccio_sdw@2Zw@2Ze]regulator-vdd-armpwm-regulatorg evdd_arm bShregulator-vdd-logicpwm-regulatorh e vdd_logic Y2 compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4ethernet0i2c1mmc0mmc1serial0cpuregdevice_typeenable-methodclocksoperating-points-v2cpu-supplyphandlearm,smc-idshmem#clock-cellsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,grfrangesinterruptsgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellspower-domainsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsno-mapclock-frequencyclock-output-namesreg-namesbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-lanesphysphy-namesresetsreset-namesstatuspinctrl-namespinctrl-0reset-gpiosvpcie3v3-supplyassigned-clocksassigned-clock-rates#reset-cells#power-domain-cellspm_qosmali-supplydmasdma-namesreg-io-widthreg-shiftpagesizeread-onlyvcc-supply#pwm-cells#io-channel-cellsvref-supplyphy-handlephy-modesnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-is-integratedsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useclock_in_outphy-supplyreset-assert-usreset-deassert-usmax-frequencybus-widthcap-mmc-highspeedmmc-hs200-1_8vno-sdno-sdionon-removablevmmc-supplyvqmmc-supplyfifo-depthrockchip,default-sample-phasecap-sd-highspeeddisable-wpsd-uhs-sdr104#dma-cellsarm,pl330-periph-burst#phy-cellsrockchip,pipe-grfrockchip,pipe-phy-grfstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltwakeup-sourcecolordefault-statefunctionlinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplystatespwmspwm-supplyregulator-settling-time-up-us