8H(  ,hinlink,h68krockchip,rk3568 7HINLINK H68Kaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/mmc@fe2b0000/ethernet@fe2a0000/ethernet@fe010000cpus cpu@0cpu,arm,cortex-a55 !psci/<@N[h@z cpu@100cpu,arm,cortex-a55 !psci/<@N[h@z cpu@200cpu,arm,cortex-a55 !psci/<@N[h@z cpu@300cpu,arm,cortex-a55 !psci/<@N[h@z l3-cache,cache1>@Pdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc߂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s-Gokaysimple-audio-card,codecNsimple-audio-card,cpuN pmu,arm,cortex-a55-pmu0Xc psci ,arm,psci-1.0(smcreserved-memory vshmem@10f000,arm,scmi-shmem}timer,arm,armv8-timer0X   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob X_ sata-phy Gdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob X` sata-phy Gdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ X ref_clksuspend_clkbus_clkotg utmi_wide") Gdisabled usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ X ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide")Gokayinterrupt-controller@fd400000 ,arm,gic-v3 @F X BWhAr(}v msi-controller@fd440000,arm,gic-v3-itsD}busb@fd800000 ,generic-ehci X usbGokayusb@fd840000 ,generic-ohci X usbGokayusb@fd880000 ,generic-ehci X usbGokayusb@fd8c0000 ,generic-ohci X usbGokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd`io-domains&,rockchip,rk3568-pmu-io-voltage-domainGokay syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru%clock-controller@fdd20000,rockchip,rk3568-cru xin24m%2 BG Wni2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c X. - i2cpclk default Gokayregulator@1c ,tcs,tcs4525{vdd_cpu 50!regulator-state-mempmic@20,rockchip,rk809 "Xdefault#6N\$h$t$$$$$$$regulatorsDCDC_REG1 vdd_logic pqregulator-state-memDCDC_REG2vdd_gpu pqFregulator-state-memDCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-memDCDC_REG5vcc_1v8w@w@regulator-state-memLDO_REG1vdda0v9_image  \regulator-state-memLDO_REG2 vdda_0v9  regulator-state-memLDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-memLDO_REG5 vccio_sdw@2Zregulator-state-memLDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-memLDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@]regulator-state-memSWITCH_REG1vcc_3v3regulator-state-memSWITCH_REG2vcc3v3regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Xt  ,baudclkapb_pclk%%&default% Gdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk'default/Gokaypwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk(default/ Gdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0 pwmpclk)default/ Gdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0 pwmpclk*default/ Gdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller: power-domain@7 N+:power-domain@8  N,-.:power-domain@9   N/01:power-domain@10  N234567:power-domain@11  N8:power-domain@13  N9:power-domain@14  N:;<:power-domain@15  N=>?@ABCD:gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$X()' Ujobmmugpu gpubusGokayEeFvideo-codec@fdea0400,rockchip,rk3568-vpu XUvdpu  aclkhclkqG iommu@fdea0800,rockchip,rk3568-iommu@ X aclkiface  xGrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga XZ aclkhclksclk"&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu X@  aclkhclkqH iommu@fdee0800,rockchip,rk3568-iommu@ X?  aclkiface xHvideo-capture@fdfe0000,rockchip,rk3568-vicap X2B  aclkhclkdclkiclkqI("arsthrstdrstprstirstn Gdisabledports port@0port@1iommu@fdfe0800,rockchip,rk3568-iommu X  aclkifacex GdisabledImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Xd  biuciuciu-driveciu-sampleр"reset Gdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aX Umacirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref" stmmacethnJKL Gokay2WBsY@output"M -rgmii-id6$defaultNOPQRSmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22AN Q cTMstmmac-axi-configoyJrx-queues-configKqueue0tx-queues-configLqueue0vop@fe040000 0@vopgamma-lut X( %aclkhclkdclk_vp0dclk_vp1dclk_vp2qU nGokay,rockchip,rk3568-vop2Wports port@0 endpoint@2V^port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? X  aclkifacex GokayUdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi XDpclk dphyW apb"n Gdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi XEpclk dphyX apb"n Gdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  X-( (iahbisfrcecrefdefault YZ[ nGokay\]ports port@0endpoint^Vport@1endpoint_qos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon Aqos@fe190300,rockchip,rk3568-qossyscon Bqos@fe190380,rockchip,rk3568-qossyscon Cqos@fe190400,rockchip,rk3568-qossyscon Dqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi# X `pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<XKJIHGUsyspmcmsglegacyerr( $aclk_mstaclk_slvaclk_dbipclkauxpciW'`:aaaaHYhwb pcie-phyTv @"pipe Gokaydefaultc cdelegacy-interrupt-controllerWB XHammc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Xb  biuciuciu-driveciu-sampleр"resetGokay "defaultfghijmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Xc  biuciuciu-driveciu-sampleр"reset Gdisabledspi@fe300000 ,rockchip,sfc0@ Xe xvclk_sfchclk_sfckdefault Gdisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 X2{}B n6( |zy{}corebusaxiblocktimerGokay   defaultlmnorng@fe388000,rockchip,rk3568-rng8@ po coreahb"mGokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ X42=ABFqFq ?C9mclk_txmclk_rxhclkp ,tx"PQ tx-mrx-mnGokay i2s@fe410000,rockchip,rk3568-i2s-tdmA X52EIBFqFq GK:mclk_txmclk_rxhclkpp ,rxtx"RS tx-mrx-mndefault0qrstuvwxyz{| Gdisabledi2s@fe420000,rockchip,rk3568-i2s-tdmB X62MBFq OO;mclk_txmclk_rxhclkpp ,txrx"Ttx-mndefault}~ Gdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC X7 SW<mclk_txmclk_rxhclkpp ,txrx"UV tx-mrx-mn Gdisabledpdm@fe440000,rockchip,rk3568-pdmD XL ZYpdm_clkpdm_hclkp  ,rxdefault"Xpdm-m Gdisabledspdif@fe460000,rockchip,rk3568-spdifF Xf mclkhclk _\p ,txdefault Gdisableddma-controller@fe530000,arm,pl330arm,primecellS@X  6   apb_pclk M%dma-controller@fe550000,arm,pl330arm,primecellU@X 6   apb_pclk Mpi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ X/ HG i2cpclkdefault  Gdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ X0 JI i2cpclkdefault Gokayi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ X1 LK i2cpclkdefault  Gdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] X2 NM i2cpclkdefault  Gdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ X3 PO i2cpclkdefault  Gdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` X  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia Xg RQspiclkapb_pclk%% ,txrxdefault   Gdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib Xh TSspiclkapb_pclk%% ,txrxdefault   Gdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic Xi VUspiclkapb_pclk%% ,txrxdefault   Gdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid Xj XWspiclkapb_pclk%% ,txrxdefault   Gdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Xu baudclkapb_pclk%%default% Gdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Xv # baudclkapb_pclk%%default%Gokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Xw '$baudclkapb_pclk%%default% Gdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Xx +(baudclkapb_pclk%% default% Gdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Xy /,baudclkapb_pclk% % default% Gdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Xz 30baudclkapb_pclk% % default% Gdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk X{ 74baudclkapb_pclk%%default% Gdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl X| ;8baudclkapb_pclk%%default% Gdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm X} ?<baudclkapb_pclk%%default% Gdisabledthermal-zonescpu-thermal Xd n |tripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 gpu-thermal X n |tripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq Xs2Bf@ ` tsadcapb_pclk"n sdefaultsleep  Gokay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr X] saradcapb_pclk" saradc-apb Gokay 2pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault/ Gdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault/ Gdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY pwmpclkdefault/ Gdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY pwmpclkdefault/ Gdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault/ Gdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault/ Gdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\ pwmpclkdefault/ Gdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\ pwmpclkdefault/ Gdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault/ Gdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault/ Gdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_ pwmpclkdefault/ Gdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_ pwmpclkdefault/ Gdisabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipe2"B"phy > P fGokayphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipe2%B"phy > P fGokayphy@fe870000,rockchip,rk3568-csi-dphy ypclk f"apbn Gdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclk z f apb" GdisabledWmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk { f apb" GdisabledXusb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkclk_usbphy0_480m X qGokayhost-port fGokay6otg-port f Gdisabledusb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkclk_usbphy1_480m X qGokayhost-port fGokay6otg-port fGokay6pinctrl,rockchip,rk3568-pinctrln` vgpio@fdd60000,rockchip,gpio-bank X! .    BW"gpio@fe740000,rockchip,gpio-bankt X" cd   BWTgpio@fe750000,rockchip,gpio-banku X# ef  @  BWdgpio@fe760000,rockchip,gpio-bankv X$ gh  `  BWgpio@fe770000,rockchip,gpio-bankw X% ij   BWpcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can0m0-pins  can1can1m0-pins can2can2m0-pins   cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-bus8   lemmc-clk memmc-cmd nemmc-datastrobe oeth0eth1flashfspifspi-pins` kgmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20    gmac0-rgmii-clk gmac0-rgmii-bus@ gmac1gmac1m1-miim Ngmac1m1-rx-bus20  Pgmac1m1-tx-bus20 Ogmac1m1-rgmii-clk Qgmac1m1-rgmii-bus@ Rgpuhdmitxhdmitxm0-cec [hdmitx-scl Yhdmitx-sda Zi2c0i2c0-xfer   i2c1i2c1-xfer  i2c2i2c2m1-xfer   i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrckrx ti2s1m0-lrcktx si2s1m0-sclkrx ri2s1m0-sclktx qi2s1m0-sdi0  ui2s1m0-sdi1  vi2s1m0-sdi2  wi2s1m0-sdi3 xi2s1m0-sdo0 yi2s1m0-sdo1 zi2s1m0-sdo2  {i2s1m0-sdo3  |i2s2i2s2m0-lrcktx ~i2s2m0-sclktx }i2s2m0-sdi i2s2m0-sdo i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk pdmm0-clk1 pdmm0-sdi0  pdmm0-sdi1  pdmm0-sdi2  pdmm0-sdi3 pmicpmic-int #pmupwm0pwm0m0-pins 'pwm1pwm1m0-pins (pwm2pwm2m0-pins )pwm3pwm3-pins *pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ fsdmmc0-clk gsdmmc0-cmd hsdmmc0-det isdmmc1sdmmc2spdifspdifm0-tx spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer &uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2keysfactory ledsgreen-led red-led work-led irpwm3-ir-m0 mmcsd-pwren pcielan-power-en lan-reseta lan-resetb wifi-perstn cusbusb-power-en gmacgmac0-rstn gmac1-rstn Sopp-table-0,operating-points-v2 opp-408000000 Q  P P0 @opp-600000000 #F  P P0 @opp-816000000 0,  P P0 @ &opp-1104000000 Aʹ  0 @opp-1416000000 Tfr 0 @opp-1608000000 _" 0 @opp-1800000000 kI 000 @opp-1992000000 v 000 @opp-table-1,operating-points-v2Eopp-200000000   P PB@opp-300000000   P PB@opp-400000000 ׄ  P PB@opp-600000000 #F  B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob X^ sata-phyGokaysyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon >qos@fe190100,rockchip,rk3568-qossyscon ?qos@fe190200,rockchip,rk3568-qossyscon @syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy f &'wrefclk_mrefclk_npclk"phy 2Gokay Cpcie@fe270000,rockchip,rk3568-pcie ( $aclk_mstaclk_slvaclk_dbipclkauxpci<XUsyspmcmsglegacyerrW'`:HYhwb pcie-phy0@@'Tv @@@dbiapbconfig"pipeGokaydefault celegacy-interrupt-controllerBW Xpcie@fe280000,rockchip,rk3568-pcie  /( $aclk_mstaclk_slvaclk_dbipclkauxpci<XUsyspmcmsglegacyerrW'`:HYhw b  pcie-phy0@(Tv @dbiapbconfig"pipeGokaydefault cdelegacy-interrupt-controllerBW Xethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*XUmacirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref" stmmacethn Gokay2WBsY@output" -rgmii-id6$defaultmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22AN Q cdstmmac-axi-configoyrx-queues-configqueue0tx-queues-configqueue0can@fe570000,rockchip,rk3568v2-canfdW X A@ baudpclk"UT coreapbdefault Gdisabledcan@fe580000,rockchip,rk3568v2-canfdX X CB baudpclk"WV coreapbdefault Gdisabledcan@fe590000,rockchip,rk3568v2-canfdY X ED baudpclk"YX coreapbdefault Gdisabledphy@fe820000,rockchip,rk3568-naneng-combphy | refapbpipe2B"phy > P fGokaychosen Nserial2:1500000n8hdmi-con,hdmi-connectoraportendpoint_ir-receiver,gpio-ir-receiver i"defaultkeys ,gpio-keysdefaultbutton-factory Zfactory ` i" k2leds ,gpio-ledsdefault led-0 } wan i netdevled-1 } disk iled-2 } status i default-onregulator-0v9-vcc-2g5,regulator-fixed vcc0v9_2g5  !regulator-12v-vcc-dcinp,regulator-fixed vcc12v_dcinpregulator-3v3-vcc-pi6c-05,regulator-fixed  i"defaultvcc3v3_pi6c_052Z2Z!eregulator-3v3-vcc-sd,regulator-fixed  i"default vcc3v3_sd2Z2Z$jregulator-3v3-vcc-sys,regulator-fixed vcc3v3_sys2Z2Z!$regulator-5v0-vcc-sys,regulator-fixed vcc5v0_sysLK@LK@!regulator-5v0-vcc-usb30-otg0,regulator-fixed  i"defaultvcc5v0_usb30_otg0LK@LK@! interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1ethernet0ethernet1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesrockchip,disable-mmu-resetfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modephy-supplyreset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50vmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-hs200-1_8vnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesstdout-pathlabellinux,codedebounce-intervalcolorfunctionlinux,default-triggerenable-active-high