8 (  "100ask,dshanpi-a1rockchip,rk3576 +7100ASK DshanPi A1 boardaliases=/soc/i2c@27300000B/soc/i2c@2ac40000G/soc/i2c@2ac50000L/soc/i2c@2ac60000Q/soc/i2c@2ac70000V/soc/i2c@2ac80000[/soc/i2c@2ac90000`/soc/i2c@2aca0000e/soc/i2c@2acb0000j/soc/i2c@2ae80000o/soc/serial@2ad40000w/soc/serial@27310000/soc/serial@2ad50000/soc/serial@2ad60000/soc/serial@2ad70000/soc/serial@2ad80000/soc/serial@2ad90000/soc/serial@2ada0000/soc/serial@2adb0000/soc/serial@2adc0000/soc/serial@2afc0000/soc/serial@2afd0000/soc/spi@2acf0000/soc/spi@2ad00000/soc/spi@2ad10000/soc/spi@2ad20000/soc/spi@2ad30000/soc/ethernet@2a220000/soc/ethernet@2a230000/soc/mmc@2a330000/soc/mmc@2a310000clock-xin32k fixed-clockxin32k+clock-xin24m fixed-clock+n6xin24mclock-spll fixed-clock+)׫spllcpus+cpu-mapcluster0core08core18core28core38cluster1core08core18core28core38 cpu@0?@ABpower-domain@8H m CD+power-domain@9H power-domain@10H power-domain@12H mEpower-domain@13H Pm\[RSPOXWUTFGHIJpower-domain@14Hm=>Kpower-domain@15H`mghfcdeilmpnoLMNOP+power-domain@11H ma`Qpower-domain@18H mRS+power-domain@7H(mBGHITUpower-domain@16H(mVpower-domain@17H(mWgpu@27800000&rockchip,rk3576-maliarm,mali-bifrostH's  =m8coreY$[\] QjobmmugputX%okayY"video-codec@27b00000rockchip,rk3576-vdec0H'''$functionlinkcache 4(m=>@?8axiahbcabaccorehevc_cabac s=@?#F#Fe;Z%(axiahbcabaccorehevc_cabac[iommu@27b00800,rockchip,rk3576-iommurockchip,rk3568-iommu H'@' @ 5m@> 8aclkiface%Zvop@27d00000rockchip,rk3576-vop H'0'P$vopgamma-lut0V{|}Qsysvp0vp1vp2,m\28aclkhclkdclk_vp0dclk_vp1dclk_vp2pll_hdmiphy0]%^&_okayports+port@0+Hendpoint@2H3`gport@1+Hport@2+Hiommu@27d07e00,rockchip,rk3576-iommurockchip,rk3568-iommu H'~' Vm 8aclkiface%okay]sai@27d40000rockchip,rk3576-saiH' m 8mclkhclkaCrx%ijmhMctSAI5 disabledsai@27d50000rockchip,rk3576-saiH' m 8mclkhclkaaCtxrx%klmhMctSAI6okaydsi@27d80000rockchip,rk3576-mipi-dsi2H' Ym 8pclksys%capbb dcphyc disabledports+port@0Hport@1Hhdmi@27da0000rockchip,rk3576-dw-hdmi-qpH'0m8pclkearcrefaudhdphclk_vo1<RSTUoQavpcecearcmainhpd\default def%frefhdpccokayports+port@0Hendpoint3g`port@1Hendpoint3hsai@27ed0000rockchip,rk3576-saiH' m 8mclkhclkaCtx%uvmhctSAI7 disabledsai@27ee0000rockchip,rk3576-saiH' tm 8mclkhclkiCtx%rqmhctSAI8 disabledsai@27ef0000rockchip,rk3576-saiH' um 8mclkhclk1Ctx%mhctSAI9 disabledqos@27f02000rockchip,rk3576-qossysconH' Wqos@27f04000rockchip,rk3576-qossysconH'@ =qos@27f04080rockchip,rk3576-qossysconH'@ >qos@27f04100rockchip,rk3576-qossysconH'A ?qos@27f04180rockchip,rk3576-qossysconH'A @qos@27f04200rockchip,rk3576-qossysconH'B Aqos@27f04280rockchip,rk3576-qossysconH'B Bqos@27f05000rockchip,rk3576-qossysconH'P :qos@27f06000rockchip,rk3576-qossysconH'` Eqos@27f08000rockchip,rk3576-qossysconH' 3qos@27f08080rockchip,rk3576-qossysconH' 4qos@27f08100rockchip,rk3576-qossysconH' 5qos@27f09000rockchip,rk3576-qossysconH' ;qos@27f09080rockchip,rk3576-qossysconH' <qos@27f0a000rockchip,rk3576-qossysconH' Cqos@27f0a080rockchip,rk3576-qossysconH' Dqos@27f0c000rockchip,rk3576-qossysconH' Kqos@27f0d000rockchip,rk3576-qossysconH' qos@27f0e000rockchip,rk3576-qossysconH' Tqos@27f0e080rockchip,rk3576-qossysconH' Uqos@27f0f000rockchip,rk3576-qossysconH' Qqos@27f10000rockchip,rk3576-qossysconH' Lqos@27f10080rockchip,rk3576-qossysconH' Mqos@27f10100rockchip,rk3576-qossysconH' Nqos@27f10180rockchip,rk3576-qossysconH' Oqos@27f10200rockchip,rk3576-qossysconH' Pqos@27f11000rockchip,rk3576-qossysconH' Vqos@27f12800rockchip,rk3576-qossysconH'( Rqos@27f12880rockchip,rk3576-qossysconH'( Sqos@27f13000rockchip,rk3576-qossysconH'0 Fqos@27f13080rockchip,rk3576-qossysconH'0 Hqos@27f13100rockchip,rk3576-qossysconH'1 Iqos@27f13180rockchip,rk3576-qossysconH'1 Gqos@27f13200rockchip,rk3576-qossysconH'2 Jqos@27f20000rockchip,rk3576-qossysconH' 8qos@27f21000rockchip,rk3576-qossysconH' 9qos@27f22080rockchip,rk3576-qossysconH' 6qos@27f22100rockchip,rk3576-qossysconH'! 7ethernet@2a220000&rockchip,rk3576-gmacsnps,dwmac-4.20aH*"(m$. %08stmmacethclk_mac_refpclk_macaclk_macptp_refD%*Qmacirqeth_wake_irq% stmmacethjklmokay output rgmii-id#n[odefaultpqrstmdiosnps,dwmac-mdio+phy@0ethernet-phy-ieee802.3-c22Hdefaultu.N > vnstmmac-axi-configPZjkrx-queues-configzlqueue0tx-queues-configmqueue0ethernet@2a230000&rockchip,rk3576-gmacsnps,dwmac-4.20aH*#(m%/!$08stmmacethclk_mac_refpclk_macaclk_macptp_refD-2Qmacirqeth_wake_irq%  stmmacethjwxyokay output rgmii-id#z[odefault{|}~mdiosnps,dwmac-mdio+phy@0ethernet-phy-ieee802.3-c22Hdefault.N > vzstmmac-axi-configPZjwrx-queues-configzxqueue0tx-queues-configyqueue0sata@2a240000'rockchip,rk3576-dwc-ahcisnps,dwc-ahciH*$m8satapmaliverxoob % $ sata-phyD disabledsata@2a250000'rockchip,rk3576-dwc-ahcisnps,dwc-ahciH*%m8satapmaliverxoob % * sata-phyD disabledufshc@2a2d0000rockchip,rk3576-ufshcPH*-+&&*."$hcimphyhci_grfmphy_grfhci_apb mIC8corepclkpclk_mphyref_outs; i%default(!"$biusysufsgrfmphy  disabledspi@2a300000 rockchip,sfcH*0@ m*+8clk_sfchclk_sfc%+ disabledmmc@2a310000rockchip,rk3576-dw-mshcH*1@m)(8biuciu  default% resetokay  o #mmc@2a320000rockchip,rk3576-dw-mshcH*2@m#"8biuciu   default% reset disabledmmc@2a3300000rockchip,rk3576-dwcmshcrockchip,rk3588-dwcmshcH*3s  n6 (m8corebusaxiblocktimer  default%(corebusaxiblocktimer 0okay = W f   spi@2a340000 rockchip,sfcH*4@ m8clk_sfchclk_sfc%+ disabledrng@2a410000rockchip,rk3576-rngH*Am otp@2a580000rockchip,rk3576-otpH*X+m18otpapb_pclkphyotpapbcpu-code@2Hcpu-version@5H id@aH cpub-leakage@1eHcpul-leakage@1fHnpu-leakage@20H gpu-leakage@21H!log-leakage@22H"bigcore-tsadc-trim@24H$ litcore-tsadc-trim@26H& ddr-tsadc-trim@28H( npu-tsadc-trim@2aH* gpu-tsadc-trim@2cH, soc-tsadc-trim@64Hd sai@2a600000rockchip,rk3576-saiH*` m@A 8mclkhclk11Ctxrx% mhdefault(ctSAI0 disabledsai@2a610000rockchip,rk3576-saiH*a mGH 8mclkhclk11Ctxrx% mhdefaultctSAI1 disabledsai@2a620000rockchip,rk3576-saiH*b mJK 8mclkhclkiiCtxrx% mhdefaultctSAI2okaysai@2a630000rockchip,rk3576-saiH*c mMN 8mclkhclkiiCtxrx% mhdefaultctSAI3 disabledsai@2a640000rockchip,rk3576-saiH*d mPQ 8mclkhclkaaCtxrx% mhdefaultctSAI4 disabledinterrupt-controller@2a701000 arm,gic-400@H*p*p *p@*p`  %F+dma-controller@2ab90000arm,pl330arm,primecellH*@ m 8apb_pclk ! 1dma-controller@2abb0000arm,pl330arm,primecellH*@ m 8apb_pclk"# idma-controller@2abd0000arm,pl330arm,primecellH*@ m 8apb_pclk$% ai2c@2ac40000(rockchip,rk3576-i2crockchip,rk3399-i2cH*mth 8i2cpclk Ydefault+okaypmic@23rockchip,rk806H#: vdefault  / / / / / / #/ // ;/ G/ T a/ n { /dvs1-null-pinsgpio_pwrctrl1 pin_fun0dvs2-null-pinsgpio_pwrctrl2 pin_fun0dvs3-null-pinsgpio_pwrctrl3 pin_fun0dvs1-slp-pinsgpio_pwrctrl1 pin_fun1dvs1-pwrdn-pinsgpio_pwrctrl1 pin_fun2dvs1-rst-pinsgpio_pwrctrl1 pin_fun3dvs2-slp-pinsgpio_pwrctrl2 pin_fun1dvs2-pwrdn-pinsgpio_pwrctrl2 pin_fun2dvs2-rst-pinsgpio_pwrctrl2 pin_fun3dvs2-dvs-pinsgpio_pwrctrl2 pin_fun4dvs2-gpio-pinsgpio_pwrctrl2 pin_fun5dvs3-slp-pinsgpio_pwrctrl3 pin_fun1dvs3-pwrdn-pinsgpio_pwrctrl3 pin_fun2dvs3-rst-pinsgpio_pwrctrl3 pin_fun3dvs3-dvs-pinsgpio_pwrctrl3 pin_fun4dvs3-gpio-pinsgpio_pwrctrl3 pin_fun5regulatorsdcdc-reg1   dp ~ 0 vdd_cpu_big_s0 regulator-state-mem 3dcdc-reg2  dp ~ 0 vdd_npu_s0 regulator-state-mem 3dcdc-reg3   dp ~ 0 vdd_cpu_lit_s0 regulator-state-mem 3 L qdcdc-reg4   2Z 2Z vcc_3v3_s3regulator-state-mem h L2Zdcdc-reg5  dp  0 vdd_gpu_s0 Yregulator-state-mem 3 L Pdcdc-reg6   vddq_ddr_s0regulator-state-mem 3dcdc-reg7   dp 5 vdd_logic_s0regulator-state-mem 3dcdc-reg8   w@ w@ vcc_1v8_s3regulator-state-mem h Lw@dcdc-reg9   vdd2_ddr_s3regulator-state-mem hdcdc-reg10   dp O vdd_ddr_s0regulator-state-mem 3pldo-reg1   w@ w@ vcca_1v8_s0regulator-state-mem 3pldo-reg2   w@ w@ vcca1v8_pldo2_s0regulator-state-mem 3pldo-reg3   O O vdda_1v2_s0regulator-state-mem 3pldo-reg4   2Z 2Z vcca_3v3_s0regulator-state-mem 3pldo-reg5   w@ 2Z vccio_sd_s0regulator-state-mem 3pldo-reg6   w@ w@ vcca1v8_pldo6_s3regulator-state-mem h Lw@nldo-reg1   q q vdd_0v75_s3regulator-state-mem h L qnldo-reg2   P P vdda_ddr_pll_s0regulator-state-mem 3nldo-reg3   | | vdda0v75_hdmi_s0regulator-state-mem 3nldo-reg4   P P vdda_0v85_s0regulator-state-mem 3nldo-reg5   q q vdda_0v75_s0regulator-state-mem 3i2c@2ac50000(rockchip,rk3576-i2crockchip,rk3399-i2cH*mui 8i2cpclk Zdefault+okayrtc@68dallas,ds1338Hhi2c@2ac60000(rockchip,rk3576-i2crockchip,rk3399-i2cH*mvj 8i2cpclk [default+ disabledi2c@2ac70000(rockchip,rk3576-i2crockchip,rk3399-i2cH*mwk 8i2cpclk \default+okayaudio-codec@11everest,es8388everest,es8328Hm=s= o o o odefaultci2c@2ac80000(rockchip,rk3576-i2crockchip,rk3399-i2cH*mxl 8i2cpclk ]default+ disabledi2c@2ac90000(rockchip,rk3576-i2crockchip,rk3399-i2cH*mym 8i2cpclk ^default+ disabledi2c@2aca0000(rockchip,rk3576-i2crockchip,rk3399-i2cH*mzn 8i2cpclk _default+ disabledi2c@2acb0000(rockchip,rk3576-i2crockchip,rk3399-i2cH*m{o 8i2cpclk `default+ disabledtimer@2acc0000,rockchip,rk3576-timerrockchip,rk3288-timerH* m 8pclktimer -watchdog@2ace0000 rockchip,rk3576-wdtsnps,dw-wdtH*m 8tclkpclk (spi@2acf0000(rockchip,rk3576-spirockchip,rk3066-spiH*m8spiclkapb_pclk11Ctxrx t default + disabledspi@2ad00000(rockchip,rk3576-spirockchip,rk3066-spiH*m8spiclkapb_pclk11Ctxrx u default + disabledspi@2ad10000(rockchip,rk3576-spirockchip,rk3066-spiH*m8spiclkapb_pclkiiCtxrx v default + disabledspi@2ad20000(rockchip,rk3576-spirockchip,rk3066-spiH*m8spiclkapb_pclkiiCtxrx w default + disabledspi@2ad30000(rockchip,rk3576-spirockchip,rk3066-spiH*m8spiclkapb_pclka a Ctxrx x default + disabledserial@2ad40000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclk11Ctxrx Ldefaultokayserial@2ad50000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclk1 1 Ctxrx Ndefault disabledserial@2ad60000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclk1 1 Ctxrx Odefault disabledserial@2ad70000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclki i Ctxrx Pdefault disabledserial@2ad80000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclki i Ctxrx Qdefault disabledserial@2ad90000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclki iCtxrx Rdefault disabledserial@2ada0000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclkaaCtxrx Sdefault disabledserial@2adb0000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclkaa Ctxrx Tdefault disabledserial@2adc0000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclka a Ctxrx Udefault disabledadc@2ae00000.rockchip,rk3576-saradcrockchip,rk3588-saradcH*m~}8saradcapb_pclk |H saradc-apb okay tsadc@2ae70000rockchip,rk3576-tsadcH* {m8tsadcapb_pclksJKtsadc-apbtsadc    +sensor@0H ) 5trimsensor@1H ) 5trimsensor@2H ) 5trimsensor@3H ) 5trimsensor@4H ) 5trimsensor@5H ) 5trimi2c@2ae80000(rockchip,rk3576-i2crockchip,rk3399-i2cH*m|p 8i2cpclk adefault+ disabledserial@2afc0000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclkaa Vdefault disabledserial@2afd0000&rockchip,rk3576-uartsnps,dw-apb-uartH*m8baudclkapb_pclkaa Wdefault disabledphy@2b020000rockchip,rk3576-mipi-dcphyH+m 8pclkref m_phyapbgrfs_phyP disabledbphy@2b050000rockchip,rk3576-naneng-combphyH+Pm95 8refapbpipes9phyapb F Xokay$phy@2b060000rockchip,rk3576-naneng-combphyH+Pm:6  8refapbpipes:phyapb F Xokay*phy@2b010000rockchip,rk3576-usbdp-phyH+Pm8refclkimmortalpclkutmi(initcmnlanepcs_apbpma_apb n  okay,hdmiphy@2b0000004rockchip,rk3576-hdptx-phyrockchip,rk3588-hdptx-phyH+ m!8refapb+ apbinitcmnlanePokay\sram@3ff88000 mmio-sramH??+rkvdec-sram@0H [scmi-shmem@4010f000arm,scmi-shmemH@chosen serial0:1500000n8es8388-soundsimple-audio-cardi2sOn-board Analog ES8388S MicrophoneHeadphone MicMicrophoneMic PadsHeadphoneHeadphoneLine OutLine Outv HeadphoneLOUT1HeadphoneROUT1Line OutLOUT2Line OutROUT2RINPUT1Headphone MicLINPUT2Mic PadsRINPUT2Mic Pads HeadphoneLine Outsimple-audio-card,cpusimple-audio-card,codec hdmi-conhdmi-connectorCaportendpoint3hkeys-0 adc-keys # /buttons @w@ Zdbutton-maskrom hMASKROM n ykeys-1 adc-keys # /buttons @w@ Zdbutton-recovery hRECOVERY nh ykeys-2 adc-keys # /buttons @w@ Zdbutton-user2 hUSER2 n ykeys-3 gpio-keysdefaultbutton-user1 %v hUSER1 n regulator-vcc-12v0-dcinregulator-fixed vcc_in    regulator-vcc-1v1-nldo-s3regulator-fixed vcc_1v1_nldo_s3     /regulator-vcc-1v8-s0regulator-fixed vcc_1v8_s0   w@ w@ regulator-vcc-2v0-pldo-s3regulator-fixed vcc_2v0_pldo_s3     /regulator-vcc-3v3-m2regulator-fixed vcc_3v3_m2   2Z 2Z /(regulator-vcc-3v3-s0regulator-fixed vcc_3v3_s0   2Z 2Z oregulator-vcc-5v0-sysregulator-fixed vcc_5v0_sys   LK@ LK@ /regulator-vbus5v0-typecregulator-fixed  %'default vbus5v0_typec LK@ LK@ /. compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9serial10serial11spi0spi1spi2spi3spi4ethernet0ethernet1mmc0mmc1clock-frequencyclock-output-names#clock-cellscpudevice_typeregenable-methodcapacity-dmips-mhzclocksoperating-points-v2dynamic-power-coefficientcpu-idle-states#cooling-cellscpu-supplyphandleentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmemsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-dairockchip,grfrangesgpio-controllergpio-rangesinterruptsinterrupt-controller#gpio-cells#interrupt-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsinterrupt-affinitypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereg-namesbus-rangeclock-namesdma-coherentinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-ib-windowsnum-viewportnum-ob-windowsnum-lanesphysphy-namespower-domainsresetsreset-namespinctrl-namespinctrl-0reset-gpiosvpcie3v3-supplydr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,parkmode-disable-hs-quirksnps,parkmode-disable-ss-quirksnps,dis_rxdet_inp3_quirk#phy-cellsphy-supply#reset-cellsassigned-clocksassigned-clock-parentsassigned-clock-ratesreg-shiftreg-io-widthdmas#power-domain-cellspm_qosmali-supplyiommussramrockchip,disable-mmu-reset#iommu-cellsrockchip,pmuremote-endpointdma-namesrockchip,sai-rx-route#sound-dai-cellssound-name-prefixrockchip,sai-tx-routerockchip,vo-grfrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-modephy-handlereset-assert-usreset-deassert-ussnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplysupports-cqefull-pwr-cycle-in-suspendmmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdiono-sdnon-removablebitsarm,pl330-periph-burst#dma-cellssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplyfunctionregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-nameregulator-enable-ramp-delayregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendAVDD-supplyDVDD-supplyHPVDD-supplynum-cs#io-channel-cellsvref-supply#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritynvmem-cellsnvmem-cell-namesrockchip,pipe-grfrockchip,pipe-phy-grfrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfpoolstdout-pathsimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,pin-switchessystem-clock-frequencyio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltwakeup-sourcevin-supplyenable-active-high