;-86(]6.solidrun,cubox-essolidrun,cuboxmarvell,dove$&SolidRun CuBox (Engineering Sample),aliases9=/mbus/internal-regs/power-management@d0000/gpio-ctrl@4009C/mbus/internal-regs/power-management@d0000/gpio-ctrl@420$I/mbus/internal-regs/gpio-ctrl@e8400cpuscpu@0marvell,pj4amarvell,sheeva-v7Ocpu[ll2-cachemarvell,tauros2-cachepgpu-subsystemmarvell,dove-gpu-subsystemokayi2c-muxi2c-mux-pinctrli2c0i2c1i2c2i2c@0lokayclock-generator@60silabs,si5351a-msopl`xtal clkout0l3L`clkout2l3L`i2c@1l disabledi2c@2l disabledmbus*marvell,dove-mbusmarvell,mbussimple-busr } P pciemarvell,dove-pcie disabledOpci  pcie@1Opci disabled l @pcie@2Opci disabled( l @internal-regs simple-bus@ spi@10600marvell,orion-spil(  defaultokayflash@0 st,w25q32)1-li2c@11000marvell,mv64xxx-i2cl   okayserial@12000 ns16550al ; okayserial@12100 ns16550al!;  default disabledserial@12200 ns16550al";   disabledserial@12300 ns16550al#;   disabledspi@14600marvell,orion-spilF(  disabledmbus-ctrl@20000marvell,mbus-controllerl system-ctrl@20000 marvell,orion-system-controllerlbridge-interrupt-ctrl@20110marvell,orion-bridge-intcElZinterrupt-controller@20200marvell,orion-intcEltimer@20300marvell,orion-timerl , watchdog@20300marvell,orion-wdtl(, crypto-engine@30000marvell,dove-cryptolnregs xokayusb-host@50000marvell,orion-ehcil okayusb-host@51000marvell,orion-ehcil okaydma-engine@60800marvell,orion-xorl  okaychannel0'channel1(dma-engine@60900marvell,orion-xorl   okaychannel0*channel1+sdio-host@90000marvell,dove-sdhcil $& default disabledethernet-ctrl@72000marvell,orion-ethl @ @okayethernet-port@0marvell,orion-eth-portlmdio-bus@72004marvell,orion-mdiol  okayethernet-phymarvell,88e1310lsdio-host@92000marvell,dove-sdhcil #% defaultokay  sata-host@a0000marvell,orion-satal $> port0okaysata-phy@a2000marvell,mvebu-sata-phyl 4 sataokaudio-controller@b0000marvell,dove-audiol "  internal disabledaudio-controller@b4000marvell,dove-audiol @" internalextclkokaydefaultpower-management@d0000marvell,dove-pmusimple-busl  !E"domainsvpu-domain/CXmgpu-domain/CXmthermal-diode@1cmarvell,dove-thermall \clock-gating-ctrl@38marvell,dove-gating-clockl8  core-clock@64marvell,dove-divider-clockldpin-ctrl@200marvell,dove-pinctrll@ pmx-gpio-0tmpp0gpiopmx-gpio-1tmpp1gpiopmx-gpio-2tmpp2gpiopmx-gpio-3tmpp3gpiopmx-gpio-4tmpp4gpiopmx-gpio-5tmpp5gpiopmx-gpio-6tmpp6gpiopmx-gpio-7tmpp7gpiopmx-gpio-8tmpp8gpiopmx-gpio-9tmpp9gpiopmx-pcie1-clkreqtmpp9pex1pmx-gpio-10tmpp10gpiopmx-gpio-11tmpp11gpiopmx-pcie0-clkreqtmpp11pex0pmx-gpio-12tmpp12gpiopmx-gpio-13tmpp13gpiopmx-audio1-extclktmpp13audio1pmx-gpio-14tmpp14gpiopmx-gpio-15tmpp15gpiopmx-gpio-16tmpp16gpiopmx-gpio-17tmpp17gpiopmx-gpio-18tmpp18gpiopmx-gpio-19tmpp19gpiopmx-gpio-20tmpp20gpiopmx-gpio-21tmpp21gpiopmx-camera tmpp_cameracamerapmx-camera-gpio tmpp_cameragpiopmx-sdio0 tmpp_sdio0sdio0pmx-sdio0-gpio tmpp_sdio0gpiopmx-sdio1 tmpp_sdio1sdio1pmx-sdio1-gpio tmpp_sdio1gpiopmx-audio1-gpio tmpp_audio1gpiopmx-audio1-i2s1-spdifo tmpp_audio1 i2s1/spdifopmx-spi0 tmpp_spi0spi0 pmx-spi0-gpio tmpp_spi0gpiopmx-spi1-4-7tmpp4mpp5mpp6mpp7spi1pmx-spi1-20-23tmpp20mpp21mpp22mpp23spi1pmx-uart1 tmpp_uart1uart1 pmx-uart1-gpio tmpp_uart1gpiopmx-nand tmpp_nandnandpmx-nand-gpo tmpp_nandgpopmx-i2c1 tmpp17mpp19twsipmx-i2c2 tmpp_audio1twsipmx-ssp-i2c2 tmpp_audio1 ssp/twsipmx-i2cmux-0ttwsi twsi-opt1pmx-i2cmux-1ttwsi twsi-opt2pmx-i2cmux-2ttwsi twsi-opt3core-clocks@214marvell,dove-core-clockl gpio-ctrl@400marvell,orion-gpiol  E, <gpio-ctrl@420marvell,orion-gpiol  E,=real-time-clock@8500marvell,orion-rtcl global-config@e802c"marvell,dove-global-configsysconl,gpio-ctrl@e8400marvell,orion-gpiol lcd-controller@810000marvell,dove-lcdl. disabledlcd-controller@820000marvell,dove-lcdl/ disabledsram@ffffe000 mmio-sraml gpu@840000core vivante,gc0l@okaymemoryOmemoryl@chosen#console=ttyS0,115200n8 earlyprintkleds gpio-ledsdefaultpowerPower keepregulators simple-busregulator@1regulator-fixedl USB PowerLK@LK@2F Xdefaultclocksoscillator fixed-clock}x@ir-receivergpio-ir-receiver default #address-cells#size-cellscompatiblemodelinterrupt-parentgpio0gpio1gpio2device_typenext-level-cacheregmarvell,tauros2-cache-featuresphandlecoresstatusi2c-parentpinctrl-namespinctrl-0pinctrl-1pinctrl-2clock-frequency#clock-cellsclocksclock-namessilabs,pll-sourcesilabs,drive-strengthsilabs,multisynth-sourcesilabs,clock-sourcesilabs,pll-mastercontrollerpcie-mem-aperturepcie-io-aperturerangesmsi-parentbus-rangeassigned-addressesmarvell,pcie-port#interrupt-cellsinterrupt-map-maskinterrupt-mapcell-indexinterruptsspi-max-frequencyreg-shiftinterrupt-controllermarvell,#interruptsreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizedmacap,memcpydmacap,xormarvell,tx-checksum-limitlocal-mac-addressphy-handlecd-gpiosphysphy-namesnr-ports#phy-cells#reset-cells#power-domain-cellsmarvell,pmu_pwr_maskmarvell,pmu_iso_maskresetsmarvell,pinsmarvell,function#gpio-cellsgpio-controllerngpiospower-domainsbootargslabeldefault-stateregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highregulator-always-onregulator-boot-ongpio