8 (l-STMicroelectronics STM32MP157C eval daughter!!st,stm32mp157c-ed1st,stm32mp157cpuscpu@0!arm,cortex-a7,&68rxtx disabledaudio-controller@4000c000!st,stm32h7-i2svH@ T3 3=>8rxtx disabledaudio-controller@4000d000!st,stm32h7-spdifrxvH@ 'kclk Ta 3]^ 8rxrx-ctrl disabledserial@4000e000!st,stm32h7-uartH@ M a 3+,8rxtx disabledserial@4000f000!st,stm32h7-uartH@ M a 3-.8rxtx disabledserial@40010000!st,stm32h7-uartH@ M aokaydefaultsleepidle   serial@40011000!st,stm32h7-uartH@ M a 3AB8rxtx disabledi2c@40012000!st,stm32mp15-i2cH@  eventerrorT  oL a disabledi2c@40013000!st,stm32mp15-i2cH@0 eventerrorT!" oL a disabledi2c@40014000!st,stm32mp15-i2cH@@ eventerrorTHI oL a disabledi2c@40015000!st,stm32mp15-i2cH@P eventerrorTkl oL a disabledcec@40016000 !st,stm32-cecH@` T^  'cechdmi-cec disableddac@40017000!st,stm32h7-dac-coreH@p 'pclk disableddefault dac@1 !st,stm32-dacHokaydac@2 !st,stm32-dacHokayserial@40018000!st,stm32h7-uartH@ M  a 3OP8rxtx disabledserial@40019000!st,stm32h7-uartH@ M! a 3QR8rxtx disabledtimer@44000000!st,stm32-timersHD 'intp3   8ch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@0!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@44001000!st,stm32-timersHD 'intp3/0123458ch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@7!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledserial@44003000!st,stm32h7-uartHD0 M a 3GH8rxtx disabledspi@44004000!st,stm32h7-spiHD@ T# oLH 3%&8rxtx disabledaudio-controller@44004000!st,stm32h7-i2svHD@ T# 3%&8rxtx disabledspi@44005000!st,stm32h7-spiHDP TT oLI 3ST8rxtx disabledtimer@44006000!st,stm32-timersHD` 'int@3ijkl8ch1uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@14!st,stm32h7-timer-triggerH disabledtimer@44007000!st,stm32-timersHDp 'int 3mn8ch1up disabledpwm !st,stm32-pwmB disabledtimer@15!st,stm32h7-timer-triggerH disabledtimer@44008000!st,stm32-timersHD 'int 3op8ch1up disabledpwm !st,stm32-pwmB disabledtimer@16!st,stm32h7-timer-triggerH disabledspi@44009000!st,stm32h7-spiHD TU oLJ 3UV8rxtx disabledsai@4400a000!st,stm32h7-sai DHDD TWoLP disabledaudio-controller@4400a004v!st,stm32-sai-sub-aH  'sai_ck3W disabledaudio-controller@4400a024v!st,stm32-sai-sub-bH$  'sai_ck3X disabledsai@4400b000!st,stm32h7-sai DHDD T[oLQ disabledaudio-controller@4400b004v!st,stm32-sai-sub-aH  'sai_ck3Y disabledaudio-controller@4400b024v!st,stm32-sai-sub-bH$  'sai_ck3Z disabledsai@4400c000!st,stm32h7-sai DHDD TroLR disabledaudio-controller@4400c004v!st,stm32-sai-sub-aH  'sai_ck3q disabledaudio-controller@4400c024v!st,stm32-sai-sub-bH$  'sai_ck3r disableddfsdm@4400d000!st,stm32mp1-dfsdmHD 'dfsdm disabledfilter@0!st,stm32-dfsdm-adcH Tn3e8rx disabledfilter@1!st,stm32-dfsdm-adcH To3f8rx disabledfilter@2!st,stm32-dfsdm-adcH Tp3g8rx disabledfilter@3!st,stm32-dfsdm-adcH Tq3h8rx disabledfilter@4!st,stm32-dfsdm-adcH Ts3[8rx disabledfilter@5!st,stm32-dfsdm-adcH T~3\8rx disableddma-controller@48000000 !st,stm32-dmaHH`T   / GoL Ldma-controller@48001000 !st,stm32-dmaHH`T89:;<DEF HoL Ldma-router@48002000!st,stm32h7-dmamuxHH @$0 IoLLadc@48003000!st,stm32mp1-adc-coreHH0TZ J'busadc disableddefault=HLadc@0!st,stm32mp1-adcHrT3 8rxokay Tdadc@100!st,stm32mp1-adcHrT3 8rx disabledmmc@48004000(!st,stm32-sdmmc2arm,pl18xarm,primecell}%1HH@ Tcmd_irq x 'apb_pclkoL' disabledusb-otg@49000000!st,stm32mp15-hsotgsnps,dwc2HI 'otgoLdwc2 Tb  otg  disabledmailbox@4c001000!st,stm32mp1-ipcc+HL7,Mde= rxtxwakeup SaokayL=dcmi@4c006000!st,stm32-dcmiHL` TNoM M'mclk3K8tx disabledrcc@50000000!st,stm32mp1-rccsysconHPBLpwr@50001000!st,stm32mp1,pwr-regHP=Oreg11dreg11sL)reg18dreg18sw@w@L*usb33dusb33s2Z2ZLpwr_mcu@50001014!st,stm32mp151-pwr-mcusysconHPL5interrupt-controller@5000d000!st,stm32mp1-extisysconHPLsyscon@50020000!st,stm32mp157-syscfgsysconHP 3Ltimer@50021000!st,stm32-lptimerHP M0 'muxa disabledpwm!st,stm32-pwm-lpB disabledtrigger@1!st,stm32-lptimer-triggerH disabledcounter!st,stm32-lptimer-counter disabledtimer@50022000!st,stm32-lptimerHP  M2 'muxa disabledpwm!st,stm32-pwm-lpB disabledtrigger@2!st,stm32-lptimer-triggerH disabledtimer@50023000!st,stm32-lptimerHP0 M4 'muxa disabledpwm!st,stm32-pwm-lpB disabledtimer@50024000!st,stm32-lptimerHP@ M5 'muxa disabledpwm!st,stm32-pwm-lpB disabledvrefbuf@50025000!st,stm32-vrefbufHPPs`&% 4 disabledsai@50027000!st,stm32h7-sai PpHPpPs ToL disabledaudio-controller@50027004v!st,stm32-sai-sub-aH  'sai_ck3c disabledaudio-controller@50027024v!st,stm32-sai-sub-bH$  'sai_ck3d disabledthermal@50028000!st,stm32-thermalHP T 5'pclkokayLhash@54002000!st,stm32f756-hashHT  TP ao 3 8inokayrng@54003000 !st,stm32-rngHT0 |o okaydma-controller@58000000!st,stm32h7-mdmaHX Tz do 0 0Lmemory-controller@58002000!st,stm32mp1-fmc2-ebiHX  yo  disabledP`dhlnand-controller@4,0!st,stm32mp1-fmc2-nfcHH   T0H3    8txrxecc disabledspi@58003000!st,stm32f469-qspiHX0p qspiqspi_mm T\038txrx zo  disabledmmc@58005000(!st,stm32-sdmmc2arm,pl18xarm,primecell}%1HXP T1cmd_irq v 'apb_pclko 'okaydefaultopendrainsleep *7DQmmc@58007000(!st,stm32-sdmmc2arm,pl18xarm,primecell}%1HXp T|cmd_irq w 'apb_pclko 'okaydefaultopendrainsleep !"!#$^lr%zcrc@58009000!st,stm32f7-crcHX nokayethernet@5800a000#!st,stm32mp1-dwmacsnps,dwmac-4.20aHX  stmmacethM=macirq6'stmmacethmac-clk-txmac-clk-rxeth-ckptp_refethstp0 igh{p& disabledstmmac-axi-configL&usb@5800c000 !generic-ohciHX  'oo  TJ disabledL(usb@5800d000 !generic-ehciHX  'oo  TK ( disableddisplay-controller@5a001000!st,stm32-ltdcHZTXY 'lcdo  disabledportwatchdog@5a002000!st,stm32mp1-iwdgHZ  : 'pclklsiokay usbphyc@5a006000!st,stm32mp1-usbphycHZ` o ).* disabledL'usb-phy@0=HHusb-phy@1=HHserial@5c000000!st,stm32h7-uartH\ M a disabledspi@5c001000!st,stm32h7-spiH\ TV o @03"#8rxtx disabledi2c@5c002000!st,stm32mp15-i2cH\  eventerrorT_` o B aokaydefaultsleep+,Sj,stpmic@33 !st,stpmic1H3 M-okayregulators!st,stpmic1-regulators....%%/.%%..0*0buck1dvddcoresOp9Mdbuck2dvdd_ddrspp9MdL/buck3dvdds2Z2Z9MdLbuck4dv3v3s2Z2Z9dML%ldo1dvddas,@ ,@ TLldo2dv2v8s**Tldo3dvtt_ddrs  q9dldo4dvdd_usbTLldo5dvdd_sds,@ ,@ TLldo6dv1v8sw@w@Tvref_ddr dvref_ddr9boostdbst_outTL0pwr_sw1 dvbus_otgT Lpwr_sw2dvbus_swT onkey!st,stpmic1-onkeyTonkey-fallingonkey-rising okaywatchdog!st,stpmic1-wdt disabledrtc@5c004000!st,stm32mp1-rtcH\@ A 'pclkrtc_ck Mokayefuse@5c005000!st,stm32mp15-bsecH\Pcalib@5cH\calib@5eH^i2c@5c009000!st,stm32mp15-i2cH\ eventerrorT o C  a disabledtamp@5c00a000 !st,stm32-tampsysconsimple-mfdH\L6pinctrl@50002000!st,stm32mp157-pinctrl P r `L1gpio@50002000H T GPIOAokay!1L-gpio@50003000H U GPIOBokay!1gpio@50004000H  V GPIOCokay!1 gpio@50005000H0 W GPIODokay!10gpio@50006000H@ X GPIOEokay!1@gpio@50007000HP Y GPIOFokay!1PL>gpio@50008000H` Z GPIOGokay!1`Lgpio@50009000Hp [ GPIOHokay!1pgpio@5000a000H \ GPIOIokay!1gpio@5000b000H ] GPIOJokay!1gpio@5000c000H ^ GPIOKokay!1adc1-in6-0Lpins-\adc12-ain-0pins-#\]^adc12-ain-1pins-\]adc12-usb-cc-pins-0pins-cec-0pins-4ARcec-sleep-0pins-cec-1pins-4ARcec-sleep-1pins-dac-ch1-0L pins-dac-ch2-0L pins-dcmi-0pins<-xyz{|~Fw4dcmi-sleep-0pins<-xyz{|~Fwdcmi-1pins,-&z{AK3M4dcmi-sleep-1pins,-&z{AK3Mrgmii-0pins1 -e d m n " B  ! 4\Rpins2- 4\Rpins3-$ %     4rgmii-sleep-0pins1<-edmn"B!$%rgmii-1pins1 -e d m n " B  ! 4\Rpins2- 4\Rpins3-$ % v w   4rgmii-sleep-1pins1<-edmn"B!$%vwrgmii-2pins1 -e d  n " B k ! 4\Rpins2- 4\Rpins3-$ % v    4rgmii-sleep-2pins1<-edn"Bk!$%vrmii-0pins1-m n   ! 4\Rpins2 -$ %  4rmii-sleep-0pins1$-mn!$%rmii-1pins1-! m n 4\Rpins2- 4\Rpins3 - $ % 4pins4- rmii-sleep-1pins1$-!$%mnrmii-2pins1-m n    ! 4\Rpins2 -$ %  4rmii-sleep-2pins1$-mn!$%fmc-0pins14-4 5 ; < > ? 0 1 G H I J i 4\Rpins2-6 lfmc-sleep-0pins8-45;<>?01GHIJ6ifmc-1pinsT-4 5  > ? 0 1 G H I J K L M N O 8 9 : i l 4\Rfmc-sleep-1pinsT-45>?01GHIJKLMNO89:ili2c1-0pins-<_4ARi2c1-sleep-0pins-<_i2c1-1pins-^_4ARi2c1-sleep-1pins-^_i2c2-0pins-tu4ARi2c2-sleep-0pins-tui2c2-1pins-u4ARi2c2-sleep-1pins-ui2c2-2pins-Qu4ARi2c2-sleep-2pins-Qui2c5-0pins-  4ARi2c5-sleep-0pins-  i2c5-1pins-014ARi2c5-sleep-1pins-01i2s2-0pins - R\4i2s2-sleep-0pins - ltdc-0pinsp-gZrsxyz |OEF}~9lj:84\Rltdc-sleep-0pinsp-gZrsxyz |OEF}~9lj:8ltdc-1pinsp-4\Rltdc-sleep-1pinsp-ltdc-2pins1T-  36:KLMOt xyz}4\Rpins2-N4\Rltdc-sleep-2pins1X- 36:KLMOtxyz}Nltdc-3pins1-g4\Rpins2l-Mmsxy{|OE}Kt h9lj:L4\Rltdc-sleep-3pinsp-gMmsxy{|OE}Kth9lj:Lmco2-0pins-b4\Rmco2-sleep-0pins-bm-can1-0pins1-} R\4pins2- 4m_can1-sleep-0pins-}m-can1-1pins1- R\4pins2- 4m_can1-sleep-1pins-  m-can2-0pins1- R\4pins2- 4m_can2-sleep-0pins-pwm1-0pins -IKNy\Rpwm1-sleep-0pins -IKNpwm1-1pins-Iy\Rpwm1-sleep-1pins-Ipwm2-0pins-y\Rpwm2-sleep-0pins-pwm3-0pins-'y\Rpwm3-sleep-0pins-'pwm3-1pins-4\Rpwm3-sleep-1pins-pwm4-0pins->?y\Rpwm4-sleep-0pins->?pwm4-1pins-=y\Rpwm4-sleep-1pins-=pwm5-0pins-{y\Rpwm5-sleep-0pins-{pwm5-1pins -{|4\Rpwm5-sleep-1pins -{|pwm8-0pins-y\Rpwm8-sleep-0pins-pwm12-0pins-vy\Rpwm12-sleep-0pins-vqspi-clk-0pins-Z 4\Rqspi-clk-sleep-0pins-Zqspi-bk1-0pins1-X Y W V 4\Rpins2- l\Rqspi-bk1-sleep-0pins-XYWVqspi-bk2-0pins1-r s j g 4\Rpins2- l\Rqspi-bk2-sleep-0pins-rsjg sai2a-0pins- @ R\4sai2a-sleep-0pins-@sai2a-1pins1 - = R\4sai2a-sleep-1pins -=sai2a-2pins -= ; < R\4sai2a-sleep-2pins -=;<sai2b-0pins1 -L M N R\4pins2-[ 4sai2b-sleep-0pins-[LMNsai2b-1pins-[ 4sai2b-sleep-1pins-[sai2b-2pins1-[ 4sai2b-sleep-2pins-[sai4a-0pins- R\4sai4a-sleep-0pins-sdmmc1-b4-0Lpins1-( ) * + 2 R\4pins2-, R\4sdmmc1-b4-od-0Lpins1-( ) * + R\4pins2-, R\4pins3-2 RA4sdmmc1-b4-init-0pins1-( ) * + R\4sdmmc1-b4-sleep-0Lpins-()*+,2sdmmc1-dir-0Lpins1 -R '  R\lpins2-D lsdmmc1-dir-init-0pins1 -R '  R\lsdmmc1-dir-sleep-0Lpins-R'Dsdmmc1-dir-1pins1 -R N  R\lpins2-D lsdmmc1-dir-sleep-1pins-RNDsdmmc2-b4-0L pins1-    f R\lpins2-C R\lsdmmc2-b4-od-0L"pins1-    R\lpins2-C R\lpins3-f RAlsdmmc2-b4-sleep-0L#pins-Cfsdmmc2-b4-1pins1-    f R\4pins2-C R\4sdmmc2-b4-od-1pins1-    R\4pins2-C R\4pins3-f RA4sdmmc2-d47-0L!pins- E 3 R\lsdmmc2-d47-sleep-0L$pins- E3sdmmc2-d47-1pins- & ' R\4sdmmc2-d47-sleep-1pins- &'sdmmc2-d47-2pins-  & ' R\lsdmmc2-d47-sleep-2pins-&'sdmmc2-d47-3pins- E ' sdmmc2-d47-sleep-3pins- E'sdmmc3-b4-0pins1-P T U 7 Q R\lpins2-o R\lsdmmc3-b4-od-0pins1-P T U 7 R\lpins2-o R\lpins3-Q RAlsdmmc3-b4-sleep-0pins-PTU7oQsdmmc3-b4-1pins1-P T 5 7 0 R\lpins2-o R\lsdmmc3-b4-od-1pins1-P T 5 7 R\lpins2-o R\lpins3-0 RAlsdmmc3-b4-sleep-1pins-PT57o0spdifrx-0pins-l 4spdifrx-sleep-0pins-lspi2-0pins1-4\Rpins2-4spi4-0pins-LF4\Rpins2-M4stusb1600-0pins-luart4-0L pins1-k4\Rpins2- 4uart4-idle-0L pins1-kpins2- 4uart4-sleep-0L pins-kuart4-1pins1-1 4\Rpins2- 4uart4-2pins1-k4\Rpins2- 4uart7-0pins1-H4\Rpins2 -GJI4uart7-1pins1-W4\Rpins2-V4uart7-2pins1-H4\Rpins2-Gluart7-idle-2pins1-Hpins2-Gluart7-sleep-2pins-HGuart8-0pins1-A 4\Rpins2-@ 4uart8rtscts-0pins-g j 4usart2-0pins1-U44\Rpins2-634usart2-sleep-0pins-U463usart2-1pins1-U4\Rpins2-TO4usart2-sleep-1pins-UTOusart2-2pins1-544\Rpins2-634usart2-idle-2pins1-53pins2-44\Rpins3-64usart2-sleep-2pins-5463usart3-0pins1-4\Rpins2- 4usart3-1pins1-h 4\Rpins2- lusart3-idle-1pins1-pins2-h 4\Rpins3- lusart3-sleep-1pins-husart3-2pins1-h 4\Rpins2- lusart3-idle-2pins1-pins2-h 4\Rpins3- lusart3-sleep-2pins-husart3-3pins1-h 4\Rpins2-9;4usart3-idle-3pins1 -h;pins2-94usart3-sleep-3pins-h;9usbotg-hs-0pins- usbotg-fs-dp-dm-0pins-  pinctrl@54004000!st,stm32mp157-z-pinctrl T@r `L2gpio@54004000H _ GPIOZ okay!2i2c2-0pins-4ARi2c2-sleep-0pins-i2c4-0L+pins-4ARi2c4-sleep-0L,pins-i2c6-0pins-4ARi2c6-sleep-0pins-spi1-0pins1-4\Rpins2-4spi1-1pins1-4\Rpins2-4can@4400e000 !bosch,m_canHDDm_canmessage_ramT int0int1  'hclkcclk   disabledcan@4400f000 !bosch,m_canHDD(m_canmessage_ramT int0int1  'hclkcclk   disabledgpu@59000000 !vivante,gcHY Tm e~ 'buscoreo 3dsi@5a000000 !st,stm32-dsiHZ 4'pclkrefpx_clko apb disabledportscryp@54001000!st,stm32mp1-crypHT TO `o okayahb!st,mlahbsimple-bus$800m4@10000000!st,stm32mp1-m4H08o !    5 6D 6Hokay789:;< #====*vq0vq1shutdowndetachrTDchosen5serial0:115200n8memory@c0000000_ew@,@ Lvin!regulator-fixeddvinsLK@LK@9L. #address-cells#size-cellsmodelcompatibleclock-frequencydevice_typeregphandleinterruptsinterrupt-affinityinterrupt-parentmethod#interrupt-cellsinterrupt-controller#clock-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisst,syscfgstatusrangesclocksclock-namesdmasdma-names#pwm-cellsinterrupts-extendedwakeup-sourceresets#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pinctrl-2interrupt-namesst,syscfg-fmpi2c-analog-filtervref-supply#io-channel-cells#dma-cellsst,mem2memdma-requestsdma-mastersdma-channelsvdd-supplyvdda-supplyst,adc-channelsst,min-sample-time-nsecsarm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedmax-frequencyreset-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modeotg-revusb33d-supplyvbus-supply#mbox-cellsst,proc-id#reset-cellsvdd_3v3_usbfs-supplyregulator-nameregulator-min-microvoltregulator-max-microvolt#thermal-sensor-cellsdma-maxburstreg-namescd-gpiosdisable-wpst,sig-dirst,neg-edgest,use-ckinbus-widthvmmc-supplyvqmmc-supplysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50non-removableno-sdno-sdiommc-ddr-3_3vst,sysconsnps,mixed-burstsnps,pblsnps,en-tx-lpi-clockgatingsnps,axi-configsnps,tsosnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blencompaniontimeout-secvdda1v1-supplyvdda1v8-supply#phy-cellsphy-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsbuck1-supplybuck2-supplybuck3-supplybuck4-supplyldo1-supplyldo2-supplyldo3-supplyldo4-supplyldo5-supplyldo6-supplyvref_ddr-supplyboost-supplypwr_sw1-supplypwr_sw2-supplyregulator-always-onregulator-initial-moderegulator-over-current-protectionst,mask-resetregulator-boot-onregulator-active-dischargepower-off-time-secpins-are-numberedst,packagegpio-controller#gpio-cellsst,bank-namengpiosgpio-rangespinmuxbias-disabledrive-open-drainslew-ratedrive-push-pullbias-pull-upbias-pull-downst,bank-ioportbosch,mram-cfgcontiguous-areadma-rangesst,syscfg-holdbootst,syscfg-tzst,syscfg-pddsst,syscfg-rsc-tblst,syscfg-m4-statememory-regionmboxesmbox-namesstdout-pathno-mapserial0regulator-typegpios-states