8<( ygoogle,veyron-fievel-rev8google,veyron-fievel-rev7google,veyron-fievel-rev6google,veyron-fievel-rev5google,veyron-fievel-rev4google,veyron-fievel-rev3google,veyron-fievel-rev2google,veyron-fievel-rev1google,veyron-fievel-rev0google,veyron-fievelgoogle,veyronrockchip,rk3288&7Google Fievelaliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12 ';JQrk wcpu@501cpuarm,cortex-a12 ';JQrwcpu@502cpuarm,cortex-a12 ';JQrwcpu@503cpuarm,cortex-a12 ';JQrwopp-table-0operating-points-v2wopp-126000000 @opp-216000000  opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJopp-1608000000_" opp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mw timerarm,armv7-timer0   n6 timer@ff810000rockchip,rk3288-timer  H Ja  "pclktimerdisplay-subsystemrockchip,display-subsystem. mmc@ff0c0000rockchip,rk3288-dw-mshc4р JDrv"biuciuciu-driveciu-sampleB  @ Mreset Ydisabledmmc@ff0d0000rockchip,rk3288-dw-mshc4р JEsw"biuciuciu-driveciu-sampleB ! @ MresetYokay`j{ default btmrvl@2marvell,sd8897-bt& defaultmmc@ff0e0000rockchip,rk3288-dw-mshc4р JFtx"biuciuciu-driveciu-sampleB "@ Mreset Ydisabledmmc@ff0f0000rockchip,rk3288-dw-mshc4р JGuy"biuciuciu-driveciu-sampleB #@ MresetYokay`0B`kdefault saradc@ff100000rockchip,saradc $zJI["saradcapb_pclk W Msaradc-apb Ydisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spiJAR"spiclkapb_pclk  txrx ,default Ydisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spiJBS"spiclkapb_pclk txrx -default ! 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Ydisabledportsport@0endpoint@0 wwiendpoint@1 xwnport@1hdmi@ff980000rockchip,rk3288-dw-hdmi gJhmn"iahbisfrcec lf :Yokaydefaultunwedgeyzwportsport@0endpoint@0 {whendpoint@1 |wmport@1video-codec@ff9a0000rockchip,rk3288-vpu   EvepuvdpuJ "aclkhclk z} lf iommu@ff9a0800rockchip,iommu J "aclkiface D lf w}video-codec@ff9c0000rockchip,rk3288-vdec@  Jop"axiahbcabaccore Uopxׄ z~ lf iommu@ff9c0440rockchip,iommu @@@ oJ "aclkiface D lf w~gpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ EjobmmugpuJ'; lf Yokay w7opp-table-1operating-points-v2wopp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon w_qos@ffaa0080rockchip,rk3288-qossyscon w`qos@ffad0000rockchip,rk3288-qossyscon wTqos@ffad0100rockchip,rk3288-qossyscon wUqos@ffad0180rockchip,rk3288-qossyscon wVqos@ffad0400rockchip,rk3288-qossyscon wWqos@ffad0480rockchip,rk3288-qossyscon wXqos@ffad0500rockchip,rk3288-qossyscon wSqos@ffad0800rockchip,rk3288-qossyscon wYqos@ffad0880rockchip,rk3288-qossyscon wZqos@ffad0900rockchip,rk3288-qossyscon w[qos@ffae0000rockchip,rk3288-qossyscon w^qos@ffaf0000rockchip,rk3288-qossyscon w\qos@ffaf0080rockchip,rk3288-qossyscon w]dma-controller@ffb20000arm,pl330arm,primecell@)4OJ "apb_pclkwcefuse@ffb40000rockchip,rk3288-efuse Jq "pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400  @ @ `   wpinctrlrockchip,rk3288-pinctrl:defaultsleepgpio@ff750000rockchip,gpio-banku QJ@     PMIC_SLEEP_APDDRIO_PWROFFDDRIO_RETENTS3A227E_INT_LPMIC_INT_LPWR_KEY_LHUB_USB1_nFALUTPHY_PMEBPHY_INTRECOVERY_SW_LOTP_OUTUSB_OTG_POWER_ENAP_WARM_RESET_HUSB_OTG_nFALUTI2C0_SDA_PMICI2C0_SCL_PMICDEVMODE_LUSB_INTw)gpio@ff780000rockchip,gpio-bankx RJA    gpio@ff790000rockchip,gpio-banky SJB    i CONFIG0CONFIG1CONFIG2CONFIG3EMMC_RST_LBL_PWR_ENTOUCH_INTTOUCH_RSTI2C3_SCL_TPI2C3_SDA_TPwgpio@ff7a0000rockchip,gpio-bankz TJC     FLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7VCC5V_GOOD_HFLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOPHY_TXD2PHY_TXD3MAC_RXD2MAC_RXD3PHY_TXD0PHY_TXD1MAC_RXD0MAC_RXD1gpio@ff7b0000rockchip,gpio-bank{ UJD     MAC_MDCMAC_RXDVMAC_RXERMAC_CLKPHY_TXENMAC_MDIOMAC_RXCLKPHY_RSTPHY_TXCLKUART0_RXDUART0_TXDUART0_CTS_LUART0_RTS_LSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKEwgpio@ff7c0000rockchip,gpio-bank| VJE     USB_OTG_CTL1HUB_USB2_CTL1HUB_USB2_PWR_ENHUB_USB_ILIM_SELUSB_OTG_STATUS_LHUB_USB1_CTL1HUB_USB1_PWR_ENVCC50_HDMI_ENwgpio@ff7d0000rockchip,gpio-bank} WJF     I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETHUB_USB2_nFALUTUSB_OTG_ILIM_SELwMgpio@ff7e0000rockchip,gpio-bank~ XJG     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sdio1-cmd sdio1-clk sdio1-pwr  emmcemmc-clk wemmc-cmd wemmc-pwr  emmc-bus1 emmc-bus4@ emmc-bus8 wemmc-reset  wspi0spi0-clk  wspi0-cs0  wspi0-tx wspi0-rx wspi0-cs1 spi1spi1-clk  wspi1-cs0  w!spi1-rx w spi1-tx wspi2spi2-cs1 spi2-clk w"spi2-cs0 w%spi2-rx w$spi2-tx  w#uart0uart0-xfer w,uart0-cts w-uart0-rts w.uart1uart1-xfer  w/uart1-cts  uart1-rts  uart2uart2-xfer w0uart3uart3-xfer w1uart3-cts  uart3-rts  uart4uart4-xfer w2uart4-cts  uart4-rts  tsadcotp-pin w8otp-out w9pwm0pwm0-pin wOpwm1pwm1-pin wPpwm2pwm2-pin wQpwm3pwm3-pin wRgmacrgmii-pins  w>rmii-pins phy-rst w?phy-pmeb w@phy-int wAspdifspdif-tx  wdpcfg-pull-none-drv-8ma $ 1wpcfg-pull-up-drv-8ma  1pcfg-output-high @wbuttonspwr-key-l wpmicpmic-int-l wFdvs-1  wGdvs-2 wHrebootap-warm-reset-h wrecovery-switchrec-mode-l tpmtpm-int-h write-protectfw-wp-ap codechp-det wint-codec wNmic-det  wheadsetts3a227e-int-l w*buck-5vdrv-5v wledspwr-led1-on wpwr-led1-blink wusb-bc12usb-otg-ilim-sel wusb-usb-ilim-sel wusb-hosthub_usb1_pwr_en whub_usb2_pwr_en wusb_otg_pwr_en wchosen Lserial2:115200n8memorymemorypower-button gpio-keysdefaultkey-power XPower .) ^t idgpio-restart gpio-restart .) default {emmc-pwrseqmmc-pwrseq-emmcdefault wsdio-pwrseqmmc-pwrseq-simpleJ "ext_clockdefault w regulator-vcc-5vregulator-fixedAvcc_5vPdvLK@LK@  JdefaultwKregulator-vcc33-sysregulator-fixed Avcc33_sysPdv2Z2Zwregulator-vcc50-hdmiregulator-fixed Avcc50_hdmiPd K  defaultregulator-vdd-logicpwm-regulator Avdd_logic   { Pdv~psound!rockchip,rockchip-audio-max98090default VEYRON-I2S   !M 7M  N eregulator-vccsysregulator-fixedAvccsysdPregulator-vcc33-ioregulator-fixedPd Avcc33_iowIregulator-vcc5-host1regulator-fixed  default Avcc5_host1Pdregulator-vcc5-host2regulator-fixed  default Avcc5_host2Pdregulator-vcc5v-otgregulator-fixed  ) default Avcc5_otgPdexternal-gmac-clock fixed-clocksY@ ext_gmacw; #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2mmc0interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymarvell,wakeup-pincap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-handlephy-modephy-supplyrx_delaytx_delaysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-uswakeup-sourcephysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosenable-active-highvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codec