8( &google,veyron-mighty-rev5google,veyron-mighty-rev4google,veyron-mighty-rev3google,veyron-mighty-rev2google,veyron-mighty-rev1google,veyron-mightygoogle,veyronrockchip,rk3288&7Google Mightyaliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000/mmc@ff0c0000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'+2FU\rv cpu@501cpuarm,cortex-a12'+2FU\rcpu@502cpuarm,cortex-a12'+2FU\rcpu@503cpuarm,cortex-a12'+2FU\ropp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJopp-1608000000_" opp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe000000'oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer'  H Ua  -pclktimerdisplay-subsystemrockchip,display-subsystem9 mmc@ff0c0000rockchip,rk3288-dw-mshc?р UDrv-biuciuciu-driveciu-sampleM ' @+Xresetdokayku  Zdefault- 7 mmc@ff0d0000rockchip,rk3288-dw-mshc?р UEsw-biuciuciu-driveciu-sampleM !' @+Xresetdokayk@Mcndefault -btmrvl@2marvell,sd8897-bt'&| default-mmc@ff0e0000rockchip,rk3288-dw-mshc?р UFtx-biuciuciu-driveciu-sampleM "'@+Xreset ddisabledmmc@ff0f0000rockchip,rk3288-dw-mshc?р UGuy-biuciuciu-driveciu-sampleM #'@+Xresetdokaykucndefault - !saradc@ff100000rockchip,saradc' $UI[-saradcapb_pclk+W Xsaradc-apb ddisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spiUAR-spiclkapb_pclk" " txrx ,default-#$%&'dokayec@0google,cros-ec-spi'& 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Dusb2-phyldokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2'X U-otgdhost@@ ?I Dusb2-phydokayzIusb@ff5c0000 generic-ehci'\ U ddisableddma-controller@ff600000arm,pl330arm,primecell'`@9U -apb_pclk ddisabledi2c@ff650000rockchip,rk3288-i2c'e <-i2cULdefault-Jdokay2dpmic@1brockchip,rk808'xin32kwifibt_32kin&3default -KLM*6BNNZfs6NN regulatorsDCDC_REG1vdd_arm q q regulator-state-mem*DCDC_REG2vdd_gpu 5qregulator-state-mem*DCDC_REG3 vcc135_ddrregulator-state-memCDCDC_REG4vcc_18w@w@regulator-state-memC[w@LDO_REG1 vcc33_io2Z2Z6regulator-state-memC[2ZLDO_REG3vdd_10B@B@regulator-state-memC[B@LDO_REG7vdd10_lcd_pwren_h&%&%regulator-state-mem*SWITCH_REG1 vcc33_lcddregulator-state-mem*LDO_REG6 vcc18_codecw@w@eregulator-state-mem*LDO_REG4 vccio_sdw@2Zregulator-state-mem*LDO_REG5 vcc33_sd2Z2Zregulator-state-mem*LDO_REG8 vcc33_ccd2Z2Zregulator-state-mem*LDO_REG2mic_vccw@w@regulator-state-mem*i2c@ff660000rockchip,rk3288-i2c'f =-i2cUNdefault-Odokay2 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dokayodsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi'@ U~d -refpclk i F ddisabledportsport@0'endpoint@0' tmendpoint@1' urport@1'lvds@ff96c000rockchip,rk3288-lvds'@Ug -pclk_lvdslcdc-v i F ddisabledportsport@0'endpoint@0' wnendpoint@1' xsport@1'dp@ff970000rockchip,rk3288-dp'@ bh Uic-dppclk?yDdp i +oXdpFdokaydefault-zportsport@0'endpoint@0' {lendpoint@1' |qport@1'endpoint@0' }hdmi@ff980000rockchip,rk3288-dw-hdmi' gUhmn-iahbisfrcec i F {dokaydefaultunwedge-~portsport@0'endpoint@0' kendpoint@1' pport@1'video-codec@ff9a0000rockchip,rk3288-vpu'   /vepuvdpuU -aclkhclk  i iommu@ff9a0800rockchip,iommu' U -aclkiface  i video-codec@ff9c0000rockchip,rk3288-vdec'@  Uop-axiahbcabaccore opׄ  i iommu@ff9c0440rockchip,iommu '@@@ oU -aclkiface  i gpu@ffa30000#rockchip,rk3288-maliarm,mali-t760'$ /jobmmugpuU2F i dokay Copp-table-1operating-points-v2opp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon' bqos@ffaa0080rockchip,rk3288-qossyscon' cqos@ffad0000rockchip,rk3288-qossyscon' Wqos@ffad0100rockchip,rk3288-qossyscon' Xqos@ffad0180rockchip,rk3288-qossyscon' Yqos@ffad0400rockchip,rk3288-qossyscon' Zqos@ffad0480rockchip,rk3288-qossyscon' [qos@ffad0500rockchip,rk3288-qossyscon' Vqos@ffad0800rockchip,rk3288-qossyscon' \qos@ffad0880rockchip,rk3288-qossyscon' ]qos@ffad0900rockchip,rk3288-qossyscon' ^qos@ffae0000rockchip,rk3288-qossyscon' aqos@ffaf0000rockchip,rk3288-qossyscon' _qos@ffaf0080rockchip,rk3288-qossyscon' `dma-controller@ffb20000arm,pl330arm,primecell'@9U -apb_pclkfefuse@ffb40000rockchip,rk3288-efuse' Uq -pclk_efusecpu-id@7'cpu_leakage@17'interrupt-controller@ffc01000 arm,gic-400  /@' @ `   pinctrlrockchip,rk3288-pinctrlFdefaultsleep-gpio@ff750000rockchip,gpio-bank'u QU@ @ P  / \PMIC_SLEEP_APDDRIO_PWROFFDDRIO_RETENTS3A227E_INT_LPMIC_INT_LPWR_KEY_LAP_LID_INT_LEC_IN_RWAC_PRESENT_APRECOVERY_SW_LOTP_OUTHOST1_PWR_ENUSBOTG_PWREN_HAP_WARM_RESET_HnFALUT2I2C0_SDA_PMICI2C0_SCL_PMICSUSPEND_LUSB_INT3gpio@ff780000rockchip,gpio-bank'x RUA @ P  /gpio@ff790000rockchip,gpio-bank'y SUB @ P  /M \CONFIG0CONFIG1CONFIG2CONFIG3EMMC_RST_LBL_PWR_ENAVDD_1V8_DISP_ENgpio@ff7a0000rockchip,gpio-bank'z TUC @ P  / \FLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7FLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOgpio@ff7b0000rockchip,gpio-bank'{ UUD @ P  / \UART0_RXDUART0_TXDUART0_CTSUART0_RTSSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKEgpio@ff7c0000rockchip,gpio-bank'| VUE @ P  /A \SPI0_CLKSPI0_CS0SPI0_TXDSPI0_RXDVCC50_HDMI_ENgpio@ff7d0000rockchip,gpio-bank'} WUF @ P  / \I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HALS_INTINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETSDMMC_D0SDMMC_D1SDMMC_D2SDMMC_D3SDMMC_CLKSDMMC_CMDPgpio@ff7e0000rockchip,gpio-bank'~ XUG @ P  / \LCDC_BLPWM_LOGBL_ENTRACKPAD_INTTPM_INT_HSDMMC_DET_LAP_FLASH_WP_LEC_INTCPU_NMIDVSOKSDMMC_WPEDP_HPDDVS1nFALUT1LCD_ENDVS2VCC5V_GOOD_HI2C4_SDA_TPI2C4_SCL_TPI2C5_SDA_HDMII2C5_SCL_HDMI5V_DRVUART2_RXDUART2_TXD gpio@ff7f0000rockchip,gpio-bank' YUH @ P  /^ \RAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 lhdmi-cec-c7 lhdmi-ddc l~hdmi-ddc-unwedge lvcc50-hdmi-en lpcfg-output-low zpcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  suspendglobal-pwroff lddrio-pwroff lddr0-retention lddr1-retention lsuspend-l-wake lsuspend-l-sleep ledpedp-hpd l zi2c0i2c0-xfer lJi2c1i2c1-xfer l0i2c2i2c2-xfer l  Oi2c3i2c3-xfer l1i2c4i2c4-xfer l2i2c5i2c5-xfer l7i2s0i2s0-bus` lhlcdclcdc-ctl@ lvsdmmcsdmmc-clk lsdmmc-cmd lsdmmc-cd lsdmmc-bus1 lsdmmc-bus4@ lsdmmc-cd-disabled lsdmmc-cd-pin lsdmmc-wp-pin l sdio0sdio0-bus1 lsdio0-bus4@ lsdio0-cmd lsdio0-clk lsdio0-cd lsdio0-wp lsdio0-pwr lsdio0-bkpwr lsdio0-int lwifienable-h lbt-enable-l lbt-host-wake lbt-host-wake-l lbt-dev-wake-sleep lbt-dev-wake-awake lbt-dev-wake lsdio1sdio1-bus1 lsdio1-bus4@ lsdio1-cd lsdio1-wp lsdio1-bkpwr lsdio1-int lsdio1-cmd lsdio1-clk lsdio1-pwr l emmcemmc-clk lemmc-cmd l emmc-pwr l emmc-bus1 lemmc-bus4@ lemmc-bus8 l!emmc-reset l spi0spi0-clk l #spi0-cs0 l &spi0-tx l$spi0-rx l%spi0-cs1 lspi1spi1-clk l (spi1-cs0 l +spi1-rx l*spi1-tx l)spi2spi2-cs1 lspi2-clk l,spi2-cs0 l/spi2-rx l.spi2-tx l -uart0uart0-xfer l8uart0-cts l9uart0-rts l:uart1uart1-xfer l ;uart1-cts l uart1-rts l uart2uart2-xfer l<uart3uart3-xfer l=uart3-cts l uart3-rts l uart4uart4-xfer l>uart4-cts l uart4-rts l tsadcotp-pin l Dotp-out l Epwm0pwm0-pin lRpwm1pwm1-pin lSpwm2pwm2-pin lTpwm3pwm3-pin lUgmacrgmii-pins l rmii-pins lspdifspdif-tx l gpcfg-pull-none-drv-8ma  pcfg-pull-up-drv-8ma  pcfg-output-high buttonspwr-key-l lap-lid-int-l lpmicpmic-int-l lKdvs-1 l Ldvs-2 lMrebootap-warm-reset-h l recovery-switchrec-mode-l l tpmtpm-int-h lwrite-protectfw-wp-ap lcodechp-det lint-codec lQmic-det l headsetts3a227e-int-l l4backlightbl_pwr_en l bl-en llcdlcd-en lavdd-1v8-disp-en l chargerac-present-ap lcros-ecec-int l'trackpadtrackpad-int l5usb-hosthost1-pwr-en l usbotg-pwren-h l buck-5vdrv-5v lchosen serial2:115200n8memorymemory'power-button gpio-keysdefault-key-power Power 3 t dgpio-restart gpio-restart 3 default- emmc-pwrseqmmc-pwrseq-emmc-default  sdio-pwrseqmmc-pwrseq-simpleU -ext_clockdefault- regulator-vcc-5vregulator-fixedvcc_5vLK@LK@   + default-Nregulator-vcc33-sysregulator-fixed vcc33_sys2Z2Z regulator-vcc50-hdmiregulator-fixed vcc50_hdmi N  +default-regulator-vdd-logicpwm-regulator vdd_logic 0 5 @{ T~psound!rockchip,rockchip-audio-max98090default- gVEYRON-I2S v  P P   regulator-backlightregulator-fixed  + default-backlight_regulator  :regulator-panelregulator-fixed  + default-panel_regulator vcc18-lcdregulator-fixed  + default- vcc18_lcd backlightpwm-backlight   5 N default- 0B@ [  p  panelinnolux,n116bgedokay  panel-timingl V  <       portsportendpoint }gpio-charger gpio-charger mains 3default-lid-switch gpio-keysdefault-switch-lid Lid 3   regulator-vccsysregulator-fixedvccsysregulator-vcc5-host1regulator-fixed  +3 default- vcc5_host1regulator-vcc5v-otgregulator-fixed  +3 default- vcc5_host2 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplypinctrl-namespinctrl-0wp-gpioscap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemarvell,wakeup-pindisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecstartup-delay-usbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenhsync-activevactivevfront-porchvback-porchvsync-lenvsync-activecharger-typelinux,input-type