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±RBĆsyscon@ff740000rockchip,rk3288-sgrfsyscon'’tclock-controller@ff760000rockchip,rk3288-cru'’vU -xin24mĘDå½H·ŃŻjŅŽk$Ź#gø€ׄĶeį£šŃ€xhĄį£šŃ€xhĄ‚syscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd'’w‚Dedp-phyrockchip,rk3288-dp-phyUh-24mßdokay‚uio-domains"rockchip,rk3288-io-voltage-domaindokayź4ō’ 4 4 +` 7 Ca Pusbphyrockchip,rk3288-usb-phydokayusb-phy@320ß' U]-phyclkå+… Xphy-reset‚Gusb-phy@334ß'4U^-phyclkå+ˆ Xphy-reset‚Eusb-phy@348ß'HU_-phyclkå+‹ Xphy-reset‚Fwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt'’€Up āOdokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif'’‹ ^UTŠ -mclkhclkØb­tx ā6default-cĘD ddisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s'’‰ ^ ā5URĪ-i2s_clki2s_hclkØbb­txrxdefault-d o Šdokay‚˜crypto@ff8a0000rockchip,rk3288-crypto'’Š@ ā0 UĒĶ}Į-aclkhclksclkapb_pclk+® Xcrypto-rstiommu@ff900800rockchip,iommu'’@ āUŹŌ -aclkiface ¤ ddisablediommu@ff914000rockchip,iommu '’‘@’‘P āUĶÕ -aclkiface ¤ ± ddisabledrga@ff920000rockchip,rk3288-rga'’’€ āUČÖj-aclkhclksclk Ģe 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į{‚gendpoint@1' į|‚lport@1'video-codec@ff9a0000rockchip,rk3288-vpu'’šā   vepuvdpuUŠÜ -aclkhclk Ś} Ģe iommu@ff9a0800rockchip,iommu'’š ā UŠÜ -aclkiface ¤ Ģe ‚}video-codec@ff9c0000rockchip,rk3288-vdec'’œ@ ā  UĻŪop-axiahbcabaccore ·ĻŪopŹׄõįį£į£ Ś~ Ģe iommu@ff9c0440rockchip,iommu '’œ@@’œ€@ āoUĻŪ -aclkiface ¤ Ģe ‚~gpu@ffa30000#rockchip,rk3288-maliarm,mali-t760'’£$ā jobmmugpuUĄ2F Ģe dokay ū€‚Aopp-table-1operating-points-v2‚opp-100000000•õįœ~šopp-200000000• ėĀœ~šopp-300000000•į£œB@opp-400000000•ׄœČąopp-600000000•#ĆFœŠqos@ffaa0000rockchip,rk3288-qossyscon'’Ŗ ‚^qos@ffaa0080rockchip,rk3288-qossyscon'’Ŗ€ ‚_qos@ffad0000rockchip,rk3288-qossyscon'’­ ‚Sqos@ffad0100rockchip,rk3288-qossyscon'’­ ‚Tqos@ffad0180rockchip,rk3288-qossyscon'’­€ ‚Uqos@ffad0400rockchip,rk3288-qossyscon'’­ ‚Vqos@ffad0480rockchip,rk3288-qossyscon'’­€ ‚Wqos@ffad0500rockchip,rk3288-qossyscon'’­ ‚Rqos@ffad0800rockchip,rk3288-qossyscon'’­ ‚Xqos@ffad0880rockchip,rk3288-qossyscon'’­€ ‚Yqos@ffad0900rockchip,rk3288-qossyscon'’­ ‚Zqos@ffae0000rockchip,rk3288-qossyscon'’® ‚]qos@ffaf0000rockchip,rk3288-qossyscon'’Æ ‚[qos@ffaf0080rockchip,rk3288-qossyscon'’ƀ ‚\dma-controller@ffb20000arm,pl330arm,primecell'’²@ā &UĮ -apb_pclk‚befuse@ffb40000rockchip,rk3288-efuse'’“ Uq -pclk_efusecpu-id@7'cpu_leakage@17'interrupt-controller@ffc01000 arm,gic-400  @'’Ą’Ą ’Ą@ ’Ą`  ā ‚pinctrlrockchip,rk3288-pinctrlĘD»defaultsleep-‚ƒ„…œ‚ƒ†‡gpio@ff750000rockchip,gpio-bank'’u āQU@ - =  ‚1gpio@ff780000rockchip,gpio-bank'’x āRUA - =  gpio@ff790000rockchip,gpio-bank'’y āSUB - =  gpio@ff7a0000rockchip,gpio-bank'’z āTUC - =  gpio@ff7b0000rockchip,gpio-bank'’{ āUUD - =  ‚“gpio@ff7c0000rockchip,gpio-bank'’| āVUE - =  gpio@ff7d0000rockchip,gpio-bank'’} āWUF - =  ‚Lgpio@ff7e0000rockchip,gpio-bank'’~ āXUG - =  ‚ gpio@ff7f0000rockchip,gpio-bank'’ āYUH - =  hdmihdmi-cec-c0 Iˆhdmi-cec-c7 Iˆhdmi-ddc Iˆˆ‚yhdmi-ddc-unwedge I‰ˆ‚zpcfg-output-low W‚‰pcfg-pull-up b‚Špcfg-pull-down o‚Œpcfg-pull-none ~‚ˆpcfg-pull-none-12ma ~ ‹ ‚Žsuspendglobal-pwroff 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#address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplypinctrl-namespinctrl-0wp-gpioscap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removabledisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenhsync-activevactivevfront-porchvback-porchvsync-lenvsync-activecharger-typelinux,input-typeenable-active-highgpio