~8tP( At$xunlong,orangepi-rvstarfive,jh7110 &Xunlong Orange Pi RVcpus ,= cpu@0sifive,s7riscv?CcpuO@b@o@|rv64imac_zba_zbbrv64i,imaczbazbbzicntrzicsrzifenceizihpm disabledinterrupt-controllerriscv,cpu-intc cpu@1sifive,u74-mcriscv?@@,7(CcpuO@b@oBM( Xriscv,sv39|rv64imafdc_zba_zbbrv64i0imafdczbazbbzicntrzicsrzifenceizihpmakcpuinterrupt-controllerriscv,cpu-intccpu@2sifive,u74-mcriscv?@@,7(CcpuO@b@oBM( Xriscv,sv39|rv64imafdc_zba_zbbrv64i0imafdczbazbbzicntrzicsrzifenceizihpmakcpuinterrupt-controllerriscv,cpu-intccpu@3sifive,u74-mcriscv?@@,7(CcpuO@b@oBM( Xriscv,sv39|rv64imafdc_zba_zbbrv64i0imafdczbazbbzicntrzicsrzifenceizihpmakcpuinterrupt-controllerriscv,cpu-intccpu@4sifive,u74-mcriscv?@@,7(CcpuO@b@oBM( Xriscv,sv39|rv64imafdc_zba_zbbrv64i0imafdczbazbbzicntrzicsrzifenceizihpmakcpu interrupt-controllerriscv,cpu-intccpu-mapcluster0core0core1core2core3core4 opp-table-0operating-points-v2opp-375000000Z  5opp-500000000e 5opp-750000000, 5opp-1500000000Yh/ހthermal-zonescpu-thermal: cooling-mapsmap0 0  tripscpu-alert0L$Jpassive cpu-crit$ Jcriticaldvp-clock fixed-clock/dvp_clkBOl:gmac0-rgmii-rxin-clock fixed-clock/gmac0_rgmii_rxinBOsY@5gmac0-rmii-refin-clock fixed-clock/gmac0_rmii_refinBO4gmac1-rgmii-rxin-clock fixed-clock/gmac1_rgmii_rxinBOsY@'gmac1-rmii-refin-clock fixed-clock/gmac1_rmii_refinBO&hdmitx0-pixel-clock fixed-clock/hdmitx0_pixelclkBO@=i2srx-bclk-ext-clock fixed-clock/i2srx_bclk_extBOi2srx-lrck-ext-clock fixed-clock/i2srx_lrck_extBOi2stx-bclk-ext-clock fixed-clock/i2stx_bclk_extBO#i2stx-lrck-ext-clock fixed-clock/i2stx_lrck_extBO$mclk-ext-clock fixed-clock /mclk_extBOoscillator fixed-clock/oscBOn6 rtc-oscillator fixed-clock/rtc_oscBO6stmmac-axi-config_k{@ 1tdm-ext-clock fixed-clock/tdm_extBOsoc simple-bus  timer@2000000$starfive,jh7110-clintsifive,clint0?P  cache-controller@2010000,starfive,jh7110-ccachesifive,ccache0cache?@Q@dq interrupt-controller@c000000'starfive,jh7110-plicsifive,plic-1.0.0? H           serial@10000000&starfive,jh7110-uartsnps,dw-apb-uart?baudclkapb_pclkST okaydefaultserial@10010000&starfive,jh7110-uartsnps,dw-apb-uart?baudclkapb_pclkUV! disabledserial@10020000&starfive,jh7110-uartsnps,dw-apb-uart?baudclkapb_pclkWX" disabledi2c@10030000snps,designware-i2c?refL#  disabledO',<Tdefaulti2c@10040000snps,designware-i2c?refM$  disabledi2c@10050000snps,designware-i2c?refN% okayO',<Tdefaultspi@10060000arm,pl022arm,primecell?sspclkapb_pclkE&l"  disableddefaultspi@10070000arm,pl022arm,primecell?sspclkapb_pclkF'l"  disabledspi@10080000arm,pl022arm,primecell?sspclkapb_pclkG(l"  disabledtdm@10090000starfive,jh7110-tdm? ,4tdm_ahbtdm_apbtdm_internaltdmmclk_innertdm_extikjrxtx disabledi2s@100e0000starfive,jh7110-i2srx?<@i2sclkapbmclkmclk_innermclk_extbclklrckbclk_extlrck_extcd txrx  disabledpwmdac@100b0000starfive,jh7110-pwmdac?  apbcore`txokaydefaultFusb@10100000starfive,jh7110-usb (lpmstbapbaxiutmi_apb   pwrupapbaxiutmi_apb disabledusb@0 cdns,usb3? otgxhcidev dlnhostperipheralotgcdns3,usb2-phyphy@10200000starfive,jh7110-usb-phy? _125mapp_125mphy@10210000starfive,jh7110-pcie-phy?! H?phy@10220000starfive,jh7110-pcie-phy?"Bclock-controller@10230000starfive,jh7110-stgcrg?#< 6_7 Hoschifi4_corestg_axiahbusb_125mcpu_bushifi4_axinocstg_busapb_busB"syscon@10240000"starfive,jh7110-stg-sysconsyscon?$serial@12000000&starfive,jh7110-uartsnps,dw-apb-uart?baudclkapb_pclkYZ- disabledserial@12010000&starfive,jh7110-uartsnps,dw-apb-uart?baudclkapb_pclk[\. disabledserial@12020000&starfive,jh7110-uartsnps,dw-apb-uart?baudclkapb_pclk]^/ disabledi2c@12030000snps,designware-i2c?refO0  disabledi2c@12040000snps,designware-i2c?refP1  disabledi2c@12050000snps,designware-i2c?refQ2 okayO',<Tdefault!pmic@36x-powers,axp15060?6regulatorsdcdc1/AU2Zm2Zvcc_3v3-dcdc2AU mvdd_cpualdo4/AUw@m2Z emmc_vddeeprom@50 atmel,24c04?Pi2c@12060000snps,designware-i2c?refR3 okayO',<Tdefault"spi@12070000arm,pl022arm,primecell?sspclkapb_pclkH4l"  disabledspi@12080000arm,pl022arm,primecell?sspclkapb_pclkI5l"  disabledspi@12090000arm,pl022arm,primecell? sspclkapb_pclkJ6l"  disabledspi@120a0000arm,pl022arm,primecell? sspclkapb_pclkK7l"  disabledi2s@120b0000starfive,jh7110-i2stx0? $$i2sclkapbmclkmclk_innermclk_extef/tx disabledi2s@120c0000starfive,jh7110-i2stx1? <#$@i2sclkapbmclkmclk_innermclk_extbclklrckbclk_extlrck_extgh0tx disabledpwm@120d0000%starfive,jh7110-pwmopencores,pwm-v1? yl disableddefault%temperature-sensor@120e0000starfive,jh7110-temp? sensebus|{ sensebus spi@13010000#starfive,jh7110-qspicdns,qspi-nor ?!@ZWX refahbapb>=?qspiqspi-ocprstc_refokay flash@0jedec,spi-nor?#1?partitionsfixed-partitions spl@0?uboot-env@f0000?uboot@100000?clock-controller@13020000starfive,jh7110-syscrg?< &'#$(((oscgmac1_rmii_refingmac1_rgmii_rxini2stx_bclk_exti2stx_lrck_exti2srx_bclk_exti2srx_lrck_exttdm_extmclk_extpll0_outpll1_outpll2_outB"0MZ( ](((YteYh/syscon@13030000-starfive,jh7110-sys-sysconsysconsimple-mfd?clock-controllerstarfive,jh7110-pll B(pinctrl@13040000starfive,jh7110-sys-pinctrl?pV/i2c0-0i2c-pins 9 :i2c2-0i2c-pins;x<|i2c5-0!i2c-pinsOPi2c6-0"i2c-pinsVWmmc0-0*mmc-pins(@ABCDEFGHI mmc1-0.clk-pins7  mmc-pins,9L -:P .;T /okayM^t{default. /)ethernet@16030000&starfive,jh7110-dwmacsnps,dwmac-5.20?(00m0ostmmacethpclkptp_reftxgtx00stmmacethahb macirqeth_wake_irqeth_lpi @6Rcr1 2 okay3 rgmii-idM0]0mdio snps,dwmac-mdioethernet-phy@0?2 ^Qn3ethernet@16040000&starfive,jh7110-dwmacsnps,dwmac-5.20?(bafjkstmmacethpclkptp_reftxgtxBCstmmacethahb NMLmacirqeth_wake_irqeth_lpi @6Rcr1  disableddma-controller@16050000starfive,jh7110-axi-dma?core-clkcfgr-clkI  clock-controller@17000000starfive,jh7110-aoncrg?( 45 l6Noscgmac0_rmii_refingmac0_rgmii_rxinstg_axiahbapb_busgmac0_gtxclkrtc_oscB"0syscon@17010000"starfive,jh7110-aon-sysconsyscon? +2pinctrl@17020000starfive,jh7110-aon-pinctrl?0UDpower-controller@17030000starfive,jh7110-pmu?o +;csi@19800000#starfive,jh7110-csi2rxcdns,csi2rx?07777 7 7 Fsys_clkp_clkpixel_if0_clkpixel_if1_clkpixel_if2_clkpixel_if3_clk07 777775sysreg_bankpixel_if0pixel_if1pixel_if2pixel_if38dphy disabledM7t@ports port@0?port@1?endpoint ?9<clock-controller@19810000starfive,jh7110-ispcrg?345:1isp_top_coreisp_top_axinoc_bus_isp_axidvp_clk)*B" O;7phy@19820000starfive,jh7110-dphy-rx?777 cfgreftx77 O28isp@19840000starfive,jh7110-camss ? sysconisp877 77 734Eapb_funcwrapper_clk_cdvp_invaxiwrmipi_rx0_pxlispcore_2xisp_axi0777 7 )*6wrapper_pwrapper_caxirdaxiwrisp_top_nisp_top_axi O;\WZX disabledM77tO` =ports port@0?port@1?endpoint ?<9clock-controller@295c0000starfive,jh7110-voutcrg?)\,:=>?=Vvout_srcvout_top_ahbvout_top_axivout_top_hdmitx0_mclki2stx0_bclkhdmitx0_pixelclk+B" O;pcie@940000000starfive,jh7110-pcie ? @+cfgapb ] 800 @8 n` >>>> Cpci  `  noctlaxi_mst0apb0   mst0slv0slvbrgcoreapbokay /?default@interrupt-controller >pcie@9c0000000starfive,jh7110-pcie ? ,cfgapb ] 888 @9 n` AAAA Cpci  `   noctlaxi_mst0apb0mst0slv0slvbrgcoreapbokay /BdefaultCinterrupt-controller Aaliases /soc/ethernet@16030000 /soc/i2c@10030000 /soc/i2c@10050000 /soc/i2c@12050000 /soc/i2c@12060000 /soc/mmc@16010000 /soc/mmc@16020000 /soc/serial@10000000chosen serial0:115200n8memory@40000000Cmemory?@gpio-restart gpio-restart /# leds gpio-ledsled-0 Daudio-codeclinux,spdif-ditGsoundsimple-audio-card StarFive-PWMDAC-Sound-Card simple-audio-card,dai-link@0? left_j E Ecpu +FEcodec +Gregulator-vcc3v3-pcieregulator-fixed vcc3v3-pcieU2Zm2ZA,wifi-pwrseqmmc-pwrseq-simple 5/>+ compatible#address-cells#size-cellsmodeltimebase-frequencyregdevice_typei-cache-block-sizei-cache-setsi-cache-sizenext-level-cacheriscv,isariscv,isa-baseriscv,isa-extensionsstatusphandlebootph-pre-raminterrupt-controller#interrupt-cellsd-cache-block-sized-cache-setsd-cache-sized-tlb-setsd-tlb-sizei-tlb-setsi-tlb-sizemmu-typetlb-splitoperating-points-v2clocksclock-names#cooling-cellscpu-supplycpuopp-sharedopp-hzopp-microvoltpolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisclock-output-names#clock-cellsclock-frequencysnps,lpi_ensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,bleninterrupt-parentrangesinterrupts-extendedinterruptscache-levelcache-unifiedriscv,ndevresetsreg-io-widthreg-shiftpinctrl-namespinctrl-0i2c-sda-hold-time-nsi2c-sda-falling-time-nsi2c-scl-falling-time-nsarm,primecell-periphidnum-csdmasdma-names#sound-dai-cellsstarfive,sysconstarfive,stg-sysconreset-namesreg-namesinterrupt-namesphysphy-names#phy-cellsstarfive,sys-syscon#reset-cellsregulator-boot-onregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-namepagesize#pwm-cells#thermal-sensor-cellscdns,fifo-depthcdns,fifo-widthcdns,trigger-addresscdns,read-delayspi-max-frequencycdns,tshsl-nscdns,tsd2d-nscdns,tchsh-nscdns,tslch-nsassigned-clocksassigned-clock-parentsassigned-clock-ratesgpio-controller#gpio-cellspinmuxbias-disableinput-enableinput-schmitt-enablebias-pull-updrive-strengthinput-disableinput-schmitt-disableslew-ratebias-pull-downlli-bus-interface-ahb1mem-bus-interface-ahb1memcpy-burst-sizememcpy-bus-width#dma-cellsfifo-watermark-aligneddata-addrstarfive,sysregcap-sd-highspeedmmc-pwrseqvmmc-supplyvqmmc-supplycd-gpiosrx-fifo-depthtx-fifo-depthsnps,multicast-filter-binssnps,perfect-filter-entriessnps,fixed-burstsnps,no-pbl-x8snps,force_thresh_dma_modesnps,axi-configsnps,tsosnps,txpblsnps,rxpblphy-handlephy-modestarfive,tx-use-rgmii-clkrx-internal-delay-pstx-internal-delay-psmotorcomm,rx-clk-drv-microampmotorcomm,rx-data-drv-microampmotorcomm,tx-clk-adj-enabledmotorcomm,tx-clk-10-invertedmotorcomm,tx-clk-100-invertedmotorcomm,tx-clk-1000-inverteddma-channelssnps,dma-masterssnps,data-widthsnps,block-sizesnps,prioritysnps,axi-max-burst-len#power-domain-cellsremote-endpointpower-domainslinux,pci-domaininterrupt-map-maskinterrupt-mapmsi-controllerbus-rangeperst-gpiosethernet0i2c0i2c2i2c5i2c6mmc0mmc1serial0stdout-pathsimple-audio-card,nameformatbitclock-masterframe-mastersound-daireset-gpios